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Dynamic range

About: Dynamic range is a research topic. Over the lifetime, 7576 publications have been published within this topic receiving 101739 citations. The topic is also known as: DNR & DR.


Papers
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Journal ArticleDOI
TL;DR: In this paper, the authors developed a demonstrator system that combines a 961 pixel imaging array with a readout system capable of reading out all pixels simultaneously with only one readout cable pair and a single cryogenic amplifier.
Abstract: spectrum will require very large arrays of ultra-sensitive detectors in combination with high multiplexing factors and effcient lownoise and low-power readout systems. We have developed a demonstrator system suitable for such applications. Methods. The system combines a 961 pixel imaging array based upon Microwave Kinetic Inductance Detectors (MKIDs) with a readout system capable of reading out all pixels simultaneously with only one readout cable pair and a single cryogenic amplifier. We evaluate, in a representative environment, the system performance in terms of sensitivity, dynamic range, optical efficiency, cosmic ray rejection, pixel-pixel crosstalk and overall yield at an observation centre frequency of 850 GHz and 20% fractional bandwidth. Results. The overall system has an excellent sensitivity, with an average detector sensitivity hNEPdeti = 3 - 10

110 citations

Proceedings ArticleDOI
Woodward Yang1
16 Feb 1994
TL;DR: In this article, a 32/spl times/32 array of photosensors with pulse frequency outputs uses standard 2 /spl mu/m CMOS technology and achieves a linear dynamic range of 10/sup 6/ in optical energy.
Abstract: A 32/spl times/32 array of photosensors with pulse frequency outputs uses standard 2 /spl mu/m CMOS technology. The photosensors use pulse-frequency encoding to achieve a linear dynamic range of 10/sup 6/ in optical energy. Power dissipation of the photosensor is proportional to the frequency of the pulse outputs, and under typical illumination and bias conditions, the entire 32/spl times/32 array dissipates >

110 citations

01 Jan 2001
TL;DR: With an ADC per pixel, massively parallel conversion and high-speed digital readout become possible, completely eliminating analog readout bottlenecks.
Abstract: In a Digital Pixel Sensor (DPS), each pixel has an ADC, all ADCs operate in parallel, and digital data is directly read out of the image sensor array as in a conventional digital memory [1]. The DPS architecture offers several advantages over analog image sensors including better scaling with CMOS technology due to reduced analog circuit performance demands and the elimination of column fixed-pattern noise and column readout noise. With an ADC per pixel, massively parallel conversion and high-speed digital readout become possible, completely eliminating analog readout bottlenecks. This benefits traditional high speed imaging applications and enables new imaging enhancement capabilities such as multiple sampling for increasing sensor dynamic range [2]. Achieving acceptable pixel sizes using DPS, however, requires the use of a 0.18 μm or below CMOS process, which is challenging due to reduced supply voltages and increased leakage currents [3].

110 citations

Patent
25 Feb 2002
TL;DR: In this paper, the authors propose methods for enhancing the dynamic range for specific detection of one or more analytes in assays using scattered-light detectable particle labels, which involve utilizing variations in detection technique and/or signal processing to extend the dynamic ranges to either or both of lower and higher concentrations.
Abstract: Methods for enhancing the dynamic range for specific detection of one or more analytes in assays using scattered-light detectable particle labels. The methods involve utilizing variations in detection technique and/or signal processing to extend the dynamic range to either or both of lower and higher concentrations.

108 citations

Journal ArticleDOI
TL;DR: The authors compare the second-order sigma-delta ( Sigma Delta ) modulator to several alternative modulator architectures in the context of digital-audio signal acquisition and presents designs and experimental results for a 1 mu m CMOS implementation that does not require error correction or component trimming.
Abstract: The authors compare the second-order sigma-delta ( Sigma Delta ) modulator to several alternative modulator architectures in the context of digital-audio signal acquisition. Design details and experimental results are presented for a 1 mu m CMOS implementation that does not require error correction or component trimming to achieve virtually ideal 16 b performance at a conversion rate of 50 kHz. The experimental modulator is a fully differential circuit that operates from a single 5 V power supply and does not require the use of precision sample-and-hold circuitry. With an oversampling ratio of 256 and a clock rate of 12.8 MHz, the modulator achieves a 98 dB dynamic range and a peak signal-to-(noise+distortion) ratio (SNDR) of 94 dB. Measurements and simulations of discrete noise peaks in the output spectrum that result from limit-cycle oscillations are also presented and discussed. >

108 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023176
2022383
2021189
2020265
2019325
2018334