Topic
Effective number of bits
About: Effective number of bits is a research topic. Over the lifetime, 3776 publications have been published within this topic receiving 46130 citations.
Papers published on a yearly basis
Papers
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TL;DR: Noise performance of an ECoG system is optimized and an equalization technique that reduces the analog-to-digital converter (ADC) dynamic range requirements and eliminates the need for a variable gain amplifier (VGA) is discussed.
Abstract: Electrocorticography (ECoG) is an important area of research for Brain-Computer Interface (BCI) development. ECoG, along with some other biopotentials, has spectral characteristics that can be exploited for more optimal front-end performance than is achievable with conventional techniques. This paper optimizes noise performance of such a system and discusses an equalization technique that reduces the analog-to-digital converter (ADC) dynamic range requirements and eliminates the need for a variable gain amplifier (VGA). We demonstrate a fabricated prototype in 1p9m 65 nm CMOS that takes advantage of the presented findings to achieve high-fidelity, full-spectrum ECoG recording. It requires 1.08 $\mu{\rm W}$ over a 150 Hz bandwidth for the entire analog front end and only 7 bits of ADC resolution.
18 citations
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09 Oct 1981TL;DR: In this paper, a two-stage analog-to-digital converter with a successive-approximation register was proposed, where the first stage is a resistor-string d-toa converter controlled by a successive approximation register, functioning in a first phase of the conversion operation to determine a set of higher order bits of the digital output signal.
Abstract: A two-stage analog-to-digital converter wherein the first stage is a resistor-string d-to-a converter controlled by a successive-approximation register, functioning in a first phase of the conversion operation to determine a set of higher order bits of the digital output signal The second stage is a dual-slope integrating-type a-to-d converter functioning in a second phase of the conversion operation to determine the remaining lower-order bits of the digital output signal The dual-slope converter receives a reference signal derived from two adjacent junction points of the first-stage resistor-string d-to-a converter corresponding to the higher order bits determined in the first phase of operation, thereby to assure high resolution performance
18 citations
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06 Sep 1991TL;DR: In this article, a general purpose programmable optical analyzer employs a nonlinear gain at the input stage of an analog to digital converter in order to limit the number of bits used to resolve shot noise.
Abstract: A general purpose programmable optical analyzer employs a nonlinear gain at the input stage of an analog to digital converter in order to limit the number of bits used to resolve shot noise.
18 citations
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28 May 1997TL;DR: In this article, only the value of the least significant bit or of some of the less significant bits is used in order to test an analog-to-digital converter in an integrated circuit, and the information concerning the differential and the integral nonlinearity can be determined from the values of said less significant bit.
Abstract: Only the value of the least-significant bit, or of some of the less-significant bits is used in order to test an analog-to-digital converter in an integrated circuit. The information concerning the differential and the integral non-linearity can be determined from the values of said less-significant bit. Furthermore, the functionality of the analog-to-digital converter is tested by counting the number of changes of the least-significant bit and by comparing this number with the value formed by the other bits.
18 citations
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02 Mar 2017TL;DR: Digital power amplifiers and transmitters have drawn significant interest in the recent past due to their reconfigurability, compatibility with CMOS technology scaling and DSP, and potential for automated design synthesis, but out-of-band emissions remain an unsolved problem.
Abstract: Digital power amplifiers and transmitters have drawn significant interest in the recent past due to their reconfigurability, compatibility with CMOS technology scaling and DSP, and potential for automated design synthesis [1–5]. While significant progress has been made in achieving moderate output power levels in CMOS, wideband modulation, and high efficiency under back-off, out-of-band emissions remain an unsolved problem. The elimination of the analog reconstruction filter that follows the DAC in a conventional analog transmitter implies that broadband DAC quantization noise appears at the output of the transmitter unfiltered. Quantization noise can be suppressed by increasing resolution and/or sampling rate, but to meet the challenging −150 to −160dBc/Hz out-of-band (OOB and specifically RX-band) noise requirement of FDD with conventional duplexers, nearly 12b at 0.5GS/s is required. Such a high effective number of bits (ENOB) is extremely challenging in digital PAs given their strong output nonlinearity. Consequently, while low-power modulators are able to approach −150dBc/Hz RX-band noise floor and below [6], state-of-the-art digital transmitters achieve −130 to −135dBc/Hz RX-band noise, nearly 20dB or 100× away [2–4]. Embedding mixed-domain FIR filtering into digital transmitters to create notches in the RX band has been proposed [4,7], but, while successful in low-power modulators [7], nonlinearity significantly limits notch depth to <10dB in digital PAs [4]. Further, notch bandwidth (BW) is far less than 20MHz, the typical LTE BW, in the simple two-tap FIR structures that have been explored [4].
18 citations