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Effective number of bits

About: Effective number of bits is a research topic. Over the lifetime, 3776 publications have been published within this topic receiving 46130 citations.


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Patent
04 May 1970
TL;DR: In this paper, a missing information bit detector was proposed for decoding double frequency or phase encoded information, where a first circuit receives the information stream of clock and data bits and generates a series of pulses whose width is dependent on the delay of the first circuit, the time between successive bits and the duration of such bits received at its input.
Abstract: Herein is revealed a missing information bit detector which is utilized in reading either double frequency or phase encoded information. A first circuit receives the information stream of clock and data bits and generates a series of pulses whose width is dependent on the delay of the first circuit, the time between successive bits and the duration of such bits received at its input. A low pass digital filter is coupled to receive such pulses and generates an output signal indicative of a missing bit when the width of such pulses in greater than a specified value. Also revealed is a means for separating the clock and data bits while maintaining a selected phase relationship therebetween.

14 citations

Patent
08 Jun 1981
TL;DR: In this paper, a digital data correlator is provided which detects the presence of a particular sequence, or correlating pattern, of binary data bits in a serial binary data stream, is tolerant of data errors, and is adjustable to accept different numbers of errors.
Abstract: A digital data correlator is provided which detects the presence of a particular sequence, or correlating pattern, of binary data bits in a serial binary data stream, is tolerant of data errors, and is adjustable to accept different numbers of data errors. The correlator includes a shift register of the CMOS type, a plurality of inverters of the CMOS type connected to selected outputs of the register at which bits of a particular logic value are expected for a properly positioned correlating pattern in the register, and a plurality of like-valued resistances coupled to the outputs of the register and to the inverters. Erroneous bits in the register cause an error voltage to be produced at a common node point coupled to the resistances. The value of the error voltage is compared in a comparator against a threshold reference voltage of a value related to an acceptable number of erroneous bits. An output of a first logic value is produced by the comparator when the number of erroneous bits in the register exceeds the acceptable number, and an output of a second logic value is produced by the comparator when the number of erroneous bits in the register is equal to or less than the acceptable number. The digital data correlator further includes circuitry capable of altering the number of erroneous bits that will be tolerated or accepted by the correlator.

14 citations

Journal ArticleDOI
TL;DR: A pure digital blind calibration method to estimate and calibrate offset, gain and timing mismatches, which significantly reduces the required hardware resources, specifically for the derivative and fractional delay filters for which no look-up table is required.
Abstract: In this paper, we propose a pure digital blind calibration method to estimate and calibrate offset, gain and timing mismatches. Gain errors are calibrated based on first channel correction using an overall reference, whereas for the rest of the $$(M-1)$$ channels, the corrected first channel becomes the reference channel. Time skew calibration is performed using a derivative filter followed by a fractional delay filter and a scaling factor. The proposed technique significantly reduces the required hardware resources, specifically for the derivative and fractional delay filters for which no look-up table is required. In addition, the proposed method requires only two finite impulse response filters with fixed coefficients, thus reducing complexity and hardware resources, as compared to adaptive filter techniques. For a sampling frequency of 3.072 GHz, the maximum achievable signal-to-noise and distortion ratio is 67 dB, resulting in effective number of bits of 10.83 for a 12-bit resolution analog-to-digital converter.

14 citations

Proceedings ArticleDOI
05 Jun 2011
TL;DR: A pseudo segmented twofold time-interleaved 6-bit digital-to-analog converter (DAC) occupies 0.28 mm2 chip area in a standard 90 nm CMOS technology and enables sampling rates up to 28 GS/s with a power consumption of 2.25 W.
Abstract: Summary form only given, as follows. A pseudo segmented twofold time-interleaved 6-bit DAC occupies 0.28 mm2 chip area in a standard 90 nm CMOS technology. The DAC enables sampling rates up to 28 GS/s with a power consumption of 2.25 W at a −2.5 V power supply. The output bandwidth is at least 14 GHz. The integral nonlinearity (INL) and differential non-linearity (DNL) are 0.8 LSB and 1 LSB respectively. The estimated effective number of bit (ENOB) at 25 GS/s are 5.5-bit at DC and 4.6-bit at the Nyquist frequency.

14 citations

Proceedings ArticleDOI
21 Mar 2004
TL;DR: The simulation results show that in both systems four bits resolution are enough to a performance very near to the ideal case, compared to that of a ideal infinite resolution.
Abstract: Multi-band OFDM ultra wideband (UWB) system is the leading proposal for the IEEE 802.15.3a standard. Multi-band pulsed-OFDM is an enhancement to this system that provides better performance with lower complexity and power consumption. In this paper we study the resolution of the analog to digital converter (ADC) that is required for both systems using the simulation results. The performance of both systems is evaluated with different ADC resolution in realistic situations using the measured indoor propagation channel models provided by the IEEE 802.15.3a standard and compared to that of a ideal infinite resolution i.e. ideal ADC. The simulation results show that in both systems four bits resolution are enough to a performance very near to the ideal case.

14 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202361
2022143
202196
2020147
2019149
2018147