Effective number of bits

About: Effective number of bits is a research topic. Over the lifetime, 3776 publications have been published within this topic receiving 46130 citations.

Off-line gain calibration in a time-interleaved analog-to-digital converter

Abstract: A time-interleaved analog-to-digital converter (ADC) includes a plurality of ADC blocks each including: at least one ADC unit configured to convert an analog input to a digital output; and a digital gain controller configured to adjust a reference voltage of the at least one ADC unit based on a comparison of an actual output of the at least one ADC unit to an expected output of the at least one ADC unit.

A 0.5-V 5.2-fJ/Conversion-Step Full Asynchronous SAR ADC With Leakage Power Reduction Down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS

Abstract: This paper presents an ultralow-power and ultralow-voltage SAR ADC. Full asynchronous operation and boosted self-power gating are proposed to improve conversion accuracy and reduce static leakage power. By designing with MOSFET of high threshold voltage (HVt) and low threshold voltage (LVt), the leakage power is reduced without decrease of maximum sampling frequency. The test chip in 40-nm CMOS process has successfully reduced leakage power by 98%, and it achieves 8.2-bit ENOB and while consuming only 650 pW at 0.1 kS/s from 0.5-V power supply. The power consumption is scalable up to 4 MS/s and power supply range from 0.4 to 0.7 V. The best figure of merit at 0.5 V is 5.2 fJ/conversion-step at 20 kS/s.

10-GS/s 5-bit Real-Time Optical Quantization for Photonic Analog-to-Digital Conversion

Abstract: We report the experimental demonstration of a 10-GS/s 5-bit real-time optical quantization using the soliton self-frequency shift (SSFS) and multistage spectral compression. We prove the feature of sampling rate transparency at 10 GS/s by transmitting 10-Gb/s multi-intensity level quasi analog signals through our 5-bit optical quantizer. Furthermore, to confirm the performance of our quantizer, we measure the bit-error-rate and calculate the effective number of bits, the integral nonlinearity error, and the differential nonlinearity error.

Booth array multiplying circuit having carry correction

Abstract: A multiplying circuit having sign carry correcting circuits which set all bits of a multiplier Y subjected to sign extension to a certain specific value ("0" or "1"), and when a sign bit, which is the highest bit of effective data in the data to be multiplied, is carried, a specific value signal is input to a bit input portion of a Booth decoder, receiving both the least significant invalid bit and the most significant effective bit of the multiplier, according to a value of a sign extension control signal. In addition, a value inputted to partial product adding circuits from an intermediate result shift circuit is set to a multiplicand value according to the value of a predetermined number of least significant bits of the multiplier, and the multiplier bits excluding the predetermined number of least significant bits inputted to the intermediate result shift circuit are inputted to multiple generating circuits. Thus, a sign extension function or the number of adding circuits to be added in the case of producing a remainder in the number of partial products, at the time of dividing the multiplication into a plurality of operation cycles, are reduced to suppress a circuit scale from becoming larger.

Photonic preprocessor for analog-to-digital-converter using a cavity-less pulse source

Abstract: A photonic preprocessor for analog to digital conversion is demonstrated and characterized using a cavity-less optical pulse source. The pulse source generates high fidelity pulses at 2 GHz repetition rate with temporal width of 3 ps. Chirped pulses are formed by cascaded amplitude and phase modulators, and subsequently compressed in dispersion compensating fiber. Sampling operation is performed with a dual-output Mach-Zehnder modulator, where the complimentary output enables a reduction of noise by 3 dB. Phase noise characterization shows that the phase noise of the generated pulses is fully dictated by the RF source. The high quality of the pulse source used in a sampling preprocessor experiment was verified by measuring 8 effective number of bits at 10 GHz and 7.0 effective number of bits at 40 GHz.