scispace - formally typeset
Search or ask a question
Topic

Effective number of bits

About: Effective number of bits is a research topic. Over the lifetime, 3776 publications have been published within this topic receiving 46130 citations.


Papers
More filters
Patent
08 Jul 1999
TL;DR: In a turbo coder, rate conversion and/or rate matching is achieved by deleting parity bits P1 and P2 from the outputs of two constituent coders, one supplied with data bits to be coded and the other supplied with the same data bits after interleaving as discussed by the authors.
Abstract: In a turbo coder, rate conversion and/or rate matching is achieved by deleting parity bits P1 and P2 from the outputs of two constituent coders, one supplied with data bits to be coded and the other supplied with the same data bits after interleaving. Deleted bits are determined by a rate matching control unit directly for the P1 bits and via a similar position interleaving step for the P2 bits. A similar rate matching arrangement is provided for only two of the three outputs of a rate 1/3 convolutional coder, the third output corresponding to a strongest coding polynomial in terms of minimum free distance and none of its coded data bits being deleted.

27 citations

Journal ArticleDOI
TL;DR: Simulation results indicate that for realistic indoor propagation environments the ADC resolution of an analog beamformer can be reduced by 4 bits when the receiver operates at 2 bits/s/Hz, reducing ADC power consumption by approximately 90% and full MIMO analog spatial filter can reduce ADC resolution with over 3 bits per ADC.
Abstract: Wideband cognitive radios (CRs) receive signals from multiple transmitters simultaneously to increase spectrum utilization. Processing a wideband spectrum is challenging due to large dynamic range (DR) of the received signal and required high sampling speed of the ADC. The power consumption of high sampling speed/high-resolution ADCs have been prohibitive for handheld radios. However, in CR applications strong inband signals that pose large DR requirements can be filtered out, since CR needs to detect unused spectrum bands where no signal is present. Spatial domain filtering approaches through use of multiple antennas to reduce DR of the wideband signal are proposed. Algorithms and architectures are developed for vector beamforming (multiple antennas and a single ADC) and full multiple-input multiple-output (MIMO) (multiple antennas with an ADC per antenna) analog spatial filters for adaptive interference suppression. Simulation results indicate that for realistic indoor propagation environments the ADC resolution of an analog beamformer can be reduced by 4 bits when the receiver operates at 2 bits/s/Hz, reducing ADC power consumption by approximately 90%. Moreover, simulations indicate that full MIMO analog spatial filter can reduce ADC resolution with over 3 bits per ADC when the receiver operates at 5 bits/s/Hz, reducing ADC power consumption by approximately 85%.

27 citations

Journal ArticleDOI
TL;DR: A charge-mode SAR ADC architecture that uses only highly nonlinear metal-oxide-semiconductor capacitors (MOSCAPs) as the DAC capacitance elements to improve the tolerance of the ADC to comparator offset and noise is presented.
Abstract: The linearity of the vast majority of the ADC topologies is limited by the linearity of the circuit elements employed in their design, such as resistors and capacitors. This paper presents a charge-mode SAR ADC architecture that uses only highly non-linear metal-oxide-semiconductor capacitors (MOSCAPs) as the DAC capacitance elements. The non-linearity of the MOSCAPs is exploited to improve the tolerance of the ADC to comparator offset and noise. The architecture employs local voltage boosting and a new boost-and-bootstrap switch to allow operation with an over-rails input range. A 9 bit prototype is fabricated in a $0.13 \;\upmu\text{m}$ CMOS process and operates with a supply voltage of 0.6 V, handling a differential input range of $1.7\; \text{V}_\text{pp}$ . The prototype achieves an effective number of bits (ENOB) larger than 8.5 for a temperature range of $-40$ to 85°C, despite the strong dependency of MOSCAPs to temperature. Operating at 1 MSps, the prototype consumes $2.78 \;\upmu\text{W}$ , leading to a figure of merit (FoM) of 7.8 fJ/conversion-step.

27 citations

Patent
04 Aug 1999
TL;DR: In this article, the authors proposed an upper bound on the number of distinct watermarks that can be reliably detected in a given embodiment, as a function of the noise variance of a potential jammer.
Abstract: Digital watermark information is inserted into an image by first separating the image into components, e.g., discrete cosine transform (DCT) blocks or image subbands, and then associating one or more bits of the digital watermark information with each of the components. For example, a single bit may be associated with each of the components by modulating the components with selected waveforms representative of the corresponding digital watermark information bits. As another example, the digital watermark information bits may be coded, e.g., using a repetition code, linear block code or convolutional code, to form channel bits, such that the modulating waveforms are selected for the image components based on the corresponding channel bits. The digital watermark information may include a total of B bits of information for representing a particular watermark, such that M=2 B distinct watermarks can be generated using the B information bits. The invention also provides techniques for determining an upper bound on the number of distinct watermarks that can be reliably detected in a given embodiment, as a function of the noise variance of a potential jammer.

27 citations

Patent
07 Jun 1991
TL;DR: In this article, a system in which a characteristic of individual picture points is provided to an accuracy of m binary bits but conveyed by n bits, where n is less than m, is described.
Abstract: A system in which a characteristic of individual picture points is provided to an accuracy of m binary bits but conveyed by n bits, where n is less than m. The value of a lower order bit of the n bit signal is switched to cause said binary value to represent, for any one picture point, either a value above or a value below the original value. The new values are distributed without order among the picture points with a probability dependent upon the value of the (m-n) lowest order bits of the desired value.

27 citations


Network Information
Related Topics (5)
CMOS
81.3K papers, 1.1M citations
94% related
Integrated circuit
82.7K papers, 1M citations
88% related
Amplifier
163.9K papers, 1.3M citations
88% related
Electronic circuit
114.2K papers, 971.5K citations
87% related
Transistor
138K papers, 1.4M citations
85% related
Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202361
2022143
202196
2020147
2019149
2018147