Showing papers on "Electronic circuit simulation published in 1980"

An Integrated Mask Artwork Analysis System

Abstract: A new LSI artwork analysis and processing system, called EMAP, is described with algorithms, a database schema and applications. EMAP provides the designer with the artwork verification and processing tools which include mask artwork processing, geometrical design rule checking, connectivity analysis and electrical circuit parameter calculation. The circuit connectivity data derived from the mask artwork data is used for input to a logic simulator, a timing simulator, a circuit simulator and a circuit schematic generator.

Toward a practical computer-aid for thyristor circuit design

Abstract: It is shown that using only thyristor data sheets and a popular, easy-to-use circuit simulation program (SPICE) readily available to the public one can perform thyristor circuit simulations as a design aid.

Interactive two-dimensional design of barrier-controlled MOS transistors

Abstract: An interactive program has been developed for the graphic generation and the solution of two-dimensional impurity, carrier, potential, and field distributions in small-geometry MOS transistor configurations. Emphasis is placed on conversational operation and three-dimensional display on a graphics terminal with a generation rate, for any self-consistent two-dimensional solution, of less than few minutes for each computation and drawing. Although this limited the approach to a solution of the potential problem only, the barrier-controlled characteristics in weak inversion and weak injection (punch-through) are produced efficiently and provide quantitative data for slopes, threshold voltages, and punchthrough voltages, as well as their two-dimensional dependence on device geometry, doping, and terminal voltages. Examples are presented for NMOS transistors with various enhancement and buried channel implants. The program is useful both as a pre-selector for structures to be simulated with a more elaborate two-dimensional potential and transport program and as a generator of parameters for a device model in a circuit simulator.

Interactive Two-Dimensional Design of Barrier-Controlled MOS Transistors

Abstract: An interactive program has been developed for the graphic generation and the solution of two-dimensional impurity, earner, potential, and field distributions in small-geometry MOS transistor configurations. Emphasis is placed on conversational operation and three-dimensional display on a graphics terminal with a generation rate, for any self-consistent two-dimensional solution, of less than few minutes for each computation and drawing. Although this limited the approach to a solution of the potential problem only, the barrier-controlled characteristics in weak inversion and weak injection (punch-through) are produced efficiently and provide quantitative data for slopes, threshold voltages, and punch through voltages, as well as their two-dimensional dependence on device geometry, doping, and terminal voltages. Examples are presented for NMOS transistors with various enhancement and buried channel implants. The program is useful both as a pre-selector for structures to be simulated with a more elaborate two-dmensional potential and transport program and as a generator of parameters for a device model in a circuit simulator.