Showing papers on "Electronic circuit simulation published in 2009"

Comprehensive Approach to Modeling and Simulation of Photovoltaic Arrays

Abstract: This paper proposes a method of modeling and simulation of photovoltaic arrays. The main objective is to find the parameters of the nonlinear I-V equation by adjusting the curve at three points: open circuit, maximum power, and short circuit. Given these three points, which are provided by all commercial array data sheets, the method finds the best I-V equation for the single-diode photovoltaic (PV) model including the effect of the series and parallel resistances, and warranties that the maximum power of the model matches with the maximum power of the real array. With the parameters of the adjusted I-V equation, one can build a PV circuit model with any circuit simulator by using basic math blocks. The modeling method and the proposed circuit model are useful for power electronics designers who need a simple, fast, accurate, and easy-to-use modeling method for using in simulations of PV systems. In the first pages, the reader will find a tutorial on PV devices and will understand the parameters that compose the single-diode PV model. The modeling method is then introduced and presented in details. The model is validated with experimental data of commercial PV arrays.

Modeling and circuit-based simulation of photovoltaic arrays

Abstract: This paper presents an easy and accurate method of modeling photovoltaic arrays. The method is used to obtain the parameters of the array model using information from the datasheet. The photovoltaic array model can be simulated with any circuit simulator. The equations of the model are presented in details and the model is validated with experimental data. Finally, simulation examples are presented. This paper is useful for power electronics designers and researchers who need an effective and straightforward way to model and simulate photovoltaic arrays.

A General Equivalent Circuit Model for Piezoelectric Generators

Abstract: This article presents an equivalent circuit model for a piezoelectric generator which can include any number of vibrational modes. First the electromechanical equations are formulated using an assumed mode (for example, the Rayleigh-Ritz method), the mechanical equations are then decoupled by the standard eigenvector approach. A set of single degree of freedom equations are thus produced. The electromechanical coupling terms are modeled in the equivalent circuit using an ideal transformer, or a set of current-and voltage-dependent sources. To validate the equivalent circuit model, the results show excellent agreement with published analytical solutions for the first three vibration modes of a cantilever unimorph generator. The main advantage of the new method is that it can be used to simulate any circuit topology, for which there is no analytical solution, using a standard electronic simulation program. To demonstrate this, the analysis and design of a more complicated diode bridge circuit is presented.

Numerical Modeling of Thermoelectric Generators With Varing Material Properties in a Circuit Simulator

Abstract: When a thermoelectric generator (TEG) and its external load circuitry are considered together as a system, the codesign and co-optimization of the electronics and the device are crucial in maximizing the system efficiency. In this paper, an accurate TEG model is proposed and implemented in a SPICE-compatible environment. This model of thermoelectric battery accounts for all temperature-dependent characteristics of the thermoelectric materials to include the nonlinear voltage, current, and electrothermal coupled effects. It is validated with simulation data from the recognized program ANSYS and experimental data from a real thermoelectric device, respectively. Within a common circuit simulator, the model can be easily connected to various electrical models of applied loads to predict and optimize the system performance.

PCSIM: A Parallel Simulation Environment for Neural Circuits Fully Integrated with Python

Abstract: The Parallel Circuit SIMulator (PCSIM) is a software package for simulation of neural circuits. It is primarily designed for distributed simulation of large scale networks of spiking point neurons. Although its computational core is written in C++, PCSIM's primary interface is implemented in the Python programming language, which is a powerful programming environment and allows the user to easily integrate the neural circuit simulator with data analysis and visualization tools to manage the full neural modeling life cycle. The main focus of this paper is to describe PCSIM's full integration into Python and the benefits thereof. In particular we will investigate how the automatically generated bidirectional interface and PCSIM's object-oriented modular framework enable the user to adopt a hybrid modeling approach: using and extending PCSIM's functionality either employing pure Python or C++ and thus combining the advantages of both worlds. Furthermore, we describe several supplementary PCSIM packages written in pure Python and tailored towards setting up and analyzing neural simulations.

A Coupled Finite Element—Circuit Simulation Model for Analyzing Piezoelectric Energy Generators

Abstract: A coupled finite element method (FEM) and circuit simulation approach for analyzing piezoelectric energy harvesters is presented. The advantage of the proposed method is that the mechanical analysis of the generator can be done using available FEM packages, while the circuit analysis can be performed using standard circuit simulation software (e.g., SPICE). The electromechanical coupling between the two physical domains is achieved by applying equivalent piezoelectric loads in the mechanical model, and equivalent electrical voltages in the electric model. This approach allows for the modeling of complex mechanical geometries and sophisticated, non-linear circuits. The solutions of two example problems are presented: (1) a beam generator with a resistive load, which is compared to an existing analytical solution, and (2) a plate generator with a non-linear diode bridge circuit. Though relatively easy to implement, the explicit solution technique presented in this article can be computationally expensive fo...

Band-to-Band Tunneling Ballistic Nanowire FET: Circuit-Compatible Device Modeling and Design of Ultra-Low-Power Digital Circuits and Memories

Abstract: Band-to-band tunneling (BTBT) nanowire FETs have been studied as a possible successor to CMOS FETs. In the literature, it has already been shown that a 1-D p+-i- n+-type semiconductor nanowire governed by a BTBT transport mechanism offers a subthreshold swing lower than the conventional limit of 60 mV/dec while maintaining a reasonable on-state performance. The concept of BTBT nanowire FETs is primitive, and the manufacturing process is nascent. In the absence of a suitable device model and/or a reliable circuit simulator, the evaluation and impact of such novel transistors are difficult to estimate. In this paper, we propose a simple complementary device model for BTBT nanowire FETs suitable for multitransistor circuit simulation and evaluate its performance in the ballistic limit. The device models so developed have been used to simulate a class digital logic circuits and dynamic memories (e.g., DRAM) to analyze their suitability in future very large scale integration design. Circuit level simulations explicitly show that the proposed p+ -i-n+-type BTBT nanowire FETs are well suited for medium throughput (approximately hundreds of kilohertz to a few tens of megahertz) ultra-low-power applications. The standby leakage power in memory and logic circuits has been found to be as low as 10-20 W due to the inherent super cutoff nature of the device. The presence of interconnect parasitics in parallel with intrinsic device capacitance severely limits the performance of digital circuits. The impact of interconnect parasitics on the performance of BTBT nanowire FETs has also been studied.

Qucs: A GPL software package for circuit simulation, compact device modelling and circuit macromodelling from DC to RF and beyond

Abstract: The ‘Quite universal circuit simulator’ (Qucs) is an open source circuit simulator supporting Verilog-A compact model standardization. This paper describes a number of compact semiconductor device and circuit macromodelling techniques that have been implemented in recent Qucs releases, stressing those techniques that are not found in SPICE 2g6 or 3f5. It also introduces a novel hierarchical approach to Verilog-A compact model and circuit macromodel construction based on non-linear equation-defined devices, linear-controlled sources and noise generators embedded in subcircuits. To illustrate the new approach, the properties and models of a number of components with electrical and non-electrical characteristics are described. These models demonstrate how recent trends in open source simulation technology use embedded equations as integral elements in component and physical process models. Copyright © 2008 John Wiley & Sons, Ltd.

Computer Simulation Based Study of Photovoltaic Cells/Modules and their Experimental Verification

Abstract: A computer simulation based study of photovolatics cells/ modules using circuit simulator PSpice is presented in this paper. The PSpice is an analogoue/digital circuit simulator which calculates voltage and current in a circuit under variety of different circumstances. This feature of PSpice is used to simulate a circuit based model for PV cells/ modules and then to conduct behavioral study under varying conditions of solar insolation including shading effect, temperature, diode model parameters, series and shunt resistance etc. The study is very helpful in clearly outlining the principles and the intricacies of PV cells/modules and may surely be used to verify impact of different topologies and control techniques on the performance of different types of PV system. To put the simulation study on firm footing an experimental verification is also carried out in the Lab by developing a PC based data acquisition system, which is also briefly discussed here as subsidiary.

Power Electronics Design Laboratory Exercise for Final-Year M.Sc. Students

Abstract: This paper presents experiences and results from a project task in power electronics for students at Chalmers University of Technology, Goteborg, Sweden, based on a flyback test board. The board is used in the course Power Electronic Devices and Applications. In the project task, the students design snubber circuits, improve the control of the output voltage, improve the gate drive of the main MOSFET transistor and study the influence of stray inductance. The project goals (the circuit improvements) are given, but the procedure for solving the problems and obtaining the results is not specified. Instead the students have to make their own specification in order to reach the goals. ldquoToolsrdquo that are given to the students are the hardware, measurement equipment, an example of the circuit in the circuit simulation software PSpice, and lastly lectures covering the material needed in order to attain the project goals. The project design builds on the ideas from the CDIO (Conceive, Design, Implement, Operate) initiative, where students are encouraged to consider the complete process structure. The result found was a substantial engagement by the students, who had both positive and negative reactions. The negative reactions were mainly that the project specification was too vague, in other words in the (C=Conceive)-phase of the CDIO structure. Further, the teachers observed increased learning, which also was noticeable for the students performing their M.Sc. thesis within the power electronics design area. Finally, it was found that a final written exam is definitely still needed to assess students adequately in the course.

An Efficient Field-Circuit Coupling Based on a Temporary Linearization of FE Electrical Machine Models

Abstract: A field-circuit coupling method is presented, whose basic idea is to extract from the finite-element (FE) model a linearized lumped parameter representation of the electrical machines, to be used in the circuit simulator model of the power electronic supply. The dynamic coupled model of the complete drive obtained this way can be iterated over a limited period of time, with a time step adapted to the high frequency of electronic commutations. When the temporary representation of the machine has come, or is expected to have come under a given accuracy threshold, a new FE simulation is performed, a new set of lumped is generated and the process is repeated. This method allows decoupling the time constants of the field problem from that of the circuit problem, which is typically one or two orders of magnitude smaller. This yields a considerable saving of computation time with a controllable, at least a posteriori, loss of accuracy.

Accelerating SPICE Model-Evaluation using FPGAs

Abstract: Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SPICE model-evaluation. Model-evaluation is a key component of the SPICE circuit simulator and it is characterized by large irregular floating-point compute graphs. We show how to exploit the parallelism available in these graphs on single-FPGA designs with a low-overhead VLIW-scheduled architecture. Our architecture uses spatial floating-point operators coupled to local high-bandwidth memories and interconnected by a time-shared network. We retime operation inputs in the model-evaluation to allow independent scheduling of computation and communication. With this approach, we demonstrate speedups of 2–18×over a dual-core 3GHz Intel Xeon 5160 when using a XilinxVirtex 5 LX330T for a variety of SPICE device models.

A Novel Table-Based Approach for Design of FinFET Circuits

Abstract: A new lookup-table (LUT) approach, based on normalization of the drain current with an I D-V G template, is proposed for simulation of MOS transistor circuits. The LUT approach is validated by considering two examples and by comparing the LUT results with mixed-mode (device-circuit) simulation results. This approach is implemented in a circuit simulator and integrated, for the first time, with an optimizer to enable efficient design of circuits, particularly those involving novel technologies for which compact models are not fully developed. Three FinFET-based circuits are designed to demonstrate the effectiveness of the proposed environment. Furthermore, it is shown that the table-based platform can take into account variations in process, supply voltage, and temperature during the design.

High-Frequency Circuit Simulator: An Advanced Three-Dimensional Finite-Element Electromagnetic-Simulation Tool for Microwave Tubes

Abstract: A 3-D advanced specialized simulator for designing a microwave-tube slow-wave structure (SWS), called the high-frequency circuit simulator (HFCS), has been developed. It is one module of our recently developed microwave-tube simulator suite. The four major features of the HFCS are as follows: 1) Both the lower and higher order tetrahedral basis functions are applied in the finite-element analysis; 2) two kinds of periodic boundary-condition techniques are proposed, one of which dramatically reduces memory requirements and solution times; 3) the Arnoldi algorithm is modified to more efficiently solve the required generalized eigenmatrix equation; and 4) the postprocessing parameters of the SWS can precisely be computed with the tangential-vector finite-element method. Various numerical examples are solved using HFCS. The accuracy and the performance of the HFCS are compared with commercial software HFSS and CST MWS. It is found that the results from the HFCS agree well with the experimental values as well as the simulated values from the commercial software packages. Moreover, the HFCS takes far lesser solution time and requires lesser memory than the commercial software in the simulation of two examples of SWSs, enabling faster prototyping and more elaborate design optimizations.

Using Laboratory Experiments and Circuit Simulation IT Tools in an Undergraduate Course in Analog Electronics

Abstract: Laboratory-based courses play a significant role in engineering education. Given the role of electronics in engineering and technology, laboratory experiments and circuit simulation IT tools are used in their teaching in several academic institutions. This paper discusses the characteristics and benefits of both methods. The content and structure of an introductory laboratory course in analog electronics is described. The aim of the course is the better understanding of the basic principles of analog electronic circuits without the need of specific technical and computer skills. The impact of the proposed method on the learning process is investigated. The evaluation of our proposal was based on both quantitative and qualitative data. Interesting conclusions about the teaching of electronics in undergraduate education are finally drawn.

Advanced synthesis type aviation electronic simulation system and simulation method thereof

Abstract: The invention provides an advanced integrated aviation electric simulation system and a simulation method thereof. An integrated radio frequency system simulator, an integrated photoelectric system simulator, an integrated aerocraft management system simulator, and an external stores system simulator of the system simulate operation process of airborne equipment and generate stimulus information of the system; and aviation electric uniform network simulator of the system is responsible for the information flow of a transmission system, an integrated core process simulator is used for realizing the integration of received data and the calculation of received tasks, and a cockpit simulator is used for realizing the integrated display of the status of an aircraft, receiving a control direction from a pilot and monitoring display equipment to display the simulation process in the form of an image. The operation process of an aviation electric system is simulated by organically integrating the sub-systems, and quantitative simulation analysis of the aviation electric system is further completed. The method can simulate different airborne network topological structures, thereby having very good universality.

Rapid prototyping tool for electrical load emulation using power electronic converters

Abstract: Real-time control systems are relying increasingly on digital discrete-time implementations instead of analog continuous implementations. The foremost challenge in a real-time system is to perform computations within very stringent time frames. Power electronics control system is such a real-time system. This work is concerned with the issues of emulating different electrical loads using power electronic converters. A real-time circuit simulator has been designed to emulate loads at significant power levels. In this work the load model is defined using open source circuit simulator as a front-end interface and a DSP-FPGA platform to emulate them in the back-end. This paper presents requirements of real time control systems and describes the digital hardware structure for a load emulator. In order to highlight the performance of the proposed system, experimental results of virtual load (three phase induction motor) are reported.

Circuit Simulation with SPICE OPUS: Theory and Practice

Abstract: This book is the first complete guide to analog circuit design using the circuit simulator software package SPICE OPUS. Developed by the authors and used by academics and industry professionals worldwide, SPICE OPUS is an improved version of the well-known University of California at Berkeley circuit simulator SPICE3 that has been freely available online since 2000. Aimed at novices as well as professional circuit designers, the book is a unique combination of a basic guide to general analog circuit simulation and a SPICE OPUS software manual. All simulations as well as the free simulator software may be directly downloaded from the SPICE OPUS homepage: www.spiceopus.si. The book is divided into three parts: * Theory (Chapters 1 and 6): Includes a discussion of basic mathematical notions of circuit analysis, followed by specific algorithms implemented in SPICE OPUS. * Crash course (Chapters 2 and 7): Begins with a short installation guide and then moves quickly through a typical circuit simulation scenario, based on a simple example. The reader with some fundamentals in electrical engineering may continue with a number of complete simulation sessions presented in Chapter 7. * Reference guide (Chapters 3, 4, and 5): Describes all features of SPICE OPUS in a well-structured, methodical way, starting with input file syntax, followed by circuit analysis methods and the built-in scripting language (NUTMEG). Circuit Simulation with SPICE OPUS is intended for a wide audience of undergraduate and graduate students, researchers, and practitioners in electrical and systems engineering, circuit design, and simulation development. The book may be used as a textbook for an advanced undergraduate or graduate course on circuit simulation as well as a self-study reference guide for students and researchers alike.

An equivalent-circuit model for MEMS electrostatic actuator using open-source software Qucs

Abstract: We report an equivalent circuit model for MEMS (microelectromechanical systems) electrostatic actuator using open-source circuit simulator Qucs (quite universal circuit simulator). Electrostatic force, equation of motion, and Kirchhoff's laws are implemented by using the EDD (equation defined device) function of Qucs. Mathematic integral operation in the equation of motion is interpreted into electrical circuits by using an ideal electrical capacitor that read input signal as current and returns accumulation result in terms of voltage. Seamless multi-physics mixed signal simulation between micro mechanics and electronics has become possible on the single platform of the circuit simulator.

PEM fuel cell dynamic model for electronic circuit simulator

Abstract: This paper presents a PEM fuel cell dynamic modeling, to be employed with electronic circuit simulator software - PSIM. Simulations of the proposed model for the fuel-cell, supplying a step-up DC-DC converter are presented. Comparisons with existing models are also made. Practical results are presented in this paper for a Ballard 1.2kW Nexa Power Module for theoretical-experimental comparisons.

Accurate large signal analysis of a wideband helix TWT using Beam Wave Interaction Simulator

Abstract: Using Beam Wave Interaction Simulator (BWIS), one module of Microwave Tube Simulator Suite (MTSS), a wideband helix TWT has been accurately simulated. The slow-wave circuit parameters are calculated by High Frequency Circuit Simulator.

3D circuit model for 3D IC reliability study

Abstract: 3D integrated circuit technology is an emerging technology for the near future, and has received tremendous attention in the semiconductor community. With the 3D integrated circuit, the temperature and thermo-mechanical stress in the various parts of the IC are highly dependent on the surrounding materials and their materials properties, including their thermal conductivities, thermal expansivities, Young modulus, poisson ratio etc. Also, the architectural of the 3D IC will also affect the current density, temperature and thermo-mechanical stress distributions in the IC. In view of the above-mentioned, the electrical-thermal-mechanical modeling of integrated circuit can no longer be done with a simple 2D model. The distributions of the current density, temperature and stress are important in determining the reliability of an IC. In this work, we demonstrate a method of converting 2D circuit layout into a 3D model. Simulations under real circuit operating condition are carried out using both Cadence (a circuit simulator) and ANSYS (finite element tool). Limiting our study to the electromigration failure, we compute the current density, temperature and stress distributions of the interconnect layers by considering the heat transfer and Joule heating, and the “weak spot” for electromigration is identified. Layout design can be modified based on the simulation results so as to enhance the 3D circuit interconnect reliability.

DESA: a new hybrid global optimization method and its application to analog integrated circuit sizing

Abstract: This paper presents a new hybrid global optimization method referred to as DESA. The algorithm exploits random sampling and the metropolis criterion from simulated annealing to perform global search. The population of points and efficient search strategy of differential evolution are used to speed up the convergence. The algorithm is easy to implement and has only a few parameters. The theoretical global convergence is established for the hybrid method. Numerical experiments on 23 mathematical test functions have shown promising results. The method was also integrated into SPICE OPUS circuit simulator to evaluate its practical applicability in the area of analog integrated circuit sizing. Comparison was made with basic simulated annealing, differential evolution, and a multistart version of the constrained simplex method. The latter was already a part of SPICE OPUS and produced good results in past research.

A Methodology to Predict the Impact of Substrate Noise in Analog/RF Systems

Abstract: Substrate noise problems in a system-on-a-chip hamper the smooth cohabitation between analog and digital circuitries on the same die. Solving those problems will shorten the time to market. This paper presents a methodology that gives designers the necessary insight to solve this substrate noise problem. The methodology combines the strengths of the electromagnetic simulator, the parasitic extractor, and the circuit simulator. Its main assets are the ease of use, an acceptable simulation time, and a good accuracy. Moreover, this methodology does not need doping profiles that are hard to get hold off. The proposed methodology is demonstrated on two challenging examples: a 48-53-GHz LC voltage-controlled oscillator and a dc-to-5-GHz wideband receiver designed, respectively, in a 0.13-mum and a 90-nm CMOS technology. The substrate noise coupling mechanisms are revealed for both examples in a simulation time of less than 2 hours. The methodology is successfully validated by measurements performed on real-life prototypes of those examples with an accuracy of 1-2 dB.

Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing

Abstract: Modern advances in reconfigurable technologies are allowing analog circuit designers to benefit from the computational flexibility provided by large-scale field-programmable analog arrays. With the component density of these devices, small analog circuits, as well as larger analog systems, can be synthesized and tested in a shorter time and at a lower cost, compared with the full design cycle. However, automated development platforms and computer-aided design tools for these devices are far fewer than the physical synthesis tools for their digital counterparts. One of the major reasons for this is the considerably higher impact of interconnect parasitics on circuit functionality in the analog domain; therefore, performance optimization must be recognized as an indispensable step of the analog physical synthesis flow. Our goal in this brief is to present a physical synthesis framework with an optimization core and an integrated simulation environment for verification of the synthesis results. Although SPICE has been used as the simulation tool for our experiments, there is no dependency on a particular circuit simulator. Our synthesis tool currently accepts SPICE netlists as input and gives priority to user-specified metrics when optimizing the synthesized circuit performance. Experimental results demonstrate the effectiveness of our approach.

An educational tool for power electronics circuits

Abstract: In this study, an educational tool has been prepared for a shorter term and more economic education of power electronics circuits. In parallel with the improvements of semiconductor technology, the development of power electronics circuits has magnified the importance of either teorical or practical education of power electronics course. The education of power electronic circuits in laboratory is an agelong, costly piece of work. In this study, to overcome the mentioned negativities, a tool has been prepared for the education of power electronic circuits. The tool, which has been prepared on C++ Builder environment has a flexible structure and a graphical interface. It has enabled the analysis of working principles of the circuits and traceability of the system response by the help of graphics, under different conditions created by changing the values of circuit elements. © 2009 Wiley Periodicals, Inc. Comput Appl Eng Educ 18: 157–165, 2010; Published online in Wiley InterScience (www.interscience.wiley.com); DOI 10.1002/cae.20237

An efficient neural network approach for nanoscale FinFET modelling and circuit simulation

Abstract: The present paper demonstrates the suitability of artificial neural network (ANN) for modelling of a FinFET in nano-circuit simulation. The FinFET used in this work is designed using careful engineering of source–drain extension, which simultaneously improves maximum frequency of oscillation ƒmax because of lower gate to drain capacitance, and intrinsic gain AV0 = gm-gds, due to lower output conductance gds. The framework for the ANN-based FinFET model is a common source equivalent circuit, where the dependence of intrinsic capacitances, resistances and dc drain current Id on drain–source Vds and gate–source Vgs is derived by a simple two-layered neural network architecture. All extrinsic components of the FinFET model are treated as bias independent. The model was implemented in a circuit simulator and verified by its ability to generate accurate response to excitations not used during training. The model was used to design a low-noise amplifier. At low power (Jds∼10 µA-µm) improvement was observed in both third-order-intercept IIP3 (∼10 dBm) and intrinsic gain AV0 (∼20 dB), compared to a comparable bulk MOSFET with similar effective channel length. This is attributed to higher ratio of first-order to third-order derivative of Id with respect to gate voltage and lower gds in FinFET compared to bulk MOSFET. Copyright © 2009 John Wiley & Sons, Ltd.