Electronic packaging

About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.

Six cases of reliability study of Pb-free solder joints in electronic packaging technology

Abstract: Solder is widely used to connect chips to their packaging substrates in flip chip technology as well as in surface mount technology. At present, the electronic packaging industry is actively searching for Pb-free solders due to environmental concern of Pb-based solders. Concerning the reliability of Pb-free solders, some electronic companies are reluctant to adopt them into their high-end products. Hence, a review of the reliability behavior of Pb-free solders is timely. We use the format of “case study” to review six reliability problems of Pb-free solders in electronic packaging technology. We conducted analysis of these cases on the basis of thermodynamic driving force, time-dependent kinetic processes, and morphology and microstructure changes. We made a direct comparison to the similar problem in SnPb solder whenever it is available. Specifically, we reviewed: (1) interfacial reactions between Pb-free solder and thick metalliztion of bond-pad on the substrate-side, (2) interfacial reactions between Pb-free solder and thin-film under-bump metallization on the chip-side, (3) the growth of a layered intermetallic compound (IMC) by ripening in solid state aging of solder joints, (4) a long range interaction between chip-side and substrate-side metallizations across a solder joint, (5) electromigration in flip chip solder joints, and finally (6) Sn whisker growth on Pb-free finish on Cu leadframe. Perhaps, these cases may serve as helpful references to the understanding of other reliability behaviors of Pb-free solders.

Recent advances of conductive adhesives as a lead-free alternative in electronic packaging: Materials, processing, reliability and applications

Abstract: Tin–lead solder alloys are widely used in the electronic industry. They serve as interconnects that provide the conductive path required to achieve connection from one circuit element to another. There are increasing concerns with the use of tin–lead alloy solders in recognition of hazards of using lead. Lead-free solders and electrically conductive adhesives (ECAs) have been considered as the most promising alternatives of tin-lead solder. ECAs consist of a polymeric resin (such as, an epoxy, a silicone, or a polyimide) that provides physical and mechanical properties such as adhesion, mechanical strength, impact strength, and a metal filler (such as, silver, gold, nickel or copper) that conducts electricity. ECAs offer numerous advantages over conventional solder technology, such as environmental friendliness, mild processing conditions (enabling the use of heat-sensitive and low-cost components and substrates), fewer processing steps (reducing processing cost), low stress on the substrates, and fine pitch interconnect capability (enabling the miniaturization of electronic devices). Therefore, conductive adhesives have been used in liquid crystal display (LCD) and smart card applications as an interconnect material and in flip–chip assembly, chip scale package (CSP) and ball grid array (BGA) applications in replacement of solder. However, no currently commercialized ECAs can replace tin–lead metal solders in all applications due to some challenging issues such as lower electrical conductivity, conductivity fatigue (decreased conductivity at elevated temperature and humidity aging or normal use condition) in reliability testing, limited current-carrying capability, and poor impact strength. Considerable research has been conducted recently to study and optimize the performance of ECAs, such as electrical, mechanical and thermal behaviors improvement as well as reliability enhancement under various conditions. This review article will discuss the materials, applications and recent advances of electrically conductive adhesives as an environmental friendly solder replacement in the electronic packaging industry.

A review of 3-D packaging technology

Abstract: This paper reviews the state-of-the-art in three-dimensional (3-D) packaging technology for very large scale integration (VLSI). A number of bare dice and multichip module (MCM) stacking technologies are emerging to meet the ever increasing demands for low power consumption, low weight and compact portable systems. Vertical interconnect techniques are reviewed in detail. Technical issues such as silicon efficiency, complexity, thermal management, interconnection density, speed, power etc. are critical in the choice of 3-D stacking technology, depending on the target application, and are briefly discussed.

Electronic Packaging and Interconnection Handbook

Abstract: Table of contents CONTRIBUTORS PREFACE Chapter 1: Plastics, Elastomers, and Composites Chapter 2: Adhesives, Underfills, and Coatings Chapter 3: Thermal Management Chapter 4: Connector and Interconnection Technology Chapter 5: Solder Technologies for Electronic Packaging and Assembly Chapter 6: Packaging and Interconnection of Integrated Circuits Chapter 7: Hybrid Microelectronics and Multichip Modules Chapter 8: Chip Scale, Flip Chip, and Advanced Chip Packaging Technologies Chapter 9: Rigid and Flexible Printed Circuit Board Technology Chapter 10: Packaging of High-Speed and Microwave Electronic Systems INDEX