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Electronic packaging

About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.


Papers
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Journal ArticleDOI
TL;DR: In this paper, the thermal analysis for a 1200 A, 33 kV IGBT (Insulated Gate Bipolar Transistor) module has been announced at two levels, module and system level, for the module level analysis, the thermal of the IGBT module was investigated and analysed using the 3D-TLM method.

24 citations

Journal ArticleDOI
TL;DR: A system-level packaging architecture based on a modified folded 4f imaging system that has been implemented with only off-the-shelf optics, conventional electronic packaging, and passive-assembly techniques to yield a potentially low-cost and manufacturable packaging solution.
Abstract: We present a proof of concept and a feasibility demonstration of a practical packaging approach in which free-space optical interconnects (FSOI's) can be integrated simply on electronic multichip modules (MCM's) for intra-MCM-board interconnects. Our system-level packaging architecture is based on a modified folded 4f imaging system that has been implemented with only off-the-shelf optics, conventional electronic packaging, and passive-assembly techniques to yield a potentially low-cost and manufacturable packaging solution. The prototypical system as built supports 48 independent FSOI channels with 8 separate laser and detector chips, for which each chip consists of a one-dimensional array of 12 devices. All the chips are assembled on a single substrate that consists of a printed circuit board or a ceramic MCM. Optical link channel efficiencies of greater than 90% and interchannel cross talk of less than -20 dB at low frequency have been measured. The system is compact at only 10 in.3 (25.4 cm3) and is scalable, as it can easily accommodate additional chips as well as two-dimensional optoelectronic device arrays for increased interconnection density.

24 citations

Proceedings ArticleDOI
01 Nov 2004
TL;DR: In this article, the authors proposed two plausible methods to integrate high-thermal conductive nanotubes with existing microchannel coolers for enhancement in cooling capability, and the theoretical part consists of a preliminary numerical study to determine the highest possible heat transfer capability.
Abstract: Providing effective and compact heat removal solutions is an essential element of the electronics packaging approach and its importance increases as the trend in the electronics industry moves towards higher packaging density and more severe operation conditions. Many new thermal removal techniques have been developed in response to this situation, among which microchannel liquid cooling systems have been considered as one of the very promising cooling solutions. Its major advantage includes the high heat transfer coefficient and possible wafer-level integration with chips. However, the high-pressure drop associated with microchannel flow prevents it to be employed in a fluid loop with micro-pump due to the pumping power limit. Enhancing the thermal exchange rate between substrate and coolant is a straightforward method to overcome this problem. The present work proposes two plausible methods to integrate high-thermal conductive nanotubes with existing microchannel coolers for enhancement in cooling capability. The first one is to replace the silicon fins with nanotube fins. Since nanotubes have extremely high thermal conductivity, the pin-to-coolant temperature difference can increase further and more heat can be transferred to the coolant. The second method is to grow aligned nanotubes on the whole thermal exchange surface of the groove where the coolant flows. Each nanotube stands separately and acts as a tiny pin, which dramatically increases the thermal exchange area. The theoretical part consists of a preliminary numerical study to determine the highest possible heat transfer capability of the nanotube enhanced microchannel cooler and how its performance is affected by geometrical parameters like channel width and length.

24 citations

Journal ArticleDOI
TL;DR: In this paper, a full-wave modeling procedure was developed to simulate the package, bonding wires, and MOS capacitors used in the design of matching networks found within RF/microwave power transistors.
Abstract: A full-wave modeling procedure was developed to simulate the package, bonding wires, and MOS capacitors used in the design of matching networks found within RF/microwave power transistors. The complex packaging environment was segmented into its constituent components and simulation techniques were developed for each component, as well as the inter-element coupling. An S-parameter test fixture and package was developed that permits measurements of these types of devices. The simulation and measurement procedures were used to model various circuits. Measured S-parameters and those obtained using the full-wave methodology were in good agreement. Simulation results using an inductance-only bonding-wire model were performed and differences between the S-parameters were observed. A detailed examination of the loss introduced by the matching network was performed and simulations and measurements matched closely.

24 citations

Proceedings ArticleDOI
M.F. Dautartas1, J. Fisher1, Hui Luo1, Proyag Datta1, A. Jeantilus1 
07 Aug 2002
TL;DR: In this paper, the use of silicon optical bench as a platform is used to address manufacturability both in free space optics and guided wave optics, where numerical and closed-form simulations are used extensively to model the optical, thermal, and mechanical performance of the package design.
Abstract: Currently, a disproportionate amount of optical module costs is attributable to the packaging and testing operations.. Consequently, future products will require significant design and manufacturing improvements to overcome these cost barriers. Optical packaging from a macroscopic viewpoint can be reduced to a few principal challenges, namely optical coupling efficiencies, bonding technologies (including hermeticity), thermal management, electrical performance, an manufacturability, which entails the ease of assembly and amenability to automation. These challenges are common whether the optical systems are free space or guided wave optical packages. We address optical efficiencies, thermal management, bonding and manufacturability. The use of silicon optical bench as a platform is used to address manufacturability both in free space optics and guided wave optics. Passive alignment enables submicron accuracies and reduces the over-all assembly steps while reducing assembly complexity. Numerical and closed form simulations are used extensively to model the optical, thermal, and mechanical performance of the package design.

23 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202331
202293
202160
2020102
2019114
201896