Electronic packaging

About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.

Selective low temperature microcap packaging technique through flip chip and wafer level alignment

Abstract: In this study, a new technique of selective microcap bonding for packaging 3-D MEMS (Micro Electro Mechanical Systems) devices is presented. Microcap bonding on a selected area of the host wafer was successfully demonstrated through flip chip and wafer level alignment. A passivation treatment was developed to separate the microcap from the carrier wafer. A thick metal nickel (Ni) microcap was fabricated by an electroplating process. Its stiffness is superior to that of thin film poly-silicon made by the surface micromachining technique. For the selective microcap packaging process, photo definable materials served as the intermediate adhesive layer between the host wafer and the metal microcap on the carrier wafer. Several types of photo definable material used as the adhesive layer were tested and characterized for bonding strength. The experimental result shows that excellent bonding strength at low bonding temperature can be achieved.

Measurement of Moisture-Induced Packaging Stress With Piezoresistive Sensors

Abstract: Moisture is one of the major contributing factors in fracture and reliability issues for microelectronic packaging. To characterize the moisture-induced stress distribution inside the packaging structure, an in situ, quantitative, and nondestructive experimental methodology is needed. This paper proposes the use of piezoresistive sensors to measure moisture-induced stress in a plastic low profile, fine pitch, ball grid array (LFBGA) packaging. The measurements include hygroscopic swelling stress extractions and real-time stress monitoring of the popcorn phenomenon, and the results associated with gravimetric analyses are reported. Postreflow scanning acoustic microscope (SAM) inspection results and cross section observations are used as experimental verification. Comparing with thermal stresses previously measured on the same package, it is found that the hygroscopic mismatch stress is significant and important for package engineers. In addition, piezoresistive sensors were proven useful in this work for recording popcorn occurrence and monitoring the stress drops at the popcorn initiation.

New efficient method of modeling electronics packages with layered power/ground planes

Abstract: The modeling of electrical performances of electronics packages is very important for the design of advanced packaging technology. However, it is also one of the most difficult tasks. This paper introduces a new efficient boundary integral equation technique for the modeling of electromagnetic fields in electronics packages. This approach dramatically reduces the computation requirement and can be conveniently integrated with circuit solvers. Skin-effect loss from the metal planes, dielectric loss from the substrate, together with the nonperfect reflections from the perimeter of planes and their frequency-dependent characteristics can all be taken into account. Correlation performed on test printed circuit boards shows good agreement between the measurement and the numerical results up to several GHz.

Defect Detection of Flip Chip Solder Bumps With Wavelet Analysis of Laser Ultrasound Signals

Abstract: Microelectronics packaging technology has evolved from through-hole and bulk configuration to surface-mount and small-profile ones. In surface mount packaging, such as flip chips, chip scale packages, and ball grid arrays, chips/packages are attached to the substrates/printed wiring board (PWB) using solder bump interconnections. Solder bumps hidden between the chips/packages and the substrate/board are no longer visible for inspection. A novel solder bump inspection system has been developed using laser ultrasound and interferometer techniques. This system has been successfully applied to detect solder bump defects including missing, misaligned, open, and cracked solder bumps in flip chip packages, chip scale packages and land grid arrays. The system uses a pulsed Nd:YAG laser to induce ultrasound in the thermoelastic regime and the transient out-of-plane displacement response in nanometer scale on the package surface is measured using the interferometer technique. In this paper, wavelet analysis of laser ultrasound signals is presented and compared to previous signal processing methods, such as error ratio and correlation coefficient. The results show that wavelet analysis increases measurement sensitivity for inspecting solder bumps in electronic packages. Laser ultrasound inspection results are also compared to X-ray results. In particular, this paper discusses defect detection for a 6.35 mm × 6.35 mm × 0.6 mm PB18 flip chip package and flip chip package (?SiMAF?) with 24 lead-free solder bumps. These two types of flip chip specimens are both nonunderfilled.

Reliability of Novel Ceramic Encapsulation Materials for Electronic Packaging

Abstract: Enhancements on power electronic systems with reduced chip area and miniaturized passive components are subject of several research activities in academics and industry. To realize such fu...