Electronic packaging

About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.

Thermal Expansion Mismatch in Electronic Packaging

Abstract: Thermal expansion mismatch causes serious problems in operating device reliability because of the various stresses imposed on the joint materials undergoing temperature changes. Silicon has a low expansion coefficient so strain buffers are often employed between the silicon and the outer metal covers with relatively high expansion coefficients. These buffers can be metals like molybdenum, ceramics like alumina, or a brush structure of copper, with soft solders at the joints. However, solders themselves have finite fatigue lives which can be estimated from material and dimensional data.

Method for interconnecting and packaging 3-D multi-chip module

Abstract: The invention discloses a 3D multichip module (MCM) interconnecting and packaging method, adopting ceramic bushing stacked transition wiring substrate to interconnect and package MCM stacked module, reducing system bulk and weight by various high density assembly to adapt to the development requirements of weapon equipment for miniaturization, high performance, multifunction, high reliability and low cost of electronic systems, converting the electronic packaging concept from device orientation into system orientation, thus increasing operational rate, assembling efficiency and heat radiating ability on the premise of assuring reliability and besides, increasing I/O number, reducing size and weight and cost. And the technical indexes of computer miniaturization by the method: operating frequency 25Mhz; connecting point number per unit area >or=104/dm2; thermal resistance <0.45DEG C/W; I/O number 256; underfilling distance 30mm; and assembling efficiency 121%.

Electronic packaging and passive devices for low temperature space applications

Abstract: In addition to the challenges of cold operation for active devices, passive devices and packaging materials exhibit changes in electrical behavior as a function of temperature. Results on the temperature dependent behavior of capacitors and substrate materials as a function of temperature and frequency to −185°C will be discussed. These properties may further change if the materials exhibit degradation due to mechanical loading. Whether the electronics are intended to operate at cold temperatures or simply survive exposure to cold temperatures, the packaging technologies between the electronics and the outside world are required to survive multiple extreme low temperature cycles, which combine the challenges of cold temperature exposure and fatigue at low temperatures. To that end, the impact of extreme low temperatures on the mechanical behavior of various key electronic packaging materials will be discussed along with experimental results obtained from several representative assemblies that have been thermally cycled or shock cycled down to −120°C or lower.

Integration of vapor deposited polyimide into a multichip module packaging process

Abstract: We report the first full integration of a vapor-deposited polyimide dielectric into a multichip module (MCM) electronic packaging scheme. A robust high-throughput vapor deposition polymerization (VDP) of polyimide has been developed for an interconnection scheme in which thin film metal interconnects are patterned from the top of bare die, down the sides, and onto the substrate circuit board surface. VDP polyimides films have been extensively characterized using infrared spectroscopy and prism coupling techniques. The chemical and electrical properties of the VDP polyimide films are similar to commercially available spin cast polyimides.

Virtual thermo-mechanical prototyping of electronic packaging using Philips optimization strategy

Abstract: This paper presents part of our research and development results for virtual thermo-mechanical prototyping of electronic packaging. Philips' optimization strategy focuses on the development of reliable Response Surface Models (RSM) for the underlying nonlinear response is demonstrated. This strategy is especially suitable for virtual design prototyping, in which adaptive (sequential) Design Of Experiment (DOE) methodologies are integrated with advanced RSM methods. Once the RSM has satisfied the specified accuracy criteria, design optimization can be conducted efficiently. The demonstrator presented in this paper shows that integration of reliable nonlinear FEM-based simulation models with the Philips optimization method is an effective and efficient method for virtual thermo-mechanical prototyping of electronic packaging.