Topic
Electronic packaging
About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.
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TL;DR: When the need for high frequency combines with the demand for low-cost consumer electronics, the challenge of ensuring correctly functioning components becomes paramount and focusing on chip-package codesign offers a solution.
Abstract: When the need for high frequency combines with the demand for low-cost consumer electronics, the challenge of ensuring correctly functioning components becomes paramount. Focusing on chip-package codesign offers a solution.
12 citations
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TL;DR: In this article, a comparison of elliptical/round pads of area array type packages has been studied for soldering, reliability, and wireability requirements, and a three-dimensional solder liquid formation model is developed for predicting the geometry, the restoring force, the wireability, and the reliability of solder joints in an area array-type interconnections under elliptical and round pad configurations.
Abstract: As electronic packaging technology moving to the CSP, wafer level packaging, fine pitch BGA (ball grid array) and high density interconnections, the wireability of the PCB/ substrate and soldering technology are as important as reliability issues. In this work, a comparison of elliptical/round pads of area array type packages has been studied for soldering, reliability, and wireability requirements. The objective of this research is to develop numerical models for predicting reflow shapes of solder joint under elliptical/ round pad boundary conditions and to study the reliability issue of the solder joint. In addition, a three-dimensional solder liquid formation model is developed for predicting the geometry, the restoring force, the wireability, and the reliability of solder joints in an area array type interconnections (e.g., ball grid array, flip chip) under elliptical and round pad configurations. In general, the reliability of the solder joints is highly dependent on the thermal-mechanical behaviors of the solder and the geometry configuration of the solder ball. These reliability factors include standoff height/contact angle of the solder joint, and the geometry layout/material properties of the package. An optimized solder pad design cannot only lead to a good reliability life of the solder joint but also can achieve a better wireability of the substrate. Furthermore, the solder reflow simulation used in this study is based on an energy minimization engine called Surface Evolver and the finite element software ABAQUS is used for thermal stress/strain nonlinear analysis. @DOI: 10.1115/1.1339196#
12 citations
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TL;DR: In this paper, a method is described whereby SiC preforms may be infiltrated in air by a molten aluminum alloy to yield a metal matrix composite with thermal expansion coefficients that are suitable or electronic packaging, such as in microwave integrated circuits.
Abstract: A method is described whereby SiC preforms may be infiltrated in air by a molten aluminum alloy to yield a metal matrix composite with thermal expansion coefficients that are suitable or electronic packaging, such as in microwave integrated circuits. Crucible geometries and infiltration conditions may be designed to provide inexpensive and reusable containers and useful section thicknesses in \sim 1 hr. Intricate geometries may be fabricated in the green state of the ceramic, prior to infiltration, thereby minimizing final machining of the composite.
12 citations
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TL;DR: In this article, a novel super-repellent dual-layer coating (SDC) has been fabricated via plasma-induced high temperature liquid-phase assisted oxidation and deposition technique, based on the optimal adjustment of organic-inorganic multilayer structure, a thin polymer-like layer with hierarchical structures was constructed on the Al2O3 ceramic bottom skeleton, endowing the coating with multiple heat dissipation and mechanochemical robustness.
12 citations