Electronic packaging

About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.

Warpage measurement comparison using shadow moire and projection moire methods

Abstract: Microelectronic and photonic packaging are progressing toward integrating more devices with more functions into a smaller confined space, while requiring higher yield and superior reliability. New electronic components, materials, fabrication processes, and configurations are emerging to achieve these goals. As expected, surface flatness is playing a more crucial role in integrated circuits and integrated optics manufacturing. Out-of-plane displacement (warpage) is a global effect of interfacial stress and displacement. It is also the cause of mis-registration and non-contact between components and their substrates. Moire methods offer noncontact, full-field, high-resolution approaches for measuring warpage. In this paper, two types of moire methods are introduced and analyzed. They carry distinct features and grant more options to measure warpage under various scenarios. It has been shown through system analysis and experimental results that these systems are powerful tools for studying warpage mechanisms. Specifically, they can help to investigate the effects of materials, manufacturing processes, and packaging configurations on warpage.

Packaging of MMICs in multilayer LCP substrates

Abstract: A 13-25-GHz GaAs bare die low noise amplifier is embedded inside a multilayer liquid crystal polymer (LCP) package made from seven layers of thin-film LCP. This new packaging topology has inherently unique properties that could make it an attractive alternative in some instances to traditional metal and ceramic hermetic packages. LCP is a near-hermetic material and its lamination process is at a relatively low temperature (285degC versus >800degC for ceramics). The active device is enclosed in a package consisting of several laminated C02 laser machined LCP superstrate layers. Measurements demonstrate that the LCP package and the 285degC packaging process have minimal effects on the monolithic microwave integrated circuit radio frequency (RF) performance. These findings show that both active and passive devices can be integrated together in a homogeneous laminated multilayer LCP package. This active/passive compatibility demonstrates a unique capability of LCP to form compact, vertically integrated (3-D) RF system-on-a-package modules

Determination of an effective coefficient of thermal expansion of electronic packaging components: a whole-field approach

Abstract: Moire interferometry is proposed as a tool for the coefficient of thermal expansion (CTE) measurement of electronic packaging components. The method is a whole-field displacement measurement technique with a sub-micron sensitivity, which can produce the overall CTE and the local CTE across the entire component with high accuracy. The large dynamic range of the method makes it compatible with CTE evaluation of a broad range of components. Two experimental procedures are suggested for 1) CTE over a fixed temperature range and 2) CTE as a function of temperature. The procedures are implemented for various thin small outline packages (TSOPs) a plastic ball grid array (PBGA) package, and a stacked memory cube. The results emphasize the importance of a whole-field measurement technique. A supplementary thermo-mechanical analyzer (TMA) test on an aluminum alloy is conducted and the results are compared with a Moire measurement to discuss the accuracy of the proposed measurement procedure.

Thermal interface material and heat sink configuration

Abstract: A thermal interface material for use in electronic packaging, the thermal interface material comprises a solder with relatively high heat flow characteristics and a CTE modifying component to reduce or prevent damage due to thermal cycling. The thermal interface material comprises an active solder that contains indium and an intrinsic oxygen getter selected from the group consisting of alkali metals, alkaline-earth metals, refractory metals, rare earth metals and zinc and mixtures and alloys thereof. Lastly, damage due to an electronic package due to thermal cycling stress is reduced by using an insert in a lid of an electronic device package wherein the insert has a coefficient of thermal expansion that is between about that of the lid and about that of a semiconductor substrate.

Ultrasonic Bonding for MEMS Sealing and Packaging

Abstract: The feasibility of ultrasonic bonding for hermetic microelectromechanical systems (MEMS) packaging has been demonstrated utilizing the solid phase vibration and welding process to bond two elements rapidly at low temperature. Two different approaches have been developed including lateral and vertical ultrasonic bonding setups with three sets of material bonding systems: In-to-Au, Al-to-Al, and plastics-to-plastics. The process utilizes purely mechanical vibration energy to enable low temperature bonding between similar or dissimilar materials without precleaning of the bonding surfaces. In these prototype demonstrations, the typical bonding process used tens of watts at room temperature environment and the bonds were accomplished within seconds for bonding cavities with areas of a few mm2 . Preliminary tests show that packaged MEMS cavities can survive gross leakage tests by immersing the bonded chip into liquids. As such, ultrasonic bonding could potentially be broadly applied for hermetic MEMS sealing and packaging especially where temperature limitation is a critical issue. Ultrasonic polymeric bonding could be applied for capping polymer-based microfluidic chips. This paper describes the ultrasonic bonding and hermetic sealing processes as well as the characterizations of bonding tools and equipment setups.