Topic
Electronic packaging
About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.
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TL;DR: The state of the art of electronic packaging design more and more requires direct coupling between simulation tools (including e.g. FE modeling) and advanced physical experiments as discussed by the authors. But, since there is usually a lack of information about the local material parameters, a pure field simulation cannot, as a rule, solve the problem.
43 citations
TL;DR: In this paper, a dielectric, chip-scale MEMS packaging method using wafer-to-wafer bonding of micromachined glass wafers with a reflowed, glass, sealing ring is discussed.
Abstract: A dielectric, chip-scale MEMS packaging method is discussed. The packaging method uses wafer-to-wafer bonding of micromachined glass wafers with a reflowed, glass, sealing ring. The glass wafers are micromachined and have metal and silicon structures patterned on them with metal and fluidic feedthroughs. A variety of getters and sealing designs are disclosed to vary the pressure of the microcavity by many orders of magnitude from under 1 mTorr up to 1 atm (760 000 mTorr), enabling either vacuum or damped packaging of the device elements on the same chip. The final singulated, all-glass, chip-scale package can have electrical, optical/IR and fluidic interfaces. Applications for resonators, switches, optical sensors and displays are discussed.
43 citations
IBM1
TL;DR: In this article, alternating and direct electric currents are applied through the metal interconnections in electronic packaging to detect potential electrical opens, such as line narrowings, notches, nicks, cracks, weak connections, and interface contaminations.
Abstract: Alternating and direct electric currents are applied through the metal interconnections in electronic packaging to detect potential electrical opens, such as line narrowings, notches, nicks, cracks, weak connections, and interface contaminations. Due to the nonlinear relationship between the voltage across and current through the metal conductor, distorted signals are generated by the defect region as well as the good conductor. The signal generated from a latent open defect can be detected by comparing the defect signal phase with the reference phase produced by the good conductor. Application of this technique to electronic packaging development and manufacturing can improve product reliability and reduce cost by early detection of latent open defects. >
43 citations
43 citations
05 Jul 2006
TL;DR: In this article, the thermal deformation measurement of a solder joint in a BGA (ball grid array) package is also demonstrated and proper measures are introduced to minimize the noise level.
Abstract: Thermal-mechanical behavior of materials and reliability assessment of semiconductor packages are two of key issues in electronic packaging. Digital image correlation method is increasingly used for thermal deformation characterization in electronic packaging in recent years. For example, the deformation measurements of solder joints in various semiconductor packages have been reported in previous studies. However, the noise effects on measurement accuracy under thermal loading conditions have been less evaluated. When acquiring images of a specimen subjected to thermal loading in a chamber with glass window, the influences of the computer vision system, specimen surface condition, out-of-plane deformation and rigid body translation and rotation are required to be addressed. In this paper, such critical factors are evaluated during the calibration of a digital image correlation system. Proper measures are introduced to minimize the noise level. The thermal deformation measurement of a solder joint in a BGA (ball grid array) package is also demonstrated
43 citations