Topic
Electronic packaging
About: Electronic packaging is a research topic. Over the lifetime, 3977 publications have been published within this topic receiving 48510 citations.
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TL;DR: In this paper, double and triple-layered Anisotropic Conductive Films (ACF) were developed to meet fine pitch interconnection, low-temperature curing and strong adhesion requirements.
Abstract: Electrically Conductive Adhesives (ICAs: Isotropic Conductive Adhesives; ACAs: An-isotropic Conductive Adhesives; and NCAs: Non-conductive Adhesives) offer promising material solutions for fine pitch interconnects, low cost, low-temperature process and environmentally clean approaches in the electronic packaging technology. ICAs have been developed and used widely for traditional solder replacement, especially in surface mount devices and flip chip application. These also need to be lower cost with higher electrical/mechanical and reliability performances. ACAs have been widely used in flat panel display modules for high resolution, lightweight, thin profile and low power consumption in film forms (Anisotropic Conductive Films: ACFs) for last decades. Multi-layered ACF structures such as double and triple-layered ACFs were developed to meet fine pitch interconnection, low-temperature curing and strong adhesion requirements. Also, ACAs have been attracting much attention for their simple and lead-free proc...
142 citations
01 Jan 1985
TL;DR: The proceedings of the Symposium on electronic packaging materials science as discussed by the authors included overviews as well as papers which addressed levels of packaging and interconnection technologies for electronic systems are becoming an increasingly important part of these systems in terms of their cost, functionality, and complexity.
Abstract: This volume is the proceedings of the symposia on electronic packaging materials science. The symposium included overviews as well as papers which addressed levels of packaging. The packaging and interconnection technologies for electronic systems are becoming an increasingly important part of these systems in terms of their cost, functionality, and complexity. This trend is being driven by system trends toward higher density, higher speed, and higher thermal dissipation. The nature of these trends, and their impact on the demands placed on the materials are covered. New processes for depositing, etching and promoting interfacial adhesion are described. Particular materials issues associated with interconnection on the IC, from the IC to its package and between ICs are covered. The authors have dealt with issues particular to the packaging of Ga As and optoelectronic circuits.
142 citations
TL;DR: In this article, the experimental analysis of commercially available variable-capacitance MEMS accelerometers, characterized under standardized tests, is presented, which provides an insight to advantages and disadvantages for using a particular mechanical design, fabrication technology, sensor material and the techniques for electronics integration and packaging of each specific sensor design.
Abstract: This paper reports the experimental analysis of commercially available variable-capacitance MEMS accelerometers, characterized under standardized tests. Capacitive MEMS sensors of the same low-level input acceleration range with various mechanical sensing element designs, materials, fabrication technologies and price ranges were selected for evaluation. The selected sensors were characterized using ANSI and NIST certified testing equipment and under the same testing conditions; and their sensitivity, resolution, linearity, frequency response, transverse sensitivity, temperature response, noise level and long-term stability were tested and compared. The experimental results are then interpreted to provide an insight to advantages and disadvantages for using a particular mechanical design, fabrication technology, sensor material and the techniques for electronics integration and packaging of each specific sensor design.
141 citations
14 Mar 1999
TL;DR: The challenges of MEMS packaging have been known for some time, but little open research has been done to collect data and work toward meeting these challenges as mentioned in this paper, which is the main reason for the lack of open research.
Abstract: Unlike IC packaging, MEMS dice must interface with the environment for sensing, interconnection, and/or actuation. MEMS packaging is application specific and the package provides the physical interface of the MEMS device to the environment. In the case of a fluid mass flow control sensor, the medium flows into and out of the package. This type of packaging is referred to as media compatible packaging. Harsh environments may create different challenges for the packaging of MEMS. In addition to challenges related to the MEMS chip environment and interfacing with that environment, challenges also exist inside the MEMS package, such as die handling, die attach, interfacial stress, and outgassing. These new challenges in MEMS packaging need immediate research and development efforts. To date, most of what is known about MEMS packaging remain proprietary secrets and published literature is scarce. The challenges of MEMS packaging have been known for some time, but little open research has been done to collect data and work toward meeting these challenges. A disproportionality exists between money spent on MEMS packaging and time spent researching MEMS packaging. Currently, the cost of MEMS packaging typically accounts for 75% or more of the device sale price. MEMS packaging is already far behind the capabilities of MEMS designers, and it is the purpose of this paper to share the challenges of MEMS packaging and create an awareness and an interest in MEMS packaging within the packaging community.
140 citations
Patent•
IBM1
TL;DR: In this paper, a flexible film semiconductor chip carrier is mounted on a second level electronic package using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate.
Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates. Then, this assembly is heated to reflow the solder of the spacers, and the assembly fixture is disassembled, leaving the flexible film semiconductor chip carrier mounted on the second level electronic package with the flexible film of the carrier having a planar geometry as desired. The spacers may be attached to the flexible film semiconductor chip carrier using a special template having a pattern of openings corresponding to the pattern of outer lead bonding pads on the flexible film semiconductor chip carrier.
140 citations