Showing papers on "Encoding (memory) published in 1977"

Associative Memory: A System-Theoretical Approach

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An efficient parallel garbage collection system and ITS correctness proof

Abstract: : An efficient system to perform garbage collection in parallel with list operations is proposed and its correctness is proven. The system consists of two independent processes sharing a common memory. One process is performed by the list processor (LP) for list processing and the other by the garbage collector (GC) for marking active nodes and collecting garbage nodes. The system is derived by using both the correctness and efficiency arguments. Assuming that memory references are indivisible the system satisfies the following properties: No critical sections are needed in the entire system. The time to perform the marking phase by the GC is independent of the size of memory, but depends only on the number of active nodes. Nodes on the free list need not be marked during the marking phase by the GC. Minimum overheads are introduced to the LP. Only two extra bits for encoding four colors are needed for each node. Efficiency results show that the parallel system is usually significantly more efficient in terms of storage and time than the sequential stack algorithm. (Author)

The Composition of Episodic Memory.

Abstract: : The primary purpose of the study was to examine the interrelationships among a number of episodic memory tasks, with a special interest in determining the correlations among various attributes of memory. The attributes investigated included imagery, associative, acoustic, temporal, affective, and frequency. The tasks were free recall, paired associates, serial, verbal-discrimination, classical recognition, and memory span, as well as less frequency used tasks. The 200 college-student subjects were tested for 10 sessions, and 28 different measures of episodic memory were obtained from the tasks. In addition, five measures of semantic memory were available. All scores were initially intercorrelated. Measures of episodic memory and semantic memory were generally unrelated.

Pattern goodness and speed of encoding.

Abstract: Two experiments attempted to resolve a conflict in the literature about whether good patterns are encoded faster than poor patterns in speeded classification tasks. The results showed clear effects of goodness on the memory component of such tasks, but no effect on speed of encoding. The conflicts appear to be due in part to varying encoding requirements of different tasks.

TV Game apparatus

Abstract: A TV-type game employs a raster screen television for presenting game symbols. Player operated control switches are encoded to move the symbols. A microprocessor reads the switches. A dually addressed random access memory is employed as the interfacing between the screen and the processor which otherwise function as essentially separate and distinct devices. The memory provides a static storage of the screen pattern for each point in the raster lines with a portion assigned as a processor scratch pad. The memory may be dynamic with periodic refreshing and constructed with individual chips for each of the several bits in a word. The chips are grouped for alternate refreshing and powered during access periods. The processor updates the memory during idle display access periods. The memory is accessed in multiple bit words or bytes for display and processing. For display, a parallel to serial output latch is employed. The previous symbol position and pose is stored in the scratch pad and is erased and rewritten in a new position and pose. The controls may provide encoding. A hardwired bit shifter with programmed shift level rapidly shifts the symbol bits before placing in memory. A high speed memory and low speed processor are shown with separate clocks and a special synchronizer unit.

Electrically encoded, electrically controlled push-button combination lock

Abstract: An encoding circuit is provided permitting energization of an electromagnetic unlocking solenoid if a series of push-button switches is operated in accordance with a predetermined code. The circuit includes a memory which stores the sequence of operation of the push-buttons in accordance with the code in form of a binary code word. A comparison or decision stage is connected to the memory, typically a shift register, and connected to the memory position of all the digits of the code associated with the specific lock of a binary 1 value, as well as all the digits of the code in a binary 0 value, the decision circuit controlling the unlocking solenoid only if both the binary 1 and binary 0 values stored in the memory upon sequential push-button operation conform to the code associated with the lock, and, simultaneously, a timing circuit energized upon initiation of the first properly coded push-button still provides a timing energization signal, or operating energy to the circuit. In addition, the decision stage includes another input connected to a memory position, the value of which is unaffected by operation of the push-button switches so that additional safety against opening of the lock by trial-and-error operation of the push-buttons is provided.

Information Content of Programs and Operation Encoding

Abstract: The problem of determining the minimum representation of programs for execution by a computer is considered. The methods of measuring space requirements suggest practical methods for encoding programs and for designing machine languages. An analysis of the operation portion of instructions finds that the 47 operation codes used by a well-known compiler require, on average, fewer than two bits each.

Recognition of random shapes as a function of complexity, relevancy of verbal labels, and encoding strategy

Abstract: The purposes of this experiment were: 1) To examine the conceptual coding hypothesis, and 2) to investigate how verbal and imaginal encoding strategies interact with shape complexity to either enhance or disturb recognition . One hundred subjects were given a recognition test following stimulus predifferen tiation trainings. Results were: a) The recognition of complex shapes in the relevant labeling condition was superior to that in the irrelevant labeling con dition. There was no difference between the labeling conditions on the re cognition of simple shapes, and b) for complex shapes only the verbal encoding strategy should be easily available, whereas there was a possibility that for sim

Concept neurons: A proposed developmental study

Abstract: A neurophysiological experiment is proposed to determine the existence of visual object concept neurons. The basic technique is to deprive newborn animals of all visual experience with the exception of a small number of objects exposed one at a time in a Ganzfeld. Such a demonstration would be important in extending the range of validity of the principle of specific neuron encoding.

Television game system

Abstract: TV GAME APPARATUS A TV-type game employs a raster screen television for presenting of game symbols. Player operated control switches are encoded to move the symbols. A microprocessor reads the switches. A dually addressed random access memory is employed as the interfacing between the screen and the processor which otherwise function as essentially separate and distinct devices. The memory provides a static storage of the screen pattern for each point in the raster lines with a portion assigned as a processor scratch pad. The memory may be dynamic with periodic refreshing and constructed with individual chips for each of the several bits in a word. The chips are grouped for alternate refreshing and powered during access periods. The processor updates the memory during idle display access periods. The memory is accessed in multiple bits words or bytes for display and processing. For display, a parallel to serial output latch is employed. The previous symbol position and pose is stored in the scratch pad and is erased and rewritten in a new position and pose. The controls may provide encoding. A hardwired bit shifter with programmed shift level rapidly shifts the symbol bits before placing in memory. A high speed memory and low speed processor are shown with separate clocks and a special synchronizer unit.

Frequency effects in the abstraction of linguistic ideas

Abstract: The linear linguistic integration effect reported by Bransford and Franks (1971) has been widely accepted as a demonstration of the ability of subjects to abstract and integrate information from isolated sentences. In two experiments a simple frequency model was successfully used to predict mean sentence recognition ratings obtained with the Bransford-Franks paradigm. Since the simple frequency model does not assume an integrated representation in memory, it is suggested that the linear effect reflects decision processes occurring during the recognition task rather than encoding in memory.

Code output communication device

Abstract: PURPOSE:To simplify the device composition by giving new memory to FIFO (fast-in, fast-out) memory at its vacant condition, so that the confirmation of IR(input, ready) signal is not needed, in high speed encoding, such as facsimile signal etc

A joint source and channel encoding scheme

Abstract: A method of joint source and channel encoding using block codes is presented. The method is based on n variation of syndrome encoding. Making use of negacyclic codes, the technique results in both data compression and on error-detection capability for appropriate source probability distributions. Both situations, with and without distortion, are considered. An orthogonal extension of the above scheme is also introduced in the concluding remarks.