scispace - formally typeset
Search or ask a question

Showing papers on "Encoding (memory) published in 1986"


Journal ArticleDOI
TL;DR: The experiments reported in this article challenge this interpretation of the self-reference effect by demonstrating that self-referent and semantic encodings produce virtually identical free recall levels if they are first equated for the amount of organization they encourage.
Abstract: Relating information to the self (self-referent encoding) has been shown to produce better recall than purely semantic encoding. This finding has been interpreted as demonstrating that self-reference produces a more elaborate memory trace than semantic encoding, and it has been cited frequently as evidence that the self is one of the most highly elaborated structures in memory. The experiments reported in this article challenge this interpretation of the self-reference effect by demonstrating that self-referent and semantic encodings produce virtually identical free recall levels if they are first equated for the amount of organization they encourage. On the basis of our findings we conclude the following: Organization, not elaboration, is responsible for the superior recall performance obtained when information is encoded self-referentially, and organization is not a necessary component of self-referent encoding and can be orthogonally varied within self-referent and semantic encoding tasks. Finally, we discuss how a single-factor theory based on organization can account for many of the self-referent recall findings reported in the literature.

295 citations


Journal ArticleDOI
TL;DR: This paper proposed a framework that focuses on the type of processing induced by different difficulty manipulations, the nature of the learning material, and the importance of encoding both relational and individual-item information.

141 citations


Journal ArticleDOI
TL;DR: In an experiment using verification task procedures, identical structural parameters were found to model reaction time accurately to both addition and multiplication problems, and both were self-terminated when an error in the units column was encountered.
Abstract: In an experiment using verification task procedures, 100 subjects responded to simple and complex problems of addition and multiplication. Identical structural parameters were found to model reaction time accurately to both addition and multiplication problems. Slope estimates for a memory network parameter did not differ significantly between simple and complex problems within an operation or between addition and multiplication problems. Both complex addition and complex multiplication problems were processed columnwise, with column sums or products being retrieved from an interrated memory network. The two types of complex problems included similar processes for carrying and for encoding of single digits, and both were self-terminated when an error in the units column was encountered. Addition and multiplication facts appear to be retrieved from a single interrelated memory network. A conceptual model for this interrelated network is discussed.

95 citations


Proceedings ArticleDOI
01 May 1986
TL;DR: A GOMS theory of stimulus-response compatibility is shown to predict response-time performance on a command/abbreviation encoding task and zero-parameter predictions were made that fit the observed performance with r2 = 0.776.
Abstract: A GOMS theory of stimulus-response compatibility is shown to predict response-time performance on a command/abbreviation encoding task. Working with parameters that were set by an earlier study and which have rational, task-meaningful interpretations as mapping, motor, perception and retrieval operators, zero-parameter predictions were made that fit the observed performance with r2 = 0.776 (p

55 citations


Journal ArticleDOI
TL;DR: In this paper, the authors examined whether spatial location information is more likely to be encoded with the memory representation of objects than of words and found that different processes are involved in encoding item and location information for words but not for objects.
Abstract: Four experiments examine whether spatial location information is more likely to be encoded with the memory representation of objects than of words. Sixteen objects or the one-word verbal labels for each were studied on a matrix display, followed by a recall test and then a relocation test. In each experiment, an independent variable known to affect item recall was introduced to test whether spatial location memory would concern itantly vary for both objects and words. In Experiment 1, recall of both objects and words increased with age of the subjects. However, relocation accuracy increased for objects but not for words. In Experiment 2, visual imagery instructions generally improved memory for words without affecting relocation accuracy. In Experiments 3 and 4, prolonging the test delay diminished recall for objects and words. However, relocation accuracy decreased only for the objects. In each experiment, item memory was affected independently of location memory for words but not for objects. The results suggest that different processes are involved in encoding item and location information for words but not for objects.

45 citations


Journal ArticleDOI
TL;DR: The experiments reported here address the empirical question of how will your memory be affected by the number of related events experienced in the same context within the theoretical framework of relational and item-specific information.
Abstract: If you are asked to remember an event described by a sentence, how will your memory be affected by the number of related events experienced in the same context? The experiments reported here address this empirical question within the theoretical framework of relational and item-specific information. Assuming that both common and distinctive features of events are important in recall, encoding of both types of information should produce optimal performance. Assuming further that the type of information encoded, either common or distinctive, is influenced by manipulations, such as the number of related sentences and the orienting task, recall should be a product of the interaction between set size and type of orienting task. The results of these experiments were consistent with this prediction. Subsidiary analyses supported the interpretation of this interaction in terms of the differential availability of relational and item-specific information. The results are discussed in the context of the script pointer + tag hypothesis of schema theory.

31 citations


Patent
14 Jan 1986
TL;DR: In this article, the authors propose to set an encode processing speed at a speed fitted for a transmission capacity, and to reduce a device in scale by providing a memory possible to store a picture of one field, at least, or more at the input front stage of an encoder, and performing a speed change.
Abstract: PURPOSE: To set an encode processing speed at a speed fitted for a transmission capacity, and to reduce a device in scale by providing a memory possible to store a picture of one field, at least, or more at the input front stage of an encoder, and performing a speed change. CONSTITUTION: An input video signal 1 is inputted to a pre-frame memory 12 synchronizing with a video clock, and the pre-frame memory 12 sends out an input video signal 13 to an encoding circuit 15 synchronizing with a transmission line clock. The encoding circuit 15 performs, based on an encoding parameter 14, an inter-frame encoding, or in-frame encoding only on an effective picture element between a past video signal 19 encoded already at the previous time and read out from an encoding frame memory 20 and the input video signal 13, and an encoding data 16 and a local decoding signal 22 are outputted. The encoding circuit 15 does not perform a real time operation, but performs an encoding process synchronizing with a processing speed corresponding to the capacity of a transmission line 9, that is, the transmission line clock. In other words, the encoding data 16 is multiplexed with a bit of encoding control information 7 at a multiplexing circuit 8, then being sent out to the transmission line 9. COPYRIGHT: (C)1987,JPO&Japio

22 citations


Journal ArticleDOI
TL;DR: In experiment 1 judged pattern goodness was shown to be a highly reliable increasing function of array size and amount of symmetry, the two effects being independent, and this finding confirms the pattern goodness effect on a very general basis.

16 citations


Patent
27 Mar 1986
TL;DR: In this paper, display characters are compacted to minimize memory space by encoding the characters in 4-bit nibbles to maximize storage efficiency in a ROM organized to store 8-bit bytes.
Abstract: A television receiver includes a micro-computer which controls the receiver functions and provides on-screen display of messages for prompting the user. Display characters are compacted to minimize memory space by encoding the characters in 4-bit nibbles to maximize storage efficiency in a ROM organized to store 8-bit bytes.

9 citations


Patent
28 Feb 1986
TL;DR: In this article, the transmission control frame of the error in transmission is received, a frame error R signal is active, the second reference frame memory 338 is fed from a reference frame part 335 to perform the comparison with the present using frame.
Abstract: PURPOSE: To obtain an electronic conference system having no error in transmission and rich in a real time property by encoding, transmitting and decoding based on the preceding picture data when the error is generated. CONSTITUTION: When the error in transmission is generated on a line and the generation of the error in transmission is informed by a transmission control frame, the comparison with a present using frame memory from the next time is performed to information capable of being effectively reproduced in a receiving side, namely a reference frame memory preceding by two. When the transmision control frame of the error in transmission is received, a frame error R signal is active, the second reference frame memory 338 is fed from a reference frame part 335 to perform the comparison with the present using frame. The contents of the second frame memory 338 are transferred to the first reference frame memory 337. COPYRIGHT: (C)1987,JPO&Japio

9 citations


Journal ArticleDOI
TL;DR: In this article, the authors concluded that the age-related memory deficit cannot be eliminated by any of the conditions noted above, and that the deficit still remains in both young and old subjects.
Abstract: It has been asserted that differences between young and old subjects in memory tasks can be eliminated if three conditions are met: (1) adequate retrieval information is given; (2) encoding is equalized for both groups; and (3) strategy differences are controlled. Although all three conditions are met in the present experiment, the age-related memory deficit still remains. It is concluded that the deficit cannot be eliminated by any of the conditions noted above.

Patent
03 Feb 1986
TL;DR: In this paper, the authors propose a memory for fetching picture encoding data to a television telephone set, a selector for controlling an input and output thereof and a control circuit therefor, transmitting the message of a video and displaying on a display.
Abstract: PURPOSE: To completely understand the situation of a remote station except the time of communication by providing a memory for fetching picture encoding data to a television telephone set, a selector for controlling an input and output thereof and a control circuit therefor, transmitting the message of a video and displaying on a display. CONSTITUTION: When there is a calling from the remote station and a receiver of a local station is not raised, a transmission signal selector 7 selects the picture encoding data 10 read from the encoding data memory 8 by the control circuit 9 and transmits from a transmission device to display the message of the contents of the encoding data memory of the local station on the display of the remote station. Herein, when the receiver of the local station is raised, the transmission signal selector 7 immediately selects picture encoding data 6 of a route of a television camera 1 to enter an ordinary communication state. COPYRIGHT: (C)1987,JPO&Japio

Patent
12 Apr 1986
TL;DR: In this article, the first local decoding signal is generated in an adder 104 from a delayed forecast signal supplied from a delay circuit 108 and forecast error signal and supplied to an interpolating circuit 105.
Abstract: PURPOSE:To obtain an encoding system that involves little increase of the quantity of information by encoding in a cluster unit used signal processing in processed data which are originally to be encoded when one of two kinds of signal processing is selected in the unit of cluster. CONSTITUTION:The first local decoding signal is generated in an adder 104 from a delayed forecast signal supplied from a delay circuit 108 and forecast error signal and supplied to an interpolating circuit 105. For the first local decoding signal, decoding is made for cluster for which thinning is made as if no thinning was made. Accordingly, interpolation is necessary for thinned, i.e. not encoded, picture element data. An interpolating circuit 105 makes interpolation of picture data which are not encoded in a thinned cluster using the first local decoding signal for neighboring encoded picture element data. For the first local decoding signal for other encoded picture element data, an input is outputted as it is to a frame memory 106 as the second local decoding signal. The frame memory 106 has the capacity to store approximately one picture of a picture signal.

Patent
09 Jul 1986
TL;DR: In this article, the authors propose to increase memory efficiency of an accumulating memory and to save using area of the memory by compressing and encoding input signal information and writing in the accumulating memory, decoding the compressed and encoded picture signal information, enlarging and reducing the information and encoding in a recording buffer memory.
Abstract: PURPOSE:To increase memory efficiency of an accumulating memory and to save using area of the memory by compressing and encoding input signal information and writing in an accumulating memory, decoding the compressed and encoded picture signal information and enlarging and reducing the information and writing in a recording buffer memory CONSTITUTION:Reflected light obtained by irradiating an original 20 by light from a light source 30 is read by an original reading section 10 such as a scanning type image sensor etc Read picture signal information is compressed and encoded by an encoder 40, and filed once in an accumulating memory 11 such as a light disk memory etc Then, when necessary, compressed and encoded picture signal information is inputted to an arithmetic unit 12, decoded to digital picture signal information, and further, arithmetic process such as enlarging or reducing etc is performed The results of operation are accumulated in, for instance, a recording buffer memory 13 that stores page by page, and when 1 page is accumulated, outputted to a recording section 14 The recording section 14 records by an electronic printer etc basing on the result of operating for inputted 1 page

Patent
14 May 1986
TL;DR: A picture signal processing apparatus comprises a signal processing means for performing signal processing such as picture element density conversion of picture signals, a first memory means for storing temporarily picture signals as object of the signal processing, and a first signal path through which signals are received or transmitted between signal processing and encoding means, which can be performed concurrently and high speed processing is realized as discussed by the authors.
Abstract: A picture signal processing apparatus comprises a signal processing means for performing signal processing such as picture element density conversion of picture signals, a first memory means for storing temporarily picture signals as object of the signal processing, a first signal path through which signals are received or transmitted between the signal processing means and the first memory means, an encoding means for performing encoding processing, a second memory means for storing temporarily picture signals as object of the encoding processing, a second signal path through which signals are received or transmitted between the encoding means and the second memory means, a control means for controlling the signal processing means and the encoding means, and a third signal path through which signals are received or transmitted between the signal processing means and the encoding means, thereby signal processing and encoding processing can be performed concurrently and high speed processing is realized


Patent
16 Jun 1986
TL;DR: In this article, the white line check data is used to check if a relevant line is the white lines and if it is not, the image information of one line of the relevant line of a line is read from the means 19 and then, the read one line image information is compressed and encoded and a checking is done on if a sub-scanning address is a final address or not.
Abstract: PURPOSE:To carry out an image information processing at high speed by making an access an image information memory means in a main scanning direction or a sub-scanning direction and reading a white line check data before reading the image information to require no access to the white line. CONSTITUTION:Before writing an image information, contents of an image information memory memory means and white line check data memory means 13, 15 are reset, and as soon as the image information is recorded in the means 19, a detected black dot is written in the means 13, 15. In an encoding processing thereafter, the contents of the means 13, 15 are read and if a relevant line is the white line, a compression encoding as the white line is done. If a relevant line is not the white line, the image information of one line of the relevant line is read from the means 19. Then, the read one line image information is compressed and encoded and a checking is done on if a sub-scanning address is a final address or not and if it is the final address, a sequential compression encoding processing is finished.

Patent
21 Jun 1986
TL;DR: In this article, a picture retrieval terminal 2 receives picture information on the 1st page up to the encoding level 3 from the primary memory part 4 and can obtain rough information from the first page picture, whereby said terminal 2 can fined the necessity of the retrieved picture in an earlier time.
Abstract: PURPOSE:To obtain effects such as quickness of the retrieval time, reduction in a communications cost and utilization of memory by accumulating picture information subjected to the hierarchical processing in terms of scattering and retrieving it appropriately so as to supply it CONSTITUTION:A primary memory part 4 accumulates picture information up to an encoding level 3, while a secondary memory part 6 accumulates picture information from an encoding level 4 to level N The encoding level segments hierarchically one picture from a rough picture to high definition one, and the picture definition improves as the encoding level goes up A picture retrieval terminal 2 receives picture information on the 1st page up to the encoding level 3 from the primary memory part 4 and can obtain rough information on the 1st page picture, whereby said terminal 2 can fined the necessity of the retrieved picture in an earlier time Where the retrieved picture on the 1st page sufficient at the level, or further information is unnecessary, the retrieval proceeds to the 2nd page, which is processed in the same manner as the 1st page When the detailed information on the 2nd page is necessary, necessary supplementary information on the 2nd page is requested with respect to the secondary memory part 6, and information on the 2nd page at an encoding level 4 to level N is obtained

Patent
22 May 1986
TL;DR: In this article, an associative memory device supplies the input data and the retrieval conditions 102 and delivers a retrieval address 162 storing the data that satisfies the conditions 102, and a memory means 110 containing memory elements distributed in a matrix form is provided together with a row selection means 120, a column selection means 130, a write data generating means 140, a register 145 which fetches a read signal from the means 110, a retrieval condition processing means 150 which decides whether the output 115 of the register 145 and the next read signal 116 satisfy the condition 102 or not, and an encoding
Abstract: PURPOSE:To use the ordinary memory elements which receive accesses with supply of addresses to obtain an inexpensive associative device of a high speed and large capacity, by providing a temporary memory means which stores the read output of a memory means and a retrieval condition processing means which decides whether or not said read output and the next read output are accordant with the given retrieval conditions. CONSTITUTION:An associative memory device supplies the input data 101 and the retrieval conditions 102 and delivers a retrieval address 162 storing the data that satisfies the conditions 102. In addition, a memory means 110 containing memory elements distributed in a matrix form is provided together with a row selection means 120, a column selection means 130, a write data generating means 140, a register 145 which fetches a read signal 116 from the means 110, a retrieval condition processing means 150 which decides whether the output 115 of the register 145 and the next read signal 116 satisfy the conditions 102 or not, and an encoding means 160. The storage constitution of this associative memory device is defined as N words and M bits. Thus the storage constitution of the means 110 is equal to 2M rows and N columns, i.e., 2M words and N bits.

Patent
08 Nov 1986
TL;DR: In this article, the first and second memories of a memory circuit are used for encoding and decoding a binary picture signal and alternately changing over a reading condition and a writing condition every one line to write position information of change points of a reference line and an encoding line in the memories.
Abstract: PURPOSE:To shorten a processing time and make compact a circuit scale by providing the first and the second memories in case of encoding and decoding a binary picture signal, and alternately changingover a reading condition and a writing condition every one line to write the position information of change points of a reference line and an encoding line in the memories. CONSTITUTION:A memory circuit 7 is constituted of two memories 7A, 7B. In 7A, 7B, a reading condition and a writing condition are alternately changed over every one line. In one memory, the position information of a change point of one line before is recorded. When this memory is read, the other memory is brought into a writing condition and the position information of the change point of the present line is written therein. The position information of the change point of the line before required for encoding is obtained from one memory in a reading condition of the memory circuit 7, and this position information is given to a microprogram control section 6. The position information of the change point of the present line required for encoding is given to the memory circuit 7 and the microprogram control section 6 from an FIFO (first in first out register) 5.

Patent
06 May 1986
TL;DR: In this article, a control circuit for a graphic machine associated to a picture memory is described, in which the aspect of each picture spot is encoded by an aspect word having several bits, this circuit comprising - a colour transcoding table memory (4) containing colour words associated to the colour palette, this memory being addressed for readout purposes by the picture memory (1) for each spot of the screen in a projection display device (6), the read-out of picture memory(1) being performed synchronously with the scanning of a screen, - selection means allowing to transmit
Abstract: 1. A control circuit for a graphic machine associated to a picture memory (1) in which the aspect of each picture spot is encoded by an aspect word having several bits, this circuit comprising - a colour transcoding table memory (4) containing colour words associated to a colour palette, this memory being addressed for read-out purposes by the picture memory (1) for each spot of the screen in a projection display device (6), the read-out of the picture memory (1) being performed synchronously with the scanning of the screen, - selection means allowing to transmit to the input of the table memory only a part of the aspect word bits, - a digital to analog conversion assembly (51, 52, 53) receiving colour words which have been read out from the transcoding table memory (4), and supplying analog control signals to the projection display device (6), characterized in that the number n of bits for encoding the aspect of the spots in the picture memory (1) exceeds the number n' of addressing bits for the table memory (4) and that the selection means (3) comprise - n' selector circuits (31, 32, ...38) located between the picture memory (1) and the table memory (4) and having each an input connected to the output of the picture memory (1) via an n-bits bus and a one-bit output as well as an n-bits control input, - a configuration control register (2), an output of which having n.n' bits is connected to the control inputs of the selector circuits and controls the latters in such a way that they select for each spot at each screen scan a subgroup comprising at most n, bits out of the n bits used to encode the aspect of the spot.

Patent
10 Nov 1986
TL;DR: In this paper, the authors propose to make easy the constitution of an encoding processor by dividing a function into two of encoding processing separated at every primary color and the encoding processing using the correlation of the color employing an intermediate code word.
Abstract: PURPOSE:To make easy the constitution of an encoding processor by dividing a function into two of an encoding processing separated at every primary color and the encoding processing using the correlation of the color employing an intermediate code word. CONSTITUTION:Input devices 110a-110c of image informations independent in respective colors, prestep encoding processors 120a-120c independent in the respective colors, memory devices 130a-130c of intermediate code words independent in the respective colors are provided. With respect to the intermediate code words in these memory devices, an image processing can be executed by employing an image processor 140. Using a poststep encoding processor 150, the highly efficient encoding processing of the intermediate code words using the correlation between the respective colors is executed and the obtained code words are outputted by the use of an output device 160. Thereby, the highly efficient encoding processing can be executed without enlarging the scale of the processor.

Journal ArticleDOI
TL;DR: The architectural evaluation of a universal host computer MUNAP is described in terms of: (1) nonnumerical capability; (ii) multiprocessor parallelism; and (iii) flexibility of the two-level microprogramming scheme, based on the experimental results.
Abstract: This paper describes the architectural evaluation of a universal host computer MUNAP in terms of: (1) nonnumerical capability; (ii) multiprocessor parallelism; and (iii) flexibility of the two-level microprogramming scheme, based on the experimental results. The findings of the dynamic evaluation are summarized as follows. (i) The divide and concatenate unit is especially useful for decoding machine instructions and manipulating tags in high-level language machines so that the number of execution steps is decreased 30–40 percent. The bit operation unit is useful for numerical processing which frequently utilizes priority encoding. This provides a reduction in execution steps of 15 percent. In the shuffle exchange network, 16, 32, and 48-bit circular shifts and broadcasts are used effectively for data transfers between processor units and serial operations. (ii) The average numbers of active processor units are 3.6 - 3.8 for such numerical computations as Fast Fourier Transform, and 2.1 to 2.5 for emulations of a wide variety of high-level languages. (iii) In the two-level microprogramming scheme, the allocation ratio of the nanoprogram memory increases due to word size optimization of nanoprogram memory so that 80 - 90 percent of it is used for large-scale microprograms.

Patent
31 Mar 1986
TL;DR: In this article, the authors propose to prevent the occurrence of underflow in buffer memory by issuing a transmission request signal from an encoding part when one side of the buffer memory is full.
Abstract: PURPOSE:To prevent the occurrence of an underflow in buffer memory by issuing a transmission request signal from an encoding part when one side of the buffer memory is full, and transferring and controlling data stored in the buffer memory side to an output control part with the transmission request signal and a reception request signal from an output control part. CONSTITUTION:A facsimile image signal which id displayed in black/white binary values and inputted from an input terminal 1 is converted by an encoding part 2 to write it in one of plural built-in buffer memories. When said memory is full or conversion data of input signals of the prescribed number of lines are accumulated, the transmission of data is demanded to a control part 4, and simultaneously said buffer memory is switched to another memory to continue writing of the conversion data. On the other hand, an output control part 3 incorporates two buffer memories, reads out the data written in one memory at a constant speed and outputs it to a facsimile device from an output terminal 5. When the data in said memory becomes empty, the output control part 3 requests the control part 4 to receive the data and simultaneously said buffer memory is switched to the other to read and transmit data.

Patent
28 Apr 1986
TL;DR: In this article, the authors propose to perform a CPU for control to perform encoding and decoding by inhibiting an encoding function part and a decoding function part from operating until next actuation after the decoding of one line are finished.
Abstract: PURPOSE:To perform a CPU for control to perform encoding and decoding by inhibiting an encoding function part and a decoding function part from operating until next actuation after the encoding and decoding of one line are finished. CONSTITUTION:An image signal is read and written in a memory CURINDAT on the basis of INBASE, and an encoder 2 performs encoding when one line of data is written and stops operating when one line of data is encoded. Further, the decoding function part finishes decoding operation when an image signal for one line is generated and waits until next decoding is started.

Patent
04 Apr 1986
TL;DR: In this paper, the authors propose to suppress a quantity of information production due to a scene change and the like and attract to attention to a deterioration visually by determining an encoding parameter preliminarily and encoding it by change over foreseeing information even if a video signal inputted to an encoder.
Abstract: PURPOSE:To suppress a quantity of information production due to a scene change and the like and attract to attention to a deterioration visually by determining an encoding parameter preliminarily and encoding it by change over foreseeing information even if a video signal inputted to an encoder. CONSTITUTION:When a video signal (a) of the first TV camera is changed over to a video signal (b) of the second TV camera, an output signal (d) of a change-over circuit 4 is changed over from the signal (a) to the signal (b) at a time T0 by a change-over indicating signal (e). An encoder 6 receives change-over foreseeing information (f) from an input picture change-over control circuit 5 before a prescribed time. Accordingly, the encoder 6 executes an encoding mode for a scene change. Thereafter, until information (f) is received, the encoder 6 carries out an encoding by an encoding mode decided by a quantity (h) of a content of a buffer memory outputted from a buffer memory 7.

Patent
18 Oct 1986
TL;DR: In this paper, the authors propose to improve the correcting capacity and transmission efficiency of an error correcting system by reproducing transmission information bit between encoding blocks by adding encoding correlation, which can be used provided that algorithms corresponding to the transmission and reception are to be used.
Abstract: PURPOSE:To improve the correcting capacity and transmitting efficiency of an error correcting system, by reproducing transmission information bit between encoding blocks by adding encoding correlation. CONSTITUTION:Information bit strings a11, a12, a13, a14, a21, a22, a23, and a24 which are about to be transmitted are stored in a memory 3 and read out in the unit of block. Then single error correction encoding is performed at every partial bit string and three redundant bits (error correcting bits) b11, b12, and b13; b21, b22, and b23; and b31, b32, and b33 are implemented at every partial bit string, and then, transmission bit strings put between each two bits of corresponding partial bit strings are sent to a transmission line 5. Single error correction encoding is performed at every block of the sent bit strings by means of a decode generator 8 and the process of a buffer receiving section 7 is performed at a memory 10. Therefore an optional algorithm can be used provided that algorithms corresponding to the transmission and reception are to be used.

Patent
31 Mar 1986
TL;DR: In this paper, a frame memory is used for encoding information with a better compression ratio by utilizing a compression system having a frame-memory for building up provisonally signals as picture information, 1st and 2nd encoding part for executing two types of encoding, and a code quantity discriminating part.
Abstract: PURPOSE:To obtain encoding information with a better compression ratio by utilizing a compression system having a frame memory for building up provisonally signals as picture information, 1st and 2nd encoding part for executing two types of encoding, 1st and 2nd code memories and a code quantity discriminating part. CONSTITUTION:Picture information read out by a reading part 1 is provisionally stored as raw data in a frame memory 2. After the building up of the data, the data is read out by line in the lateral direction of a picture from the frame memory 2, and the line correlation is encoded in the 1st encoding part 3, thereby accumulating the encoded information in the 1st code memory 4. The data is read out by line in the longitudinal direction of a picture from the frame memory 2, and the line correlation is encoded in the 2nd encoding part 5, thereby accumulating the encoded information in the 2nd code memory 5. After the termination of the encoding in the 1st and 2nd encoding parts 3 and 5, the code quantity discriminating part 7 discriminates accumulation quantities of the 1st and 2nd code memories 4 and 6, and the encoded information with less code quantity is built up in a compression memory 8.

Journal ArticleDOI
TL;DR: An attempt is made to use the “encoding” procedure for the total error synthesis of a four-bar function generator such that the error in a specified region is kept under control.
Abstract: Information theory is developed recently for application to communication engineering. This theory utilises the concept of “encoding” of messages such that the average length of a message is a minimum, and the efficiency of transmission of information is maximized. In an accurate synthesis of a function generating mechanism structural and mechanical errors should be considered together. Often, it is also required to control the error in a specified region of the range of function generation. An attempt is made to use the “encoding” procedure for the total error synthesis of a four-bar function generator such that the error in a specified region is kept under control.

Patent
30 Jul 1986
TL;DR: In this paper, the problem of redundancy-suppressed encoding with high efficiency was addressed by area-dividing the image according to its content, and allocating an independent code to respective area, thereby transmitting with priority in order the information high in necessity.
Abstract: PURPOSE:To attain redundancy-suppressed encoding with high efficiency by area- dividing the image according to its content, and allocating an independent code to respective area, thereby transmitting with priority in order the information high in necessity. CONSTITUTION:An input picture signal is stored in a memory 101. In an memory 104, the said signal is compared with the values in the memory area of the same block in which the said signal is to be stored, and the maximum value of each block is renewed depending on its result. In an memory 105, the minimum value of each block is likewise renewed. An comparing circuit 107 compares the difference (x) be tween the said max. and min. values with a prescribed value P1 or P2(P1