Topic
Encoding (memory)
About: Encoding (memory) is a research topic. Over the lifetime, 7547 publications have been published within this topic receiving 120214 citations. The topic is also known as: memory encoding & encoding of memories.
Papers published on a yearly basis
Papers
More filters
University of Basel1, Translational Genomics Research Institute2, University of Bern3, University of Belgrade4, University of Zurich5, University of Hamburg6, Technische Universität München7, Leipzig University8, University of Düsseldorf9, Hannover Medical School10, Ludwig Maximilian University of Munich11, University of Bonn12
TL;DR: Functional magnetic resonance imaging during an n-back working memory task detected SCN1A allele-dependent activation differences in brain regions typically involved in working memory processes, suggesting an important role for SCN 1A in human short-term memory.
Abstract: Recent advances in the development of high-throughput genotyping platforms allow for the unbiased identification of genes and genomic sequences related to heritable traits In this study, we analyzed human short-term memory, which refers to the ability to remember information over a brief period of time and which has been found disturbed in many neuropsychiatric conditions, including schizophrenia and depression We performed a genome-wide survey at 909 622 polymorphic loci and report six genetic variations significantly associated with human short-term memory performance after genome-wide correction for multiple comparisons A polymorphism within SCN1A (encoding the alpha subunit of the type I voltage-gated sodium channel) was replicated in three independent populations of 1699 individuals Functional magnetic resonance imaging during an n-back working memory task detected SCN1A allele-dependent activation differences in brain regions typically involved in working memory processes These results suggest an important role for SCN1A in human short-term memory
39 citations
01 Jan 1999
39 citations
TL;DR: In this paper, a compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient convolutional neural network (CNN) inference.
Abstract: A compact, accurate, and bitwidth-programmable in-memory computing (IMC) static random-access memory (SRAM) macro, named CAP-RAM, is presented for energy-efficient convolutional neural network (CNN) inference. It leverages a novel charge-domain multiply-and-accumulate (MAC) mechanism and circuitry to achieve superior linearity under process variations compared to conventional IMC designs. The adopted semi-parallel architecture efficiently stores filters from multiple CNN layers by sharing eight standard 6T SRAM cells with one charge-domain MAC circuit. Moreover, up to six levels of bit-width of weights with two encoding schemes and eight levels of input activations are supported. A 7-bit charge-injection SAR (ciSAR) analog-to-digital converter (ADC) getting rid of sample and hold (S&H) and input/reference buffers further improves the overall energy efficiency and throughput. A 65-nm prototype validates the excellent linearity and computing accuracy of CAP-RAM. A single $512\times 128$ macro stores a complete pruned and quantized CNN model to achieve 98.8% inference accuracy on the MNIST data set and 89.0% on the CIFAR-10 data set, with a 573.4-giga operations per second (GOPS) peak throughput and a 49.4-tera operations per second (TOPS)/W energy efficiency.
39 citations
TL;DR: A double-binary tail-biting turbo decoder is designed for the WiMAX standard using a 0.18-mum CMOS process, which can support 24.26 Mbps at 200 MHz.
Abstract: This brief presents an energy-efficient soft-input soft-output (SISO) decoder based on border metric encoding, which is especially suitable for nonbinary circular turbo codes. In the proposed method, the size of the branch memory is reduced to half and the dummy calculation is removed at the cost of a small-sized memory that holds encoded border metrics. Due to the infrequent accesses to the border memory and its small size, the energy consumed for SISO decoding is reduced by 26.2%. Based on the proposed SISO decoder and the dedicated hardware interleaver, a double-binary tail-biting turbo decoder is designed for the WiMAX standard using a 0.18-mum CMOS process, which can support 24.26 Mbps at 200 MHz.
39 citations
Patent•
23 Dec 2003
TL;DR: In this paper, a method and apparatus for encoding and decoding digital data using a bandwidth extension technology is presented, which includes: bandwidth-extension-encoding the digital data, outputting bandwidth-limited data, and generating bandwidth extension information; encoding the bandwidth limited data into a hierarchical structure having a base layer and at least one enhancement layer so as to control the bit rate.
Abstract: Provided are a method and apparatus for encoding and decoding digital data using a bandwidth extension technology The method includes: bandwidth-extension-encoding the digital data, outputting bandwidth-limited data, and generating bandwidth extension information; encoding the bandwidth-limited data into a hierarchical structure having a base layer and at least one enhancement layer so as to control a bit rate; and multiplexing the encoded bandwidth-limited data and the bandwidth extension information
39 citations