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Showing papers on "Equal-cost multi-path routing published in 1998"


Proceedings ArticleDOI
01 Oct 1998
TL;DR: Two new algorithms for solving the least cost matching filter problem at high speeds are described, based on a grid-of-tries construction and works optimally for processing filters consisting of two prefix fields using linear space.
Abstract: In Layer Four switching, the route and resources allocated to a packet are determined by the destination address as well as other header fields of the packet such as source address, TCP and UDP port numbers. Layer Four switching unifies firewall processing, RSVP style resource reservation filters, QoS Routing, and normal unicast and multicast forwarding into a single framework. In this framework, the forwarding database of a router consists of a potentially large number of filters on key header fields. A given packet header can match multiple filters, so each filter is given a cost, and the packet is forwarded using the least cost matching filter.In this paper, we describe two new algorithms for solving the least cost matching filter problem at high speeds. Our first algorithm is based on a grid-of-tries construction and works optimally for processing filters consisting of two prefix fields (such as destination-source filters) using linear space. Our second algorithm, cross-producting, provides fast lookup times for arbitrary filters but potentially requires large storage. We describe a combination scheme that combines the advantages of both schemes. The combination scheme can be optimized to handle pure destination prefix filters in 4 memory accesses, destination-source filters in 8 memory accesses worst case, and all other filters in 11 memory accesses in the typical case.

625 citations


Proceedings ArticleDOI
29 Mar 1998
TL;DR: This work presents a route lookup mechanism that when implemented in a pipelined fashion in hardware, can achieve one route lookup every memory access; much faster than current commercially available routing lookup schemes.
Abstract: The increased bandwidth in the Internet puts great demands on network routers; for example, to route minimum sized Gigabit Ethernet packets, an IP router must process about 1.5/spl times/10/sup 6/ packets per second per port. Using the "rule-of-thumb" that it takes roughly 1000 packets per second for every 10/sup 6/ bits per second of line rate, an OC-192 line requires 10/spl times/10/sup 6/ routing lookups per second; well above current router capabilities. One limitation of router performance is the route lookup mechanism. IP routing requires that a router perform a longest-prefix-match address lookup for each incoming datagram in order to determine the datagram's next hop. We present a route lookup mechanism that when implemented in a pipelined fashion in hardware, can achieve one route lookup every memory access. With current 50 ns DRAM, this corresponds to approximately 20/spl times/10/sup 6/ packets per second; much faster than current commercially available routing lookup schemes. We also present novel schemes for performing quick updates to the forwarding table in hardware. We demonstrate using real routing update patterns that the routing tables can be updated with negligible overhead to the central processor.

615 citations


Journal ArticleDOI
TL;DR: The analysis in this paper is based on data collected from border gateway protocol (BGP) routing messages generated by border routers at five of the Internet core's public exchange points during a nine month period, and reveals several unexpected trends and ill-behaved systematic properties in Internet routing.
Abstract: This paper examines the network interdomain routing information exchanged between backbone service providers at the major US public Internet exchange points. Internet routing instability, or the rapid fluctuation of network reachability information, is an important problem currently facing the Internet engineering community. High levels of network instability can lead to packet loss, increased network latency and time to convergence. At the extreme, high levels of routing instability have led to the loss of internal connectivity in wide-area, national networks. We describe several unexpected trends in routing instability, and examine a number of anomalies and pathologies observed in the exchange of inter-domain routing information. The analysis in this paper is based on data collected from border gateway protocol (BGP) routing messages generated by border routers at five of the Internet core's public exchange points during a nine month period. We show that the volume of these routing updates is several orders of magnitude more than expected and that the majority of this routing information is redundant, or pathological. Furthermore, our analysis reveals several unexpected trends and ill-behaved systematic properties in Internet routing. We finally posit a number of explanations for these anomalies and evaluate their potential impact on the Internet infrastructure.

576 citations


Journal ArticleDOI
TL;DR: This work adopts a more general approach in which all paths between a source-destination pair are considered and incorporate network state information into the routing decision, and performs routing and wavelength assignment jointly and adaptively, and outperforms fixed routing techniques.
Abstract: We consider routing and wavelength assignment in wavelength-routed all-optical networks (WAN) with circuit switching. The conventional approaches to address this issue consider the two aspects of the problem disjointly by first finding a route from a predetermined set of candidate paths and then searching for an appropriate wavelength assignment. We adopt a more general approach in which we consider all paths between a source-destination (s-d) pair and incorporate network state information into the routing decision. This approach performs routing and wavelength assignment jointly and adaptively, and outperforms fixed routing techniques. We present adaptive routing and wavelength assignment algorithms and evaluate their blocking performance. We obtain an analytical technique to compute approximate blocking probabilities for networks employing fixed and alternate routing. The analysis can also accommodate networks with multiple fibers per link. The blocking performance of the proposed adaptive routing algorithms are compared along with their computational complexity.

543 citations


Proceedings ArticleDOI
01 Oct 1998
TL;DR: This paper studies the performance of route query control mechanisms for the recently proposed Zone Routing Protocol (ZRP) for ad-hoc networks and demonstrates how certain combinations of these techniques can be applied to single channel or multiple channel ad-Hoc networks to improve both the delay and control traffic performance of the ZRP.
Abstract: In this paper, we study the performance of route query control mechanisms for the recently proposed Zone Routing Protocol (ZRP) for ad-hoc networks. The ZRP proactively maintains routing information for a local neighborhood (routing zone), while reactively acquiring routes to destinations beyond the routing zone. This hybrid routing approach has the potential to be more efficient in the generation of control traffic than traditional routing schemes. However, without proper query control techniques, the ZRP can actually produce more traffic than standard flooding protocols.Our proposed query control schemes exploit the structure of the routing zone to provide enhanced detection (Query Detection (QD1/QD2)), termination (Loop-back Termination (LT), Early Termination (ET)) and prevention (Selective Bordercasting (SBC)) of overlapping queries. We demonstrate how certain combinations of these techniques can be applied to single channel or multiple channel ad-hoc networks to improve both the delay and control traffic performance of the ZRP. Our query control mechanisms allow the ZRP to provide routes to all accessible network nodes with only a fraction of the control traffic generated by purely proactive distance vector and purely reactive flooding schemes, and with a response time as low as 10% of a flooding route query delay.

514 citations


Proceedings ArticleDOI
07 Jun 1998
TL;DR: A new scheme especially designed for routing in an ad-hoc wireless environments, called "global state routing" (GSR), where nodes exchange vectors of link states among their neighbors during routing information exchange, which provides a better solution than existing approaches in a truly mobile, ad-Hoc environment.
Abstract: In an ad-hoc environment with no wired communication infrastructure, it is necessary that mobile hosts operate as routers in order to maintain the information about connectivity. However with the presence of high mobility and low signal/interference ratio (SIR), traditional routing schemes for wired networks are not appropriate, as they either lack the ability to quickly reflect the changing topology, or may cause excessive overhead, which degrades network performance. Considering these restrictions, we propose a new scheme especially designed for routing in an ad-hoc wireless environments. We call this scheme "global state routing" (GSR), where nodes exchange vectors of link states among their neighbors during routing information exchange. Based on the link state vectors, nodes maintain a global knowledge of the network topology and optimize their routing decisions locally. The performance of the algorithm, studied in this paper through a series of simulations, reveals that this scheme provides a better solution than existing approaches in a truly mobile, ad-hoc environment.

478 citations


Proceedings ArticleDOI
01 Oct 1998
TL;DR: Extensions to the basic QoS routing are developed that can achieve good routing performance with limited update generation rates and the impact on the results of a number of secondary factors such as topology, high level admission control, and characteristics of network traffic.
Abstract: Recent studies provide evidence that Quality of Service (QoS) routing can provide increased network utilization compared to routing that is not sensitive to QoS requirements of traffic. However, there are still strong concerns about the increased cost of QoS routing, both in terms of more complex and frequent computations and increased routing protocol overhead. The main goals of this paper are to study these two cost components, and propose solutions that achieve good routing performance with reduced processing cost. First, we identify the parameters that determine the protocol traffic overhead, namely (a) policy for triggering updates, (b) sensitivity of this policy, and (c) clamp down timers that limit the rate of updates. Using simulation, we study the relative significance of these factors and investigate the relationship between routing performance and the amount of update traffic. In addition, we explore a range of design options to reduce the processing cost of QoS routing algorithms, and study their effect on routing performance. Based on the conclusions of these studies, we develop extensions to the basic QoS routing, that can achieve good routing performance with limited update generation rates. The paper also addresses the impact on the results of a number of secondary factors such as topology, high level admission control, and characteristics of network traffic.

387 citations


Proceedings ArticleDOI
06 Jan 1998
TL;DR: AntNet is an adaptive, distributed, mobile-agents-based algorithm which was inspired by recent work on the ant colony metaphor and showed both very good performances and robustness under all the experimental conditions with respect to its competitors.
Abstract: This paper introduces AntNet, a new routing algorithm for telecommunication networks. AntNet is an adaptive, distributed, mobile-agents-based algorithm which was inspired by recent work on the ant colony metaphor. We apply AntNet in a datagram network and compare it with both static and adaptive state-of-the-art routing algorithms. We ran experiments for various paradigmatic temporal and spatial traffic distributions. AntNet showed both very good performances and robustness under all the experimental conditions with respect to its competitors.

255 citations


Journal ArticleDOI
TL;DR: The authors outline the design issues facing the next generation of backbone, enterprise, and access routers, and present a survey of advances in router design, identifying important trends, concluding with a selection of open issues.
Abstract: Future routers must not only forward packets at high speeds, but also deal with nontrivial issues such as scheduling support for differential services, heterogeneous link technologies, and backward compatibility with a wide range of packet formats and routing protocols. The authors outline the design issues facing the next generation of backbone, enterprise, and access routers. The authors also present a survey of advances in router design, identifying important trends, concluding with a selection of open issues.

240 citations


Journal ArticleDOI
TL;DR: OPERA as discussed by the authors is a packet experimental routing architecture (OPERA) based on the optical network interface router design that is optically regenerative and supports optical Internet protocol related functions including label swapping, packet routing and forwarding operations and wavelength reuse.
Abstract: This paper describes experimental and simulation results of the optical packet experimental routing architecture (OPERA) project. The OPERA network is based on a novel optical network interface router design that is optically regenerative and supports optical Internet protocol related functions including label swapping, packet routing and forwarding operations and wavelength reuse. Routing is based on subcarrier multiplexed header addressing, packet-rate wavelength conversion, and arrayed waveguide router technology. The routers are cascadable and use a unique double stage wavelength converter that supports header regeneration/replacement and maintains the payload extinction ratio. This approach overcomes dispersion limitations normally encountered using double sideband subcarrier multiplexing across a network. A discrete time simulation of the physical transport in an 8-hop network is reported. Multihop routing is experimentally demonstrated between two all-optical nodes and three input-output (I-O) ports of a waveguide grating array router. Packet-rate subcarrier header processing and wavelength conversion between six wavelengths is shown with high signal-to-noise ratio (SNR) of recovered payload and headers at each hop.

166 citations


Journal ArticleDOI
TL;DR: This paper presents a distributed heuristic algorithm which generates routing trees having a suboptimal network cost under the delay bound constraint, which is fully distributed, efficient in terms of the number of messages and convergence time, and flexible in dynamic membership changes.
Abstract: Multicast routing is to find a tree which is rooted from a source node and contains all multicast destinations. There are two requirements of multicast routing in many multimedia applications: optimal network cost and bounded delay. The network cost of a tree is defined as the sum of the cost of all links in the tree. The bounded delay of a routing tree refers to the feature that the accumulated delay from the source to any destination along the tree shall not exceed a prespecified bound. This paper presents a distributed heuristic algorithm which generates routing trees having a suboptimal network cost under the delay bound constraint. The proposed algorithm is fully distributed, efficient in terms of the number of messages and convergence time, and flexible in dynamic membership changes. A large amount of simulations have been done to show the network cost of the routing trees generated by our algorithm is similar to, or even better than, other existing algorithms.

Patent
17 Apr 1998
TL;DR: In this article, a method for routing nets in an integrated circuit design, comprising the steps of dividing the integrated circuit with lines in first direction and lines in second direction, forming a routing graph having vertices and edges, wherein vertices correspond to locations where lines in the first direction cross lines in a second direction.
Abstract: A method for routing nets in an integrated circuit design, said method comprising the steps of dividing the integrated circuit design with lines in a first direction and lines in a second direction, forming a routing graph having vertices and edges, wherein vertices correspond to locations where lines in the first direction cross lines in the second direction, routing nets as a function of said routing graph with parallel processors operating substantially simultaneously, determining the relative wire congestion among different areas in the integrated circuit design, and rerouting nets passing though areas with a relatively high wire congestion.

Proceedings ArticleDOI
01 Mar 1998
TL;DR: This paper presents a routing algorithm and routing tool that has three unique capabilities relating to very high-speed compile: for a “low stress” routing problem, where the track supply is at least 10% greater than the minimun number of tracks per channel actually needed to route a circuit, and for more difficult routing problems, which take significantly more time.
Abstract: Three factors are driving the demand for rapid FPGA compilation. First, as FPGAs have grown in logic capacity, the compile computation has grown more quickly than the compute power of the available computers. Second, there exists a subset of users who are willing to pay for very high speed compile with a decrease in quality of result, and accordingly being required to use a larger FPGA or use more real-estate on a given FPGA than is otherwise necessary. Third, very high speed compile has been a long-standing desire of those using FPGA-based custom computing machines, as they want compile times at least closer to those of regular computers.This paper focuses on the routing phase of the compile process, and in particular on routability-driven routing (as opposed to timing-driven routing). We present a routing algorithm and routing tool that has three unique capabilities relating to very high-speed compile: For a “low stress” routing problem (which we define as the case where the track supply is at least 10% greater than the minimun number of tracks per channel actually needed to route a circuit) the routing time is very fast. For example, the routing phase (after the netlist is parsed and the routing graph is constructed) for a 20,000 LUT/FF pair circuit with 30% extra tracks is only 23 seconds on a 300 MHz Sparcstation.For low-stress routing problems the routing time is near-linear in the size of the circuit, and the linearity constant is very small: 1.1 ms per LUT/FF pair, or roughly 55,000 LUT/FF pairs per minute.For more difficult routing problems (where the track supply is close to the minimum needed) we provide a method that quickly identifies and subdivides this class into two sub-classes: (i) those circuits which are difficult (but possible) to route and will take significantly more time than low-stress problems, and (ii) those circuits which are impossible to route. In the first case the user can choose to continue or reduce the amount of logic; in the second case the user is forced to reduce the amount of logic or obtain a larger FPGA.

Patent
19 Jan 1998
TL;DR: In this paper, the authors propose a logical link between a mobile station and a serving packet radio support node (SGSN) for updating a routing area in a packet radio network.
Abstract: The invention relates to a cellular packet radio network and to a method for updating a routing area in a packet radio network. Packet radio support nodes (SGSN) are connected to a digital cellular radio network (BSS), which provides a radio interface for the support nodes for packet-switched data transmission between the support nodes and mobile stations. There is a logical link between a mobile station (MS) and a serving packet radio support node (SGSN). The packet radio network utilizes logical routing areas, each of which comprises one or more cells. Each cell broadcasts information on the routing area to which it belongs. The mobile station sends a routing area update request to the packet radio network when it roams to a new cell which belongs to a different routing area than the old cell. The update request includes the identifiers of the old and new routing area. When the packet radio node detects a routing area update carried out by an unknown mobile station, it initiates the establishment of a logical link by sending a link establishment message (LLC Subm, 21, 21') to the mobile station, the message including the same identifier the mobile station used for itself in the routing area update request. The mobile station initializes the logical link at its own end and sends and acknowledgement to the serving packet radio support node.

Journal ArticleDOI
TL;DR: A detailed survey of various techniques for enhancing the performance and reliability of wormhole-routing schemes in directly connected networks and discusses several fault-tolerant wormhole routing algorithms along with their fault-handling capabilities.
Abstract: Wormhole routing has emerged as the most widely used switching technique in massively parallel computers. We present a detailed survey of various techniques for enhancing the performance and reliability of wormhole-routing schemes in directly connected networks. We start with an overview of the direct network topologies and a comparison of various switching techniques. Next, the characteristics of the wormhole routing mechanism are described in detail along with the theory behind deadlock-free routing. The performance of routing algorithms depends on the selection of the path between the source and the destination, the network traffic, and the router design. The routing algorithms are implemented in the router chips. We outline the router characteristics and describe the functionality of various elements of the router. Depending on the usage of paths between the source and the destination, routing algorithms are classified as deterministic, fully adaptive, and partially adaptive. We discuss several representative algorithms for all these categories. The algorithms within each category vary in terms of resource requirements and performance under various traffic conditions. The main difference among various adaptive routing schemes is the technique used to avoid deadlocks. We also discuss a few algorithms based on deadlock recovery techniques. Along with performance, fault tolerance is essential for message routing in multicomputers, and we thus discuss several fault-tolerant wormhole routing algorithms along with their fault-handling capabilities. These routing schemes enable a message to reach its destination even in the presence of faults in the network. The implementation details of wormhole routing algorithms in contemporary commercial systems are also discussed. We conclude by itemizing several future directions and open issues.

Proceedings ArticleDOI
12 Oct 1998
TL;DR: This work proposes a distributed routing scheme, called ticket-based probing, which searches multiple paths in parallel for a satisfactory one, designed to work with imprecise state information and can tolerate high degree of information imprecision.
Abstract: The goal of quality-of-service (QoS) routing is to find a network path which has sufficient resources to satisfy certain constraints on delay, bandwidth and/or other metrics. The network state information maintained at every node is often imprecise in a dynamic environment because of nonnegligible propagation delay of state messages, periodic updates due to overhead concern, and hierarchical state aggregation. The information imprecision makes QoS routing difficult. The traditional shortest-path routing algorithm does not provide satisfactory performance with imprecise state information. We propose a distributed routing scheme, called ticket-based probing, which searches multiple paths in parallel for a satisfactory one. The scheme is designed to work with imprecise state information. It allows the dynamic trade-off between the routing performance and the overhead. The state information of intermediate nodes is collectively used to guide the routing messages along the most appropriate paths in order to maximize the success probability. The proposed algorithm consider not only the QoS requirements but also the cost optimality of the routing path. Extensive simulations show that our algorithm achieve high call-admission ratio and low-cost routing paths with modest overhead. The algorithm can tolerate high degree of information imprecision.

Patent
25 Aug 1998
TL;DR: In this article, a data structure in a router helps to compute viable next hops for forwarding a data packet from a router to its destination along multiple alternate loop-free paths, which are not necessarily of shortest distance.
Abstract: A novel data structure in a router helps to compute viable next hops for forwarding a data packet from a router to its destination along multiple alternate loop-free paths, which are not necessarily of shortest distance. Each viable next hop may also be specified with a degree of optimality, which enables a route to perform QoS routing and fault-tolerant routing efficiently. The data structure can be implemented as an add-on software to existing routing protocols and may be implemented in existing networks which use shortest path protocols, even where less than all of the routers use the data structure and multiple path scheme described herein.

Proceedings ArticleDOI
29 Mar 1998
TL;DR: A new distributed algorithm for the dynamic computation of multiple loop-free paths from source to destination in a computer network or Internet are presented, validated, and analyzed.
Abstract: A new distributed algorithm for the dynamic computation of multiple loop-free paths from source to destination in a computer network or Internet are presented, validated, and analyzed. According to this algorithm, which is called DASM (diffusing algorithm for shortest multipath), each router maintains a set of entries for each destination in its routing table, and each such entry consists of a set of tuples specifying the next router and distance in a loop-free path to the destination. DASM guarantees instantaneous loop freedom of multipath routing tables by means of a generalization of Dijkstra and Scholten's diffusing computations. With generalized diffusing computations, a node in a directed acyclic graph (DAG) defined for a given destination has multiple next nodes in the DAG and is able to modify the DAG without creating a directed loop. DASM is shown to be loop-free at every instant, and its average performance is analyzed by simulation and compared against an ideal link-state algorithm and the diffusing update algorithm (DUAL).

Patent
17 Apr 1998
TL;DR: In this paper, a routing graph for an integrated circuit design is constructed, and a general task for optimizing the routing in the routing graph is generated in parallel by assigning different processors different strips to process.
Abstract: A method for routing nets in an integrated circuit design, said method comprising the steps of forming a routing graph for an integrated circuit design, said routing graph have edges in a first direction and edges in a second direction, globally routing said integrated circuit design in accordance with said routing graph, dividing the routing graph into strips, for each strip in the routing graph, generating a general task for optimizing the routing in the strip, solving general tasks in parallel by assigning different processors different strips to process.

Proceedings ArticleDOI
26 May 1998
TL;DR: TAMCRA possesses tunable accuracy (coupled to the running time) via one integer parameter k which reflects the number of shortest paths taken into account during computation.
Abstract: Quality of service (QoS) provisioning generally assumes more than one QoS measure which implies that QoS routing can be categorized as an instance of routing subject to multiple constraints. The ATM-forum PNNI standard, in particular the routing part, belongs to the most promising, future-save, QoS-aware, dynamical and hierarchical routing protocols. The PNNI QoS algorithm is vendor specific and not standardized. Here we propose an attractive multiple QoS routing algorithm, called TAMCRA, standing for tunable accuracy multiple constraints routing algorithm, well suited for PNNI. TAMCRA possesses tunable accuracy (coupled to the running time) via one integer parameter k which reflects the number of shortest paths taken into account during computation.

Journal ArticleDOI
TL;DR: This work focuses on (partial) permutation, k-relation routing, routing to random destinations, dynamic routing, isotonic routing, fault tolerant routing, and related sorting results.

Journal ArticleDOI
TL;DR: A performance-oriented placement and routing tool for field-programmable gate arrays using recursive geometric partitioning for simultaneous placement and global routing, and a graph-based strategy for detailed routing that optimizes source-sink pathlengths, channel width and total wirelength.
Abstract: This paper presents a performance-oriented placement and routing tool for field-programmable gate arrays. Using recursive geometric partitioning for simultaneous placement and global routing, and a graph-based strategy for detailed routing, our tool optimizes source-sink pathlengths, channel width and total wirelength. Our results compare favorably with other FPGA layout tools, as measured by the maximum channel width required to place and route several benchmarks.

Patent
Takefumi Hiraga1
27 Mar 1998
TL;DR: In this article, an automatic routing device which automatically conducts placement and routing of integrated circuits on an integrated circuit chip, including a wire capacitance calculating unit, a degree of wire congestion calculating unit and a routing checking unit for determining whether routing of a desired net is possible or not, is presented.
Abstract: Automatic routing device which automatically conducts placement and routing of integrated circuits on an integrated circuit chip, including a wire capacitance calculating unit, a degree of wire congestion calculating unit and a routing checking unit for determining whether routing of a desired net is possible or not based on a degree of wire congestion at each global routing cell boundary formed by the division of a logic circuit chip to be processed into global routing cells, and a number of grids calculating units, a grid use rate calculating unit and a grid use rate checking unit for determining whether routing of a desired net is possible or not based on a state of the use of a routing track grid in each global routing cell formed on the logic circuit chip.

Patent
25 Aug 1998
TL;DR: In this article, the authors propose a method and apparatus for determining the next router that a data packet is transmitted to on its way to a destination host by traversing a routing table (41) using a hardware search engine (46) and a unique search tree.
Abstract: A method and apparatus (25) for determining the next router (25, 26, 27, 28) that a data packet is transmitted to on its way to a destination host (33-35) by traversing a routing table (41) using a hardware search engine (46) and a unique search tree (Fig. 16). The step of traversing each node in the search tree (Fig. 16) takes only one memory cycle, decreasing in half the time it takes to search a routing table (41) and thus forward data packets on a system of computer networks (8). This is accomplished by storing the decision bit for each node in its parent node rather than in the node itself. The apparatus may use a hardware search engine (46) to search the routing table (41).

Proceedings ArticleDOI
29 Mar 1998
TL;DR: It is demonstrated that for multipath sets that are suffix matched, forwarding can be efficiently implemented with (1) a per packet overhead of a small, fixed-length path identifier, and (2) router space overhead linear in K, the number of alternate paths between a source and a destination.
Abstract: We motivate and formally define dynamic multipath routing and present the problem of packet forwarding in the multipath routing context. We demonstrate that for multipath sets that are suffix matched, forwarding can be efficiently implemented with (1) a per packet overhead of a small, fixed-length path identifier, and (2) router space overhead linear in K, the number of alternate paths between a source and a destination. We derive multipath forwarding schemes for suffix matched path sets computed by both de-centralized (link-state) and distributed (distance-vector) routing algorithms. We also prove that (1) distributed multipath routing algorithms compute suffix matched multipath sets, and (2) for the criterion of ranked k-shortest paths, decentralized routing algorithms also yield suffix matched multipath sets.

Proceedings ArticleDOI
11 Oct 1998
TL;DR: A tailored version of string migration for the genetic routing algorithm is proposed in order to realize effective information exchanges among nodes to have optimal route with less communication overhead in the network.
Abstract: This paper presents a string migration scheme for an adaptive network routing algorithm called a genetic routing algorithm which employs genetic operators to create alternative routes in a routing table. String migrations are employed usually in islands model of parallel or distributed genetic algorithms, which exchange strings among subpopulations to accelerate their convergence. We propose a tailored version of string migration for the genetic routing algorithm in order to realize effective information exchanges among nodes to have optimal route with less communication overhead in the network.

Proceedings ArticleDOI
29 Mar 1998
TL;DR: Simulation results are presented showing that the ALVA outperforms the OSPF in terms of communication and storage overhead.
Abstract: An area-based link-vector algorithm (ALVA) is introduced for the distributed maintenance of routing information in very large internetworks. According to ALVA, destinations in an internetwork are aggregated in areas in multiple levels of hierarchy. Routers maintain a database that contains a subset of the topology at each level of the hierarchy. This subset corresponds to those links used in preferred paths to reach destinations (nodes inside the same immediate area or remote areas). The ALVA is the first hierarchical routing algorithm based on link-state information that does not require complete topology information at each level in the hierarchy. The correctness of the ALVA is verified. Simulation results are presented showing that the ALVA outperforms the OSPF in terms of communication and storage overhead.

Journal ArticleDOI
TL;DR: A general theoretical framework for the study of deadlock-free routing functions and gives a general definition of what can be a routing function, which embraces most of the theories related to deadlock avoidance in wormhole-routed networks previously derived in the literature.
Abstract: Most machines of the last generation of distributed memory parallel computers possess specific routers which are used to exchange messages between nonneighboring nodes in the network. Among the several technologies, wormhole routing is usually preferred because it allows low channel-setup time and reduces the dependency between latency and internode distance. However, wormhole routing is very susceptible to deadlock because messages are allowed to hold many resources while requesting others. Therefore, designing deadlock-free routing algorithms using few hardware facilities is a major problem for wormhole-routed networks. In this paper, we describe a general theoretical framework for the study of deadlock-free routing functions. We give a general definition of what can be a routing function. This definition captures many specific definitions of the literature (e.g., vertex dependent, input-dependent, source-dependent, path-dependent etc.). Using our definition, we give a necessary and sufficient condition which characterizes deadlock-free routing functions. Our theory embraces, at a high level, most of the theories related to deadlock avoidance in wormhole-routed networks previously derived in the literature. In particular, it applies not only to one-to-one routing, but also to one-to-many routing. The latter paradigm is used to solve the multicast problem with the path-based or tree-based facility.

Journal ArticleDOI
TL;DR: The set of networks which support a linear or a linear strict interval routing function with only one interval per direction is characterized and the main properties satisfied by the popular networks used to interconnect processors in a distributed memory parallel computer are derived.
Abstract: Interval routing was introduced to reduce the size of routing tables: a router finds the direction where to forward a message by determining which interval contains the destination address of the message, each interval being associated to one particular direction. This way of implementing a routing function is quite attractive but very little is known about the topological properties that must satisfy a network to support an interval routing function with particular constraints (shortest paths, limited number of intervals associated to each direction, etc.). In this paper we investigate the study of the interval routing functions. In particular, we characterize the set of networks which support a linear or a linear strict interval routing function with only one interval per direction. We also derive practical tools to measure the efficiency of an interval routing function (number of intervals, length of the paths, etc.), and we describe large classes of networks which support optimal (linear) interval routing functions. Finally, we derive the main properties satisfied by the popular networks used to interconnect processors in a distributed memory parallel computer.

01 Jan 1998
TL;DR: This paper addresses the compilation time issue for routing array FPGAs with segmented routing architectures by treating the routing problem as an A∗ search, and shows that it is possible to trade additional device routing resources for decreased router run-time by converting an exhaustive breadth-first maze route into a shorter depth-first route.
Abstract: In the next few years, logic capacities for fieldprogrammable gate arrays are expected to exceed one million gates per device. While this expansion of FPGA device resources offers the promise of exceptional finegrained performance for developing technologies such as ASIC prototyping and FPGA computing, supporting computer-aided design tools have yet to be developed to target these devices rapidly and efficiently. This paper addresses the compilation time issue for routing array FPGAs with segmented routing architectures. By treating the routing problem as an A∗ search, it is possible to trade additional device routing resources for decreased router run-time by converting an exhaustive breadth-first maze route into a shorter depth-first route. It is shown that for the depth-first case, the sparse nature of FPGA routing switches in commerical architectures, such as the Xilinx XC4000 family, necessitates an additional localized search near net inputs, called domain negotiation, to aid in directing the route of each design net onto a set of routing resources most likely to lead to a successful route. For a set of large FPGA benchmarks, a route time speedup of over an order of magnitude for an iterative maze router configured for depth-first routing is shown when compared to the same router configured for a breadth-first search.