Showing papers on "Equivalent circuit published in 1993"

Quasi-TEM description of MMIC coplanar lines including conductor-loss effects

Abstract: A quasi-TEM model of MMIC coplanar structures is presented. The elements of the distributed equivalent circuit are calculated by closed-form approximations and hence can easily be implemented into CAD packages. The effects of nonideal conductors are included as well as substrate loss and finite metallization thickness. The description holds for the entire quasi-TEM range, i.e. for typical MMIC geometries from DC to millimeter-wave frequencies. The validity of the model was checked by comparison to full-wave results. The errors for the effective dielectric constant and the characteristic impedance range below 5% for the attenuation typical values of 5-10% are found (maximum: 20%). >

High-speed VLSI interconnect modeling based on S-parameter measurements

Abstract: A first-level-metal single-conductor IC interconnect model is developed for high-speed and high-density VLSI circuit design. The model shows interconnect circuit parameters that vary with frequency. Existing interconnect models exclude effects such as capacitive fringing and the influence of substrate conductance. The new model represents fine-line as well as wide-line interconnect behavior over a 20-GHz frequency range and includes these effects. The model parameters are compared to scattering parameter measurements as well as numerical simulations based on PISCES-II. Excellent agreement is shown with S-parameter measurements. >

Capacitance requirements of self-excited induction generators

Abstract: A simple method for computing the minimum value of capacitance, C min. required for initiating voltage build-up in a three-phase self-excited induction generator (SEIG) is presented. Based on the steady-state equivalent circuit model, a consideration of the circuit conductances yields a sixth-degree polynomial in the per-unit frequency. The polynomial can be solved for real roots, which enables the value of C/sub min/ to be calculated. Critical values of load impedance and speed, below which the machine fails to self-excite irrespective of the capacitance used, are found to exist. Closed form solutions for C/sub min/ are derived for no-load and inductive loads. Using the same numerical approach, an interative procedure is developed for predicting the capacitance required for maintaining the terminal voltage at a preset value when the generator is supplying load. Experimental results obtained on a 2 kW induction machine confirm the feasibility and accuracy of the proposed methods. >

Three steps to chaos. II. A Chua's circuit primer

Abstract: For Pt. I see ibid., vol. 40, no. 10, p. 640, 1993. Linear system-theory provides an inadequate characterization of sustained oscillation in nature. This two-part exposition of oscillation in piecewise-linear dynamical systems, guides the reader from linear concepts and simple harmonic motion to nonlinear concepts and chaos. By means of three worked examples, the authors bridge the gap from the familiar parallel RLC network to exotic nonlinear dynamical phenomena in Chua's circuit. The goal is to stimulate the reader to think deeply about the fundamental nature of oscillation and to develop intuition into the chaos-producing mechanisms of nonlinear dynamics. In order to exhibit chaos, an autonomous circuit consisting of resistors, capacitors, and inductors must contain (1) at least one nonlinear element, (2) at least one locally active resistor, and (3) at least three energy-storage elements. Chua's circuit is the simplest electronic circuit that satisfies these criteria. In addition, this remarkable circuit is the only physical system for which the presence of chaos has been proved mathematically. The circuit is readily constructed at low cost using standard electronic components and exhibits a rich variety of bifurcations and chaos. Part II in this series studies bifurcations and chaos in a robust practical implementation of Chua's circuit. >

Energy-conservation approach to modeling PWM DC-DC converters

Abstract: A systematic method is presented for including parasitic resistances and offset voltage sources of power switches in averaged dynamic large-signal, DC, and small-signal circuit models of pulse-width modulated (PWM) converters operating in continuous conduction mode (CCM). This method is based on the principle of energy conservation. The approach takes into account the inductor current ripple. For zero-ripple current, the method gives the same results as the state-space averaging method. Reflection rules are introduced and used to simplify the models. As an example, a modeling procedure for the PWM buck converter is detailed. >

Series and parallel connection of multiterminal quantum Hall‐effect devices

Abstract: The circuit properties of networks which include multiterminal quantum Hall‐effect (QHE) devices are discussed. It is shown that QHE devices can be placed in a series or in parallel using multiple links to give equivalent four‐terminal quantized resistances which are in practice, to a high degree of accuracy, independent of contact resistances to the two‐dimensional electron gas in the samples and of series resistances in the links. The same technique of multiple links can also be used to incorporate QHE devices in resistance or impedance bridges, resulting in a balance condition which is practically unaffected by contact or series resistances. These properties are established using calculations based on equivalent circuits of QHE devices. Metrological applications include the obtainment of accurate reference standards of resistance with values which are multiples or submultiples of individual quantized Hall resistances (QHRs) and, using a resistance bridge, the precise comparison of QHRs. An experimental verification is reported, demonstrating that the effective equivalent resistance of two QHE devices connected in parallel does not differ from nominal by more than a few parts in 109.

Lumped equivalent circuits of magnetic components: the gyrator-capacitor approach

Abstract: In place of the conventional reluctance-resistance analogy for forming lumped equivalent circuits of inductive components, a permeance-capacitance analogy is advocated. In this approach, magnetic paths are modeled by capacitive circuits and windings are represented by gyrator two-ports. The technique is applied to the integrated magnetics of a zero-ripple isolated Cuk DC-DC converter allowing its electrical and magnetic circuits to be simultaneously simulated with SPICE. >

Multiple chemical information from the thickness shear mode acoustic wave sensor in the liquid phase

Abstract: The effects of viscosity, density, and dielectric constant of a liquid on the response of a thickness shear mode (TSM) bulk acoustic wave sensor are examined. The different behaviors of the characteristic frequencies upon perturbation of the equivalent circuit parameters are studied and the complementary nature of the motional inductance and motional capacitance discussed

Output circuit for interfacing integrated circuits having different power supply potentials

Abstract: An output driver circuit has a circuitry portion (70) which is used to generate a Drive-Hi control signal in response to an Output Enable, an optional Precondition signal, and a Data Input signal. A circuit portion (75) ensures that the Drive-Hi control signal is maintained at a voltage which is substantially equal to Vdd when the Output Enable is deactivated. Circuit portion (80) selectively controls the Data Output by driving Vdd onto the Data Output in response to the Drive-Hi control signal being activated. A circuit portion (100) functions to selectively drive the Data Output to a logic zero (ground potential) when a Drive-Lo signal is asserted. Circuit portions (90 and 95) generate the Drive-Lo signal in response to the Output Enable, the optional Precondition signal, and the Data Input signal. In general, the output driver circuit allows an integrated circuit powered at a first voltage to interface to another integrated circuit which is powered at a higher second voltage without loss of performance, without excessive leakage currents, without crossover current, and without increasing gate oxide stresses.

A simplified network approach to the VAr control problem for radial distribution systems

Abstract: A simplified network approach to the VAr (volt-ampere reactive) control problem in a distribution system with lateral branches is presented. According to this method, the power capacitors are assumed to be located optimally at the feeder branches. The optimal compensation levels (capacitor size) are represented by dependent current sources located at the branch connected buses. The solution of the equivalent circuit for the distribution system yields the values of the voltage at any bus. The actual compensation level is then determined by substituting the bus voltage in the dependent current source formula. The method can be used as an online controller and in the planning stage. It can be easily adapted in an expert system configuration. >

Neuron MOS binary-logic integrated circuits. II. Simplifying techniques of circuit configuration and their practical applications

Abstract: For pt.I see ibid., vol.40, no.3, p.570-6 (March 1993). The fundamental circuit ideas developed by the authors in Part I are applied to practical circuits, and the impact of neuron MOSFET on the implementation of binary-logic circuits is examined. For this purpose, two techniques are presented to simplify the circuit configurations. It is shown that the input-stage D/A converter circuit in the basic configuration can be eliminated without any major problems, resulting in improved noise margins and speed performance. Then a design technique for symmetric functions, which is especially important when the number of input variables increases, is presented. The nu MOS logic design is characterized by a large reduction in the number of transistors as well as of interconnections. However, the decrease in transistor count comes at a cost in process tolerance due to the multivalued nature of the device operation. Test circuits were fabricated by a typical double-polysilicon CMOS process, and the measurement results are presented. >

On solving constrained optimization problems with neural networks: a penalty method approach

Abstract: Deals with the use of neural networks to solve linear and nonlinear programming problems. The dynamics of these networks are analyzed. In particular, the dynamics of the canonical nonlinear programming circuit are analyzed. The circuit is shown to be a gradient system that seeks to minimize an unconstrained energy function that can be viewed as a penalty method approximation of the original problem. Next, the implementations that correspond to the dynamical canonical nonlinear programming circuit are examined. It is shown that the energy function that the system seeks to minimize is different than that of the canonical circuit, due to the saturation limits of op-amps in the circuit. It is also noted that this difference can cause the circuit to converge to a different state than the dynamical canonical circuit. To remedy this problem, a new circuit implementation is proposed. >

Stability analysis and numerical simulation of multidevice amplifiers

Abstract: Stability analysis of multidevice amplifiers is made on a generalized circuit comprising two n-ports with S-matrices S (active devices) and S' (passive networks) connected at n interface ports. Open-loop transfer functions defined for a signal-flow graph and its (n-1) subgraphs of incident and reflected waves at the interface ports are expressed in terms of det M/sub n/ and its minors, where M/sub n/=S'S-I/sub n/ and I/sub n/ is the n*n identity matrix. it is shown that the Nyquist plots of the n transfer functions completely characterize the number of right-half complex-frequency-plane zeros of det M/sub n/, and hence the amplifier stability. Insertion of an ideal circulator and isolators at the interface ports enables one to calculate the Nyquist plots and voltage distributions of possible instabilities using commercially available linear circuit simulators. Numerical simulations for two types of parallel-operated GaAs FET amplifiers are performed to verify the usefulness of the analysis in design-phase check of multidevice amplifier stability. >

Semiconductor integrated circuit with input/output interface adapted for small-amplitude operation

Abstract: A semiconductor integrated circuit includes a switch unit for controlling the supply of a power source voltage to a signal amplification circuit for receiving an input signal, and a control unit for selectively turning ON and OFF the switch unit in accordance with the amplitude or frequency of the input signal. By the constitution, it is possible to provide an input circuit or an output circuit capable of being applied to an input/output interface adapted for a small amplitude operation.

Equivalent circuit of a dipole antenna using frequency-independent lumped elements

Abstract: A four-element lumped-parameter equivalent circuit, consisting of a resistance, an inductance, and two capacitances, has been found to represent the feed-point impedance of a dipole antenna. The values of these elements are related only to the physical dimensions of the antenna, not the frequency of operation. Empirical formulas are given for all the elements. The equivalent circuit gives negligible errors in radiation resistance and reactance for dipole half-lengths less than 0.1 lambda , rising to 1% for resistance and 6% for reactance at 0.25 lambda . It can be readily used in standard computer software packages such as SPICE, PSPICE, and MICROCAP. >

Improved equivalent circuit for determination of MESFET and HEMT parasitic capacitances from "Coldfet" measurements

Abstract: An improved equivalent circuit for MESFET and HEMT devices under zero drain bias pinched-off conditions is proposed. Parasitic gate and drain capacitances evaluated from low-frequency Y parameters using this circuit are approximately equal under conditions where equality would be expected from bond pad geometry considerations. In contrast, the previously used circuit considerably overestimates parasitic drain capacitance. >

Impedance spectroscopy of human erythrocytes: system calibration, and nonlinear modeling

Abstract: The authors present an impedance measurement method, the cell embedding technique, for human erythrocytes, and an accurate calibration procedure for a four-electrode impedance measurement system that gives reliable results over a wide frequency range-1 Hz to 10 MHz. To achieve high sensitivity, the cells are embedded in the pores of a Nuclepore filter. The calibration procedure assumes that the measurement system is linear and require measurement of three reference impedances. The reliability of the procedure is demonstrated with various RC circuits. Its application to the bio-impedance measurement system eliminates a quasi-dispersion in the high-frequency range and increases the bandwidth at both the low- and high-frequency ends of the range by about a decade. The experimental data are fitted to, an equivalent circuit model of the impedance of the embedded cells. The impedance spectra display constant-phase-angle (CPA) characteristics, which are used to describe the AC response of the interface between the cell surface, and the external electrolyte solution. Such a CPA element may be related to fractal character of the interface. >

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

Abstract: This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current. >

Three steps to chaos. I. Evolution

Abstract: In this two-part exposition of oscillation in piecewise-linear dynamical systems, we guide the reader from linear concepts and simple harmonic motion to nonlinear concepts and chaos. By means of three worked examples, we bridge the gap from the familiar parallel RLC network to exotic nonlinear dynamical phenomena in Chua's circuit. Our goal is to stimulate the reader to think deeply about the fundamental nature of oscillation and to develop intuition into the chaos-producing mechanisms of nonlinear dynamics. In order to exhibit chaos, an autonomous circuit consisting of resistors, capacitors, and inductors must contain i) at least one nonlinear element ii) at least one locally active resistor iii) at least three energy-storage elements. Chua's circuit is the simplest electronic circuit that satisfies these criteria. In addition, this remarkable circuit is the only physical system for which the presence of chaos has been proven mathematically. We illustrate by theory, simulation, and laboratory experiment the concepts of equilibria, stability, local and global behavior, bifurcations, and steady-state solutions. >

Electrical conductivity measurements using microfabricated interdigitated electrodes

Abstract: Microfabricated interdigitated electrode arrays were constructed and evaluated for use as miniature conductivity cells. The arrays were 2×3 mm in size and had digits ranging in size from 10 to 80 μm. The complex electrical impedance of the devices was measured at frequencies spanning from 100 to 100 kHz in solutions with resistivities ranging from 10 to 67 000 Ω/cm. An electromagnetic field model of the interdigitated electrode geometry was used to calculate cell constants. The resulting values ranged from 0.07 to 0.55 cm -1 , and they agreed well with the experimental data. The frequency dependence of the complex electrical impedance could be represented by an equivalent circuit incorporating an interfacial impedance consisting of a double-layer capacitance in series with a Warburg-type diffusion impedance

A rigorous yet simple method for determining stability of linear N-port networks [and MMIC application]

Abstract: The authors describe a technique for easily calculating normalized determinant function using return ratios. It is shown that an elegant yet simple relationship exists between the return ratios of each dependent source in a linear network and Platzker's normalized determinant function. Using this relationship, the stability (or instability) of linear N-port networks containing any number of active devices can easily be determined using commercially available circuit simulators. An example is shown where this new technique correctly predicts instability in a GaAs MMIC power amplifier. >

Concurrent error detection and fault-tolerance in linear analog circuits using continuous checksums

Abstract: The problem of concurrent error detection and fault tolerance is studied. These checksums of time-varying functions are possible because the function of a linear analog circuit can be represented mathematically by a set of matrices to which checksum codes can be applied. For the purpose of error detection, it is assumed that a fault can cause the value of a passive circuit component to deviate from its normal value, result in a line short or open, or change the operating characteristics of the active components (operational amplifiers). If the specifying parameters of a linear analog circuit change due to a fault and the failed circuit behaves as a linear system, then error correction is performed by compensating for the changed parameter values. Otherwise, partical correction is possible. Error detection and correction are performed by a small amount of hardware added to the linear analog circuit. The hardware overhead is virtually constant irrespective of the circuit size, and the sensitivity of the error detection circuit to failures can be easily calibrated. >

Performance of single phase induction generators

Abstract: The paper describes the performance of an isolated self-excited single phase induction generator when the excitation capacitor is connected to one winding and the load is connected to the other. Depending upon the equivalent circuit, nonlinear simultaneous equations of the magnetisation reactance and operation frequency, have been used for computer simulation of the two cases. Newton Rhapson numerical methods have been found suitable for the solution of the equations. Computer results have been supported by laboratory tests. The models have been used to study the effect of machine parameters on the general performance of the machine. >

Characteristics estimation of a traveling wave type ultrasonic motor

Abstract: A method for calculating the load characteristics of a traveling-wave-type ultrasonic motor (TWUM) is proposed. A systematic method using an equivalent circuit is suggested for estimating the performance of the motor, including its electrical and the mechanical parts. In the proposed method, a governing equation for the motor is derived to describe the relation between the applied voltage at an electrical terminal, vibration velocities, and the external forces at mechanical terminals of a vibrator. A method for estimating the forces between the rotor and the vibrator of the motor is presented and used to calculate the load characteristics. The numerically calculated load characteristics are shown to agree well with the measured ones, confirming the validity of the method. >

An active square loop frequency selective surface

Abstract: An active frequency selective surface incorporating PIN diodes as switches is discussed. Waveguide simulation studies show that the frequency response of the surface can be electronically switched from that of a reflecting structure to a transmitting structure. A semi-empirical model based on a series-connected LC equivalent circuit approach gives agreement with measurements. >

Analog circuit testing based on sensitivity computation and new circuit modeling

Abstract: Analog circuit testing is considered to be a very difficult task, due mainly to the lack of fault models and accessibility to internal nodes. An approach is presented for analog circuit modeling and testing to overcome this problem. This circuit modeling is based on a sensitivity computation and on circuit structure, which are crucial in analog circuit testing. The testability of the circuit is achieved for the simple fault model and by functional testing. Component deviations are deduced by measuring a number of output parameters, and through sensitivity analysis and tolerance computation. Using this approach, adequate tests are identified for testing both catastrophic and soft faults. Some experimental results are presented. >

Average simulation of PWM converters by direct implementation of behavioral relationships

Abstract: Average modeling of PWM power converters is reexamined in the light of the behavioral dependent sources now included in modern versions of electronic circuit simulators. A topology independent behavioral model is developed to emulate the operation of PWM converters in voltage and current modes, for continuous and discontinuous inductor current cases. It is shown that, in general, the operation of the switching part involves three behavioral blocks, i.e., the generic switched inductor model (GSIM), the duty cycle generator (DCG), and the inductor current generator (ICG). Explicit expressions and equivalent circuits are developed for all possible modes of operation. >

Detection and location of internal defects in the insulation of power transformers

Abstract: With the development of fast, and low-cost analog-digital converters (ADCs) and new mathematical procedures for waveform description, e.g., time encoded signal processing and recognition (TESPAR), novel approaches to detect and locate internal defects in the insulation of power transformers become feasible if the following requirements are fulfilled: the equivalent circuit of the insulating system, suitable for the fast partial discharge (PD) signals with risetimes of approximately 10 ns, is known; the response of the insulating system to PD signals injected at least at three different sites of each winding (top, center, bottom) is calculated, or measured at the signal tap-off points (i.e., bushings); and the pattern matrix of all calculated or measured signals exists: e.g., encoded and signal processes with TESPAR as a reference. The above mentioned requirements are examined for quasi-simultaneous detection and location of internal defects in power transformers. The method is applied to PD measurements on power transformers. >