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Showing papers on "Equivalent series resistance published in 1984"


Journal ArticleDOI
TL;DR: The concept of contact resistivity is discussed briefly and a technique for its measurement is presented in this article, where the relative importance of contact resistance compared to other sources of power loss in a solar cell is determined for a typical contact system.
Abstract: The concept of contact resistivity is discussed briefly and a technique for its measurement is presented. This technique allows for resistive contact material and for the possibility that the semiconductor sheet resistance beneath the contact differs from the semiconductor sheet resistance beside the contact. The test pattern is unique in that the effects of contact resistance are accumulated over the pattern, nearly unencumbered by voltage and current probes which might otherwise influence the current flow. Measurements of contact resistivities for typical solar cell metallizations using this technique are reported to be in the mid 10-6Ω-cm2range. The relative importance of contact resistance compared to other sources of power loss in a solar cell is determined for a typical contact system. Expressions derived in order to make this comparison are useful for evaluating and optimizing a solar cell contact system. Values of series resistance calculated using these expressions are compared with measured values.

222 citations


Journal ArticleDOI
TL;DR: In this article, the authors proposed a method to determine the channel length and gate voltage-dependent source-and-drain series resistance of an LDD MOSFET and a modal for the LDD device current at small drain-source voltage.
Abstract: The introduction of n- regions makes an LDD MOSFET behave differently from a conventional MOSFET. The source-and-drain series resistance, which consists of the n+-and-n-regions, shows a strong dependence on the gate bias. Also, the apparent effective length can vary with gate bias. These special features cause the traditional method to determine effective channel length and series resistance inapplicable. In this letter, we propose a method to determine the "intrinsic" channel length and gate-voltage-dependent source-and-drain series resistance of an LDD MOSFET and a modal for the LDD device current at small drain-source voltage.

95 citations


Journal ArticleDOI
TL;DR: In this article, a simple method for determining the channel length and in situ gate-oxide thickness of MOSFETs is described, based on the linear relationship between the intrinsic gate capacitance and effective channel length.
Abstract: A simple method for determining the channel length and in situ gate-oxide thickness of MOSFETs is described. The method is based on the linear relationship between the intrinsic gate capacitance and effective channel length. Measurements from two gate biases on devices of different channel lengths are sufficient to obtain a full characterization. In contrast to the channel-resistance method, the accuracy of the capacitance method is independent of the source-drain and contact series resistance. It can, therefore, be used for conventional as well as lightly-doped drain (LDD) devices. Channel length and gate-oxide thickness determined by this method are given for conventional and LDD MOSFET's. For conventional MOSFET's, the new method agrees with the traditional effective length measurements to better than 0.1 µm.

74 citations


Journal ArticleDOI
TL;DR: In this article, the effect of non-uniform illumination on the measurement of the photogenerated current and open-circuit voltage characteristics is investigated and an approximate and simple theoretical model is derived to explain the effect and evaluate the relative importance of the three governing factors.

66 citations


Journal ArticleDOI
TL;DR: In this paper, the fabrication and high-frequency performance of MBE-grown AlGaAs/GaAs heterojunction bipolar transistors (HBT's) is described, and the achieved gain-bandwidth product f T is 25 GHz for a collector current density J c of 1 × 104A/cm2 and a collector-emitter voltage V CE of 3 V.
Abstract: The fabrication and high-frequency performance of MBE-grown AlGaAs/GaAs heterojunction bipolar transistors (HBT's) is described. The achieved gain-bandwidth product f T is 25 GHz for a collector current density J c of 1 × 104A/cm2and a collector-emitter voltage V CE of 3 V.f T continues to increase with the collector current in the high current density region over 1 × 104A/cm2with no emitter crowding effect nor Kirk effect. The limitation on f T in fabricated devices is found to be caused mainly by the emitter series resistance.

59 citations


Journal ArticleDOI
Kwyro Lee1, Michael Shur1, K.W. Lee1, Tho T. Vu2, P. Roberts2, M. Helix2 
TL;DR: In this article, the authors proposed a new interpretation of the "end" resistance measurements for field effect transistors (FETs) based on the solution of the current transport equations under the gate and relates the end resistance to the source series resistance and the channel resistance of the device.
Abstract: We propose a new interpretation of the "end" resistance measurements for field-effect transistors (FET's). This interpretation is based on the solution of the current transport equations under the gate and relates the "end" resistance to the source series resistance and the channel resistance of the device. The values of the series source and drain resistances determined for GaAs ion-implanted FET's, using our formulas for the "end" resistance, are in excellent agreement with the values obtained using our modification of the Fukui method [1].

47 citations


Patent
09 Mar 1984
TL;DR: In this paper, an NE555 integrated circuit with resistances and capacitances is presented for controlling lamp flash interval and duration, where the capacitance is provided by two capacitors.
Abstract: A circuit for controlling lamp flash interval and duration which comprises an NE555 integrated circuit in combination with resistances and capacitances. In the circuit, a resistor and a capacitive switch in series therewith govern flash interval. The capacitive switch includes a normally closed centrifugal switch which, when closed, presents a given capacitance in series with the resistor and when open presents a reduced capacitance in series with the resistor. The capacitance is provided by two capacitors. In one embodiment, when the switch is closed, one capacitor is in series with the resistor and the other is bypassed and when the switch is open, both capacitors are in series with each other and with the resistor. In the other embodiment, when the switch is closed, the two capacitors are parallel with each other and in series with the resistor and when the switch is open, one of said parallel capacitors is bypassed.

37 citations


Journal ArticleDOI
TL;DR: In this article, an extended "end" resistance measurement technique was proposed to determine the series source and drain resistance of a field-effect transistor, defined as a derivative of the drain-source voltage, with respect to the gate current.
Abstract: We propose a new extended "end" resistance measurement technique to determine the series source and drain resistance of a field-effect transistor. In this method the small-signal "end" resistance, defined as a derivative of the drain-source voltage, with respect to the gate current, is measured as a function of the drain current. The "end" resistance includes the contributions from the source series resistance and from the resistance related to the conducting channel under the gate. As the drain current increases, the drain side of the channel becomes more reverse biased with respect to the gate. This shifts the gate current distribution towards the source, decreasing the channel contribution to the "end" resistance. By extrapolation to infinite drain current the channel contribution can be eliminated and the series resistance of the undepleted source and drain regions can be accurately determined. The technique is applied to a long-gate modulation-doped field-effect transistor and is shown to Yield reasonable values of the series resistances.

33 citations


Patent
Adolph Presser1
18 Sep 1984
TL;DR: In this article, an N-way, lumped element, matched, isolated branch power divider in planar form is disclosed, where Lumped inductors are disposed on the top surface of a dielectric substrate.
Abstract: An N-way, lumped element, matched, isolated branch power divider in planar form is disclosed. Lumped inductors are disposed on the top surface of a dielectric substrate, an isolation resistor network is disposed on the bottom surface of the substrate and the substrate is suspended above a ground conductor by lumped element capacitors. The capacitance values of the capacitors and the inductance values of the inductors are selected to provide between the common terminal and each branch terminal a lumped element π network transmission line having a phase shift of about 90° at frequencies within an operating range of frequencies.

32 citations


Patent
01 Jun 1984
TL;DR: In this article, a magnetic relay was used to regulate an ac current circuit using a lamp circuit or electric motor to eliminate or reduce inrush-current in an incandescent lamp circuit.
Abstract: The present invention provides a device for regulating an ac current circuit using a magnetic relay which is suitable for use in an incandescent lamp circuit or electric motor circuit to eliminate or reduce inrush-current. The present device comprises connecting power switch, diodes, series resistance and relay such that, after closing the power switch, an ac current first flows to a load through the series resistance for a brief time, then to the load through the contacts of the relay after a lapse of the brief time by bypassing the series resistance.

30 citations


Journal ArticleDOI
Ching-Te Chuang1
TL;DR: In this paper, the J-V characteristics of epitaxial Schottky barrier diodes were analyzed under C12 C12V low-injection conditions, where the minority carrier injection is negligible and the expression I = Is[exp (q(V−IR)/kT) − 1] describes the I-V over large bias range.
Abstract: The J-V characteristics of epitaxial Schottky barrier diodes are analyzed. Based on the assumption of negligible recombination in the epitaxial layer, formal solution from which the J-V characteristics can be calculated is derived. The solution is valid for all injection levels and reduces to the form I = Is[exp (q(V−IR)/kT) − 1], where R is the series resistance of the epitaxial layer, under C12 C12V low-injection conditions. The analysis is justified by very close correspondence with exact numerical calculations using the Finite Element Device Analysis Program (FIELDAY) in which thermionic emission boundary conditions are implemented for both electrons and holes. It is shown that for low barrier Schottky diodes the minority carrier injection is negligible and the expression I = Is[exp (q(V−IR)/kT) − 1] describes the I-V characteristics over large bias range. For high barrier C12 C12 V Schottky diodes the exact solution must be used as minority carriers are injected and the series resistance is decreased due to conductivity modulation effect.

Journal ArticleDOI
TL;DR: In this article, an improved measurement technique of the basic MOSFET parameters is presented, where the effect of series resistance and channel length can be separated from the mobility measurement.
Abstract: An improved measurement technique of the basic MOSFET parameters is presented. This method is based on the measured data of two identical devices with different channel lengths. The effect of series resistance and channel length can be separated from the mobility measurement. This is the only method in which it has been proved that mobility can be measured on a short channel device. A new technique of channel length and series resistance is done by the measurement of newly defined quantity, R T K, which is the equivalent channel length that includes the effect of series resistance. Because of the success of this measurement method, a new phenomena, which we call channel broadening effect, was investigated. Its effects on the submicrometer device characteristics were investigated.

Journal ArticleDOI
TL;DR: In this article, a distributed parameter model has been proposed for p-n junction solar cells to account for the variation of series resistance due to the forward biasing of the p -n junction under external injection condition.
Abstract: A distributed parameter model has been proposed for p-n junction solar cells to account for the variation of series resistance due to the forward biasing of the p-n junction under external injection condition. The theoretical expression developed using this model predicts a coupling between base and emitter via depletion layer. This coupling becomes stronger with increasing bias and is found to be responsible for the observed decrease of series resistance with rising injection level. Numerical results of our theory are found to agree well with those obtained from experiments.

Journal ArticleDOI
TL;DR: In this paper, the authors describe a new technique which allows one to deduce the mobility profiles under the gate of an ion-implanted GaAs MESFET based on the measurements of the transconductance and the series resistance at very low drain-to-source voltages.
Abstract: We describe a new technique which allows one to deduce the mobility profiles under the gate of an ion-implanted GaAs MESFET. The technique is based on the measurements of the transconductance and the series resistance at very low drain-to-source voltages. The experimental results show that the mobility drops to about 1000 cm2/V . s at the channel interface from its maximum value of about 2500 cm2/ V . s.

Journal ArticleDOI
TL;DR: In this article, the authors developed a model which predicts a fill factor of around 36% for extreme values of the sheet resistance, i.e., a value much closer to accurate computer calculations and to experimental measurements.

Proceedings ArticleDOI
01 Oct 1984
TL;DR: In this article, computer models for MMIC interdigitated capacitors and rectangular spiral inductors are described, which consider the influence of the metallization thickness, the end effects of the fingers, the exact position of fingers on the main line and of the T-junctions in the capacitor.
Abstract: Computer models for MMIC interdigitated capacitors and rectangular spiral inductors are described. The theory of the interdigitated capacitor considers the influence of the metallization thickness, the end effects of the fingers, the exact position of the fingers on the main line and of the T-junctions in the capacitor. The theory of the rectangular spiral inductor is based on a line theory and considers the influence of the metallization thickness and the rectangular line bends.

Patent
Harry J. Venema1
29 Feb 1984
TL;DR: In this article, the capacitance of a pair of capacitors is measured by using an oscillating circuit whose frequency is determined by the capacitances of one of the capacitors.
Abstract: By simultaneously charging a pair of capacitors to the same d-c voltage and then simultaneously discharging those capacitors to the same d-c reference voltage, the two discharge time durations will be functions of and will be proportional to the capacitances of the two capacitors. A comparison of those discharge time durations will thus provide an indication of the ratio of the capacitances of the two capacitors. This is achieved by including, in the measuring system, an oscillating circuit whose frequency is determined by the capacitance of one of the capacitors. A periodically-recurring rectangular wave is then developed having pulse components with pulse widths determined by the capacitance of the other capacitor, the frequency of the rectangular wave being equal to the oscillating frequency. The duty cycle of the rectangular wave is therefore proportional to and represents the ratio of the capacitances of the capacitors. By averaging the rectangular wave in a low-pass filter, an output signal is produced having an amplitude which is proportional to and represents the capacitance ratio.

Journal ArticleDOI
S. Deb1, B. Ghosh1
TL;DR: In this paper, a theoretical analysis of the power losses and contributions to the series resistance which arise from the skin region of thin film solar cells with a grid made up of rectangular meshes is presented.

Journal ArticleDOI
TL;DR: In this article, an optically controlled detector and amplifier is achieved by superimposing a weak source of red light which is amplitude modulated (e.g., chopped) with the blue light.
Abstract: Amorphous silicon photovoltaic devices are often fabricated under conditions which lead to a nonuniform electric field in the intrinsic (i) layer including a field-free region at the rear of the cell. The field-free region can contribute a series resistance, especially if the device has been subjected to prolonged optical stress in sunlight. If a continuous blue light source is directed onto such a sample, the dc photocurrent will be strongly impeded by the series resistance. If, however, a weak source of red light which is amplitude modulated (e.g., chopped) is superimposed with the blue light, the resistance of the device will also be modulated. An audio frequency ac photocurrent will appear, in phase with the modulation present in the red light but of much greater amplitude than the red light itself could provide. Thus an optically controlled detector and amplifier is achieved.

Proceedings ArticleDOI
01 Jan 1984
TL;DR: In this paper, a planar vertical double-diffused field effect transistor (VD-MOSFET) that can deliver maximum output power of 100 W with 8-dB gain at 900 MHz has been developed.
Abstract: A planar vertical double-diffused field-effect transistor (VD-MOSFET) that can deliver maximum output power of 100 W with 8-dB gain at 900 MHz has been developed. Silicide gate (MoSi 2 ) is employed for the reduction of gate series resistance. Also, the silicide is used as a shield plate beneath the bonding area of the gate to reduce the feedback capacitance Cgd. One-micron-long self-aligned channel is formed by using the gate as a mask against the double diffusion of boron and phosphorous. Power gain is increased by 3 dB due to the decrease of the feedback capacitance Cgd, when the shield plate is grounded. Parallel operation of the MOSFETs has been successfully achieved to deliver maximim output power of 100 W CW with 8-dB gain and 46 % drain efficiency at Vds = 45 V and f = 900 MHz in a common-source, push-pull configuration. Power density is 11 W/mm2, twice as high as that of conventional lateral MOSFETs.

Patent
03 Aug 1984
TL;DR: In this article, a constant voltage circuit with the most convenient output voltage characteristics for the load side by using several reference voltage sources of different characteristics to synthesize the characteristics is presented.
Abstract: PURPOSE:To form freely a constant voltage circuit having the most convenient output voltage characteristics for the load side by using several reference voltage sources of different characteristics to synthesize the characteristics. CONSTITUTION:A circuit series contains the 1st reference voltage circuit 10, an operational amplifier 28 and an MOSFET30 whose equivalent resistance is limited by the gate potential. This circuit series functions to keep the potential of an output terminal 33 at the sum of the threshold voltage. While another circuit series consisting of the 2nd reference voltage circuit 27, an operational amplifier 29 and an MOSFET31 functions to keep at the difference of the threshold voltage. The temperature characteristics are opposite to each other between the circuits 10 and 27 and therefore they operate to set off each other.

Book ChapterDOI
01 Jan 1984
TL;DR: In this article, the authors introduce capacitance as a quantitative measure of the charge-storing ability and discuss the equivalent capacitance of series and of parallel combinations of capacitors, as well as the role of the insulator in a capacitor.
Abstract: Publisher Summary No single electronic component plays a more important role in the electronic age than a charge-storing mechanism called capacitor. Capacitors help to understand the energy aspects of electric fields and the properties of insulators. They are used to establish electric fields, to minimize voltage variations in electronic power supplies, to increase the efficiency of electric power transmission, and to provide energy for certain types of nuclear fusion energy devices and nuclear particle accelerators. Capacitors are used in the electronic circuits that detect and generate electromagnetic waves and as the components of electronic circuits used to measure time. This chapter discusses a type of capacitor that consists of two conductors separated by an insulator. It presents the way in which capacitor can accumulate and store a net amount of electric charge. The chapter introduces capacitance as a quantitative measure of the charge-storing ability. It discusses the equivalent capacitance of series and of parallel combinations of capacitors. It presents the energy aspects of capacitors and discusses the role of the insulator in a capacitor.

Journal ArticleDOI
TL;DR: In this article, the correlation between the series resistance and 1/f noise at 1 kHz and 500 mA forward current was measured; it appears that the 1/ f noise is extremely sensitive to the magnitude of the series resistances.

Proceedings ArticleDOI
01 Jan 1984
TL;DR: In this article, a measurement technique for intrinsic gate capacitances of small-geometry MOSFETs is applied to short channel devices and the short-channel transistor capacitance characteristics are found to deviate from those of the long-channel transistors in many aspects.
Abstract: Precision characterization of intrinsic gate capacitances of small-geometry MOSFETs is needed for the design of analog, as well as some digital circuits, such as memories. A new and simple measurement technique for intrinsic MOSFET capacitances which does not require any on-chip circuitry, is applied to short channel devices. The short-channel transistor capacitance characteristics are found to deviate from those of the long-channel transistors in many aspects. An analytical model to explain the measurement results, especially the short-channel effects and above-threshold characteristics, is described. This new mode includes the mobility degradation effect, velocity saturation effect, bias-dependent fringing-field effect, as well as source/drain series resistance effect. Good agreement between the measured and simulated results is found.

Journal ArticleDOI
TL;DR: A method for measuring the series resistance of a solar cell recently proposed by Araujo and Sanchez [1] is compared with that proposed by Wolf and Rauschenbach [2] as discussed by the authors, which is accurate only for cells with very low R s and operating under high illumination conditions.
Abstract: A method for measuring the series resistance of a solar cell recently proposed by Araujo and Sanchez [1] is compared with that proposed by Wolf and Rauschenbach [2]. It is shown that the former method is accurate only for cells with very low R s and operating under high illumination conditions. The latter method is able to determine R s at any particular operating point of the I-V characteristic without a prior knowledge of the other parameters, provided these parameters are independent of illumination.

Patent
12 Jan 1984
TL;DR: In this paper, a photoelectric transducer with oxygen atoms in the first doping layer is formed on ITO (Indium Tin Oxide) or SnO2, thereafter forming the same conductive type a-Si, which does not include oxygen.
Abstract: PURPOSE:To provide a highly efficient photoelectric transducer device, by forming a-Si including oxygen atoms in the first doping layer which is to be formed on ITO (Indium Tin Oxide) or SnO2, thereafter forming the same conductive type a-Si, which does not include oxygen. CONSTITUTION:The concentration of B2H6, which is used for obtaining a P type by 20% SiH4 that is dilluted by an H2 base, is made to be 0.05-1% with respect SiH4. O2 is made to be 2-10vol% with respect to SiH4. This gas is made to act on a substrate at a temperature of 200 deg.C, and a P type a-Si layer with a thickness of 50Angstrom is formed. At this time, suppression effect of SiO or SiO2 is made conspicuous by mixing oxygen, and the increase in series resistance can be prevented when a solar battery is manufactured. The thickness of ordinary P type a-Si 10, in which oxygen atoms are not introduced, is 50Angstrom . The sum of the P type layer is 100Angstrom . In this way, the light absorbing loss is made to be about a half in comparison with the case only the ordinary P type a-Si is used. The P-I interface is not different from the ordinary element. The resistance can be made smaller than a single oxygen doped P type a-Si. The increase in the series resistance can be avoided.

Patent
05 Sep 1984
TL;DR: In this paper, the phase locking time from the state of out of synchronism is reduced by having only use of the diodes D1, D2, and the series resistance is expressed as the R1.
Abstract: PURPOSE:To speed up the phase locking when out of synchronism occurs in a PLL circuit with a small sized circuit by connecting diodes in anti-parallel with a series resistor connected between input and output of a filter in the PLL circuit using a lag filter or a lag/lead filter as a loop filter. CONSTITUTION:When out of synchronism occurs and an output voltage of a phase comparator 2 is increased, the forward resistance of the diode D1 or D2 becomes smaller, and a series resistance between the input and output of the lag/lead filter is decreased equivalently. Thus, the damping factor xsi is increased and the phase locking time is reduced. When the phase locking state is obtained, an output voltage of the phase comparator 2 becomes a constant value and a potential differnce across the series resistor R1 becomes very small, then the resistance of the diodes D1, D2 becomes very large, the series resistance is expressed as the R1, the band of the filter is narrowered and a good S/N is obtained. Thus, the phase locking time from the state of the out of synchronism is reduced by having only to use the diodes D1, D2.

Journal ArticleDOI
TL;DR: In this article, the maximum power point computation for solar cells when both series and shunt resistance losses are present simultaneously has been done analytically in maximum power analysis, and the important solar cell parameters, i.e., open-circuit voltage V oc, shortcircuit current I sc, maximum-power coordinates (I mp, V mp ) and maximum power P mp, fill factor FF and efficiency η have been obtained for the general lossy-cell case.
Abstract: Maximum-power-point computation for solar cells when both series and shunt resistance losses are present simultaneously has been lacking in the past. This paper presents a new and simple method to achieve this task. Hence we become able to incorporate both series resistance R s and shunt resistance R sh, analytically in maximum-power analysis. The method is illustrated by a numerical example. The important solar cell parameters, i.e. open-circuit voltage V oc, short-circuit current I sc , maximum-power coordinates (I mp , V mp ) and maximum power P mp, fill factor FF and efficiency η have been obtained for the general lossy-cell case.

Journal ArticleDOI
TL;DR: In this article, a millimetre-wave planar mixer diode compatible with GaAs MESFET based integrated circuit fabrication has been developed, where selective ion implantation was used to optimise the diode and FET doping profiles.
Abstract: A millimetre-wave planar mixer diode compatible with GaAs MESFET based integrated circuit fabrication has been developed. Selective ion implantation was used to optimise the diode and FET doping profiles. A novel feature reported here is the use of a deep implanted buried n+ layer to minimise diode series resistance, yielding diode cutoff frequencies in excess of 500 GHz. Monolithic balanced mixer diodes integrated with an MESFET IF amplifier fabricated by this technique have given 5dB conversion loss at 60 GHz.

Patent
26 Sep 1984
TL;DR: In order to lower collector series resistance a semiconductor device including collector 65, 85, base 61, 93, and emitter 63, 89 regions further includes a layer 55, 95 made of a material, such as highly doped polycrystalline silicon, metal alloy or organic conductive material, that differs from that of semiconductor layer 39, 87 as discussed by the authors.
Abstract: In order to lower collector series resistance a semiconductor device including collector 65, 85, base 61, 93, and emitter 63, 89 regions further includes a layer 55, 95 made of a material, such as highly doped polycrystalline silicon, metal alloy or organic conductive material, that differs from that of semiconductor layer 39, 87.