Showing papers on "Equivalent series resistance published in 1999"

Power distribution system design methodology and capacitor selection for modern CMOS technology

Abstract: Power systems for modern complementary metal-oxide-semiconductor (CMOS) technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor equivalent series resistance (ESR) and ESL are extremely important parameters in determining how many capacitors are required. SPICE models are then analyzed in the time domain to find the response to load transients.

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

Abstract: High-frequency capacitance-voltage (C-V) measurements have been made on ultrathin oxide metal-oxide-semiconductor (MOS) capacitors. The sensitivity of extracted oxide thickness to series resistance and gate leakage is demonstrated. Guidelines are outlined for reliable and accurate estimation of oxide thickness from C-V measurements for oxides down to 1.4 nm.

High-frequency small-signal model of ferrite core inductors

Abstract: A circuit model of ferrite core inductors is presented. The behavior of the model parameters versus frequency is considered. The total power loss in inductors consisting of the winding resistance loss and the core loss, is modeled by a frequency-dependent equivalent series resistance. The total inductance given by the sum of the main inductance and the leakage inductance is obtained as a function of frequency. In order to study the core equivalent resistance and main inductance versus frequency, the magnetic field distribution in the core is derived from Maxwell's equations for a long solenoid. The complex permeability and permittivity of the ferrite core are introduced in the electromagnetic field equations. Experimental results are also given.

A total resistance slope-based effective channel mobility extraction method for deep submicrometer CMOS technology

Abstract: A simple yet effective total resistance slope-based method for extracting the effective channel mobility in deep submicrometer CMOS technology is developed. Using the slope of the measured total resistance versus mask length, the series resistance is removed from the measured total resistance, and mobility is extracted without involving the effective channel length. The new method facilitates mobility extraction in situations where the effective channel length is difficult to extract, such as in lightly-doped-drain (LDD) devices or at low temperatures. The new method also allows the series resistance to be any function of the gate bias, making the mobility extraction in LDD devices easier and more accurate.

Design strategy of on-chip inductors for highly integrated RF systems

Abstract: This paper describes a physical model for spiral inductors on silicon which is suitable for circuit simulation and layout optimization. Key issues related to inductor modeling such as skin effect and silicon substrate loss are discussed. An effective ground shield is devised to reduce substrate loss and noise coupling. A practical design methodology based on the trade-off between the series resistance and oxide capacitance of an inductor is presented. This method is applied to optimize inductors in state-of-the-art processes with multilevel interconnects. The impact of interconnect scaling, copper metallization and low-K dielectric on the achievable inductor quality factor is studied.

Television tuner employing micro-electro-mechanically-switched tuning matrix

Abstract: A tuning device (10) employs switchable tuning circuits (20, 24, 30, 34) each of which includes a switched tuning matrix comprised of a plurality of micro-electronic electro-mechanical switches and an array of capacitors and/or inductors. Each of the switchable tuning circuits (20, 24, 30, 34) receives a tuning control signal (VC) which controls the respective plurality of micro-electro-mechanical switches to select ones of the capacitors and/or inductors from the array of capacitors and/or inductors. Each array of capacitors and/or inductors and its associated micro-electro-mechanical switches are formed on an integrated circuit or an electronic circuit substrate along with amplifiers and other electronic elements with which the switched tuning matrix is employed.

Solid electrolytic capacitor

Abstract: PROBLEM TO BE SOLVED: To realize a solid electrolytic capacitor of the so-called 'low-ESR type' having small equivalent series resistance(ESR). SOLUTION: Two capacitor elements 2 and 2 are contained in a capacitor (ounter mounting material 1). These respective capacitor elements 2 and 2 are connected in parallel between an anode terminal 5 and a cathode terminal 6. In this way, when a plurality (two pieces) of the capacitors 2 and 2 are provided and connected in parallel, the component of the resistors constituted of the respective resistance components of the respective capacitor elements 2 and 2 themselves among the ESRs of the entire capacitor can be made smaller than the case, when only one capacitor element 2 is used. Thus, the low-ESR type solid electrostatic capacitor can be realized. Furthermore, the capacitance of the entire capacitor becomes an added value of the capacitance obtained by parallel connecting the two respective capacitances of the respective capacitor elements 2 and 2, that is to say, the respective capacitances.

Aluminum electrolytic capacitor

Abstract: An aluminum electrolytic capacitor having an excellent short-circuit resistance, high capacitance, long life, and low equivalent series resistance (ESR) is provided. For this purpose, the aluminum electrolytic capacitor includes a capacitor element having a positive electrode foil, a first separator, a negative electrode foil, and a second separator, which are sequentially laminated one on another and wound together. After the capacitor element is impregnated with a driving electrolyte solution and housed in a metallic case, an open end of the metallic case is sealed with a sealing material. A ratio of B/A, i.e. a ratio of total thickness B of the first and second separators after winding with respect to total thickness A of the first and second separators before winding, is set in the range from 0.5 to 0.8.

Drive level dependence of the resonant frequency in BAW quartz resonators and his modeling

Abstract: The influence of the excitation current on the resonant frequency and its mathematical description makes necessary the introduction of a nonlinear impedance characteristic of the piezoelectric resonator. This influence was modeled by the nonlinear electrical equivalent circuit; the equivalent series resistance and equivalent motional capacitance are taken to be functions of the amplitude of the excitation current by means of the relations derived in the work. The equivalent circuit was analyzed by the method of equivalent linearization. The relationships between the amplitudes of voltage applied on the AT-cut resonator and the first current harmonics or phase-frequency dependence of the excited resonator, respectively, are derived. Amplitude jumps and dynamic temperature change phenomena are discussed.

InGaN blue light-emitting diodes with optimized n-GaN layer

Abstract: In the extensive research dedicated recently to metal- organic chemical vapor deposition (MOCVD)-grown high- efficiency GaN LED device design, a significant effort has been made to increase the conductivity of p-GaN layers, while n-GaN layers received relatively little attention. We demonstrated, both experimentally and theoretically, that the resistivity of n-GaN layers has a profound effect on blue InGaN LED performance. Optimization of n-GaN epitaxial layers allows the achievement of device series resistances below 15 Ohms and forward voltages as low as 2.9 Volts at 20 mA. We have also shown that contactless measurements of sheet resistivity of the entire LED epitaxial structure closely correlate with the ohmic resistance of the GaN layer measured in the fabricated devices. This provides an excellent non-destructive characterization tool for n-GaN optimization. Insufficient n-GaN conductivity is shown to trigger a distinct degradation mechanism by initiating current crowding in a localized device area. InGaN LED lamps with optimized n-GaN layers had a high external quantum efficiency and a good long-term reliability.

Influence of aging on electrolytic capacitors function in static converters: Fault prediction method

Abstract: The failure of electrolytic capacitors is the cause of most breakdowns of static converters The function of these capacitors is to filter and to store electrical energy Accelerated aging tests showed that the increase of the internal resistance ESR of the capacitors is a good indicator of their faulty state The filter function is affected by the capacitors wearout on the one hand At high frequency, the voltage ripple at the terminals of the capacitors increases according to ESR rise On the other hand, the storage function is not much influenced by the capacitors aging As static converters work most of the time at variable load, high transient values of the voltage ripple occur when output current changes that can induce false alarms These transients are verified theoretically and experimentally In order to avoid these transients effects, we suggest to monitor the fundamental component of the voltage ripple This latter waveform is the best signature of the capacitors state The ESR of the capacitors and the time before their failure are deduced from the processing of this waveform with other converter parameters such as input voltage, output current and ambient temperature

Frequency-dependent series resistance of monolithic spiral inductors

Abstract: We present the analysis of the frequency dependent inductor series resistance (R/sub s/). The high-frequency effects on series resistance have been confirmed with measured and simulated data of inductors having different geometric and process parameters in order to predict and optimize the high-performance inductors used in radio frequency (RF) integrated circuits (ICs). The results show that the magnetic field effect seems to be a dominant factor in determining the R/sub s/ in the high-frequency region.

Improved device performance using a semi-transparent p-contact AlGaN/GaN heterojunction positive-intrinsic-negative photodiode

Abstract: We report on the improved device performance of GaN-based ultraviolet heterojunction photodiodes using a semi-transparent p-contact device structure. At a reverse bias of 10 V, these photodiodes exhibit a low dark current density of 0.3 nA/cm2. The external quantum efficiency is 38% at the band edge, with only a slight decrease at the shorter wavelengths. The forward current is >10 mA at Vf=5 V. Fitting of the forward current–voltage data to the diode equation yields a very low series resistance (Rs=62Ω), which results in a very fast decay of the time response. The improved performance afforded by the thin, semi-transparent, p-contact layer is due to an increase in the uniformity of the lateral field distribution.

Interface characterization of nanocrystalline cds/au junction by current-voltage and capacitance-voltage studies

Abstract: A Schottky junction in the configuration ITO/nano-CdS/Au has been fabricated and the current(I)–voltage(V) and capacitance(C)–voltage(V) characteristics studied. The I–V studies show series resistance effect resulting in two ideality factors: one in low and the other in high forward bias regime, suggesting the presence of surface/interface traps in nano-CdS. Frequency dependent capacitance has also been studied and different semiconductor parameters have been estimated from the I–V and C–V analysis.

Low-resistance salicide fill for trench capacitors

Abstract: Trench capacitors are fabricated utilizing a method which results in a refractory metal salicide as a component of the trench electrode in a lower region of the trench. The salicide-containing trench electrode exhibits reduced series resistance compared to conventional trench electrodes of similar dimensions, thereby enabling reduced ground rule memory cell layouts and/or reduced cell access time. The trench capacitors of the invention are especially useful as components of DRAM memory cells.

Methods and apparatus for a composite collector double heterojunction bipolar transistor

Abstract: A compound collector double heterojunction bipolar transistor (CCHBT) incorporates a collector comprising two layers: a wide bandgap collector region (e.g., GaAs), and a narrow bandgap collector region (e.g., InGaP). The higher electric field is supported in the wide bandgap region, thereby increasing breakdown voltage and reducing offset voltage. At the same time, the use of wide bandgap material in the depleted portion of the collector, and a higher mobility material toward the end and outside of the depletion region, reduces series resistance as well as knee voltage.

Linearized charge sharing circuits with nonlinear capacitors

Abstract: A switched-capacitor analog filter integrated circuit where large nonlinear MOS capacitors (C3) are sampled by smaller MOS capacitors (C2) and integrated onto linear metal-to-metal capacitors (C4) resulting in a linear input/output voltage relationship.

Power distribution system design methodology and capacitor selection for modern CMOS technology

Abstract: Power systems for modern complementary metal-oxide-semiconductor (CMOS) technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor equivalent series resistance (ESR) and ESL are extremely important parameters in determining how many capacitors are required. SPICE models are then analyzed in the time domain to find the response to load transients.

Monolithic interconnected module with a tunnel junction for enhanced electrical and optical performance

Abstract: An improved thermophotovoltaic (TPV) n/p/n device is provided. Monolithic Interconnected Modules (MIMS), semiconductor devices converting infrared radiation to electricity, have been developed with improved electrical and optical performance. The structure is an n-type emitter on a p-type base with an n-type lateral conduction layer. The incorporation of a tunnel junction and the reduction in the amount of p-type material used results in negligible parasitic absorption, decreased series resistance, increased voltage and increased active area. The novel use of a tunnel junction results in the potential for a TPV device with efficiency greater than 24%.

Non-contact power supply system and apparatus and carrying equipment using the system

Abstract: In a non-contact power supply apparatus which interlinks a magnetic flux generated by an AC current flowing through a primary circuit with a secondary circuit so that an induced power is generated in the secondary circuit, and supplies a constant voltage to a load, the secondary circuit is composed of a plurality of inductors connected in series, and each of a plurality of capacitors is interposed between inductors. The total sum of inductance of the plurality of inductors and the total sum of capacitance of the plurality of capacitors have a resonant relation with respect to an AC current of the primary circuit.

High dynamic range optical receiver preamplifier

Abstract: An optical receiver preamplifier provides a transimpedance feedback path between the output node and the input node that comprises a feedback resister and the two diodes are coupled ("paralleled") in opposite direction. While the input current signal is too large, and the voltage reach the diode's threshold voltage. The preamplifier can provide current path passing the signal to solve the problem that charge-discharge time is not uniform and changed over duty-cycle. Further, the two diodes are coupled ("paralleled") in opposite direction make photo-diode working under the large-signal current by anode or cathode input. Thus, increase the dynamic range of the transimpedance preamplifier. Besides, the low impedance of series resistance connects with input node and feedback network. The influence of bandwidth and stability that the aforementioned two paralleled diodes resulted in diode junction capacitor will reduce due to the low impedance of series resistance. And more specifically, in high-speed application, also increase the impedance of series resistance.

Combined filtering system consisting of passive filter with capacitors in parallel with diodes and low-power inverter

Abstract: The author presents a combined filtering system consisting of a passive filter with capacitors and an inverter with low power rating. Based on this system, a method for compensating the reactive power demanded by an electrical consumer is described. The volume of the capacitors used in the case of the proposed version represents 25-33% of the volume of the AC capacitors used in classical versions of passive filters with LC series circuits. When disturbances occur in the three-phase network, the low-power inverter starts to work, retransmitting to the network the excess energy taken by all the capacitors from the network during these disturbances.

Low resistance fill for deep trench capacitor

Abstract: Trench capacitors are fabricated utilizing a method which results in a metallic nitride as a portion of a node electrode in a lower region of the trench. The metallic nitride-containing trench electrode exhibits reduced series resistance compared to conventional trench electrodes of similar dimensions, thereby enabling reduced ground rule memory cell layouts and/or reduced cell access time. The trench capacitors of the invention are especially useful as components of DRAM memory cells having various trench configuration and design.

A GaAs Micro Solar Cell with Output Voltage over 20 V

Abstract: Twenty-four micro-solar cells connected in series have been fabricated on semi-insulating (SI) GaAs substrates for application in the fields of micro-electromechanical systems. The array was formed in an area of 0.8×1.0 mm2, and exhibited an open-circuit voltage of 22.5 V under illumination of 5 mW at the wavelength of 815 nm. Calculation and experiment has demonstrated that, unlike conventional solar cells, the shunt resistance deteriorates the output characteristics far more seriously than the series resistance in the case of micro-solar cells. Leakage currents in both the unit diode and the substrate were evaluated separately. A quantitative estimate based on the measurements revealed that photocurrents generated in the surface of the SI substrate could function as a vital shunt resistance. Light-blocking metal films were successfully employed to obtain high output voltage.

MOS Transistor Modeling Issues for RF Circuit Design

Abstract: This paper presents the basis of the modeling of the MOS transistor for circuit simulation at radio-frequency (RF). A physical equivalent circuit that can easily be implemented as a Spice subcircuit is first derived. In addition to the intrinsic device and the source and drain series resistance, the model also has a gate resistance, that is fundamental to correctly model the frequency and noise behavior. The subcircuit also includes a substrate network that accounts for the signal coupling occurring at HF from the drain to the source and the bulk. It is shown that the latter mainly affects the output admittance y 22. The bias and geometry dependence of all the subcircuit components, leading to a scalable model, are then discussed with emphasis on the substrate resistances. Analytical expressions of the Y-parameters, the transit frequency and the maximum oscillation frequency are established and compared to measurements made on a 0.25 p m CMOS process. The Y-parameters and transit frequency simulated with this scalable model versus frequency, geometry and bias are in good agreement with measured data The non-quasi-static effects and their practical implementation in the Spice subcircuit are then briefly discussed. Finally, a new thermal noise model is introduced and compared to noise models available in BSIM3v3. The parameters used to characterize the noise at HF are then presented and the scalable model is favorably compared to measurements made on the same devices.

Low-resistance visible wavelength distributed Bragg reflectors using small energy band offset heterojunctions

Abstract: Semiconductor alloy heterojunctions, with compositions selected to achieve small band offset energies, were used in distributed Bragg reflector (DBR) structures for the purpose of lowering the vertical series resistance The heterojunctions were simple abrupt interfaces without composition grading 40 period mirrors of AlGaInP/Al(Ga)As layer pairs were grown by gas-source molecular beam epitaxy Mirror reflectance values were found to be greater than 99% at wavelengths near 650 nm Measured specific resistance values, 28×10−4 Ω cm2 for a p-type DBR and 26×10−5 Ω cm2 for a n-type DBR, were comparable to or better than (Al)GaAs/Al(Ga)As DBRs employing various graded interface composition designs

Method of making an interconnect structure employing equivalent resistance paths to improve electromigration resistance

Abstract: A method of fabricating an interconnect structure having improved electromigration resistance. Two conductive lines are formed over a substrate and isolated by a dielectric layer. A contact/via array including a plurality of row contact/vias and column contact/vias are formed within the dielectric layer and electrically connect to the two conductive lines. The load resistors are respectively inserted into the two conductive lines close to the contact/via array. The load resistors are parallel to each other and disposed to its corresponding contact/via array. The load resistors having various resistances are formed by a plurality of slots with various lengths, which are filled with dielectrics. Accordingly, the current paths from one conductive line to the other conductive line through the contact/vias and the load resistors corresponding to the two conductive lines have identical equivalent resistance.

Investigation of intrinsic transistor performance of advanced CMOS devices with 2.5 nm NO gate oxides

Abstract: Optimum device design for high performance applications has been investigated assuming a fixed oxide thickness of 2.5 nm and supply voltage of 1.5 V. The optimal performance is achieved by minimizing parasitic effects. The influence of experimental splits in source/drain (S/D) extension dose, S/D HDD dose and spike RTA on the reduction of series resistance and poly-depletion effect is studied. The role of the HALO implantation in optimization is investigated in detail.