Equivalent series resistance

About: Equivalent series resistance is a research topic. Over the lifetime, 5335 publications have been published within this topic receiving 83362 citations. The topic is also known as: ESR.

MOSFET bias dependent series resistance extraction from RF measurements

Abstract: A simple technique to determine MOSFET gate-bias dependent source and drain series resistances from experimental S-parameters is presented. This technique uses the measured data of a single device. The extracted data allow the accurate modelling of the bias dependence of the output resistance of the MOSFET up to 27 GHz.

Using a negative capacitance to increase the tuning range of a varactor diode in MMIC technology

Abstract: An original method to increase the tuning range of a monolithic-microwave integrated-circuit (MMIC) varactor diode is presented in this paper. An active circuit simulating a negative capacitance is connected to the varactor diode. This method allows to increase the varactor's tuning range more than ten times and to compensate its series resistance at the same time. A MMIC simulating a negative capacitance have been successfully fabricated and measured. To the best of the authors' knowledge, this is the first realization of a MMIC simulating a negative capacitance.

Accurate Systematic Model-Parameter Extraction for On-Chip Spiral Inductors

Abstract: A systematic model-parameter-extraction technique is presented for accurately modeling on-chip spiral inductors in radio frequency integrated circuits (RFICs). The model is a pi-circuit with an additional parallel RC network connecting both vertical branches to account for substrate coupling. The extraction starts with extracting the series inductance and resistance at low frequencies. Then, the oxide capacitance is evaluated in an intermediate frequency range. Afterward, the substrate effects including the substrate resistance and capacitance, as well as coupling, are extracted at higher frequencies. All the lumped circuit element values are analytically determined by the network analysis from the measured network parameters (S- or Y-parameters). The proposed approach thus can provide better circuital interpretations of the inductor behaviors for facilitating the design of RFIC inductors. Square and circular CMOS spiral and octagonal BiCMOS7 spiral inductors are investigated to test this technique. Highly accurate frequency responses by the extracted parameters are obtained over a wide frequency band without any optimization. This reveals the validation and capability of the proposed parameter-extraction method.

Design of a high performance thin all-solid-state supercapacitor mimicking the active interface of its liquid-state counterpart.

Abstract: Here we report an all-solid-state supercapacitor (ASSP) which closely mimics the electrode–electrolyte interface of its liquid-state counterpart by impregnating polyaniline (PANI)-coated carbon paper with polyvinyl alcohol-H2SO4 (PVA-H2SO4) gel/plasticized polymer electrolyte. The well penetrated PVA-H2SO4 network along the porous carbon matrix essentially enhanced the electrode–electrolyte interface of the resulting device with a very low equivalent series resistance (ESR) of 1 Ω/cm2 and established an interfacial structure very similar to a liquid electrolyte. The designed interface of the device was confirmed by cross-sectional elemental mapping and scanning electron microscopy (SEM) images. The PANI in the device displayed a specific capacitance of 647 F/g with an areal capacitance of 1 F/cm2 at 0.5 A/g and a capacitance retention of 62% at 20 A/g. The above values are the highest among those reported for any solid-state-supercapacitor. The whole device, including the electrolyte, shows a capacitance ...

Bilayer insulator tunnel barriers for graphene-based vertical hot-electron transistors

Abstract: Vertical graphene-based device concepts that rely on quantum mechanical tunneling are intensely being discussed in the literature for applications in electronics and optoelectronics. In this work, the carrier transport mechanisms in semiconductor–insulator–graphene (SIG) capacitors are investigated with respect to their suitability as electron emitters in vertical graphene base transistors (GBTs). Several dielectric materials as tunnel barriers are compared, including dielectric double layers. Using bilayer dielectrics, we experimentally demonstrate significant improvements in the electron injection current by promoting Fowler–Nordheim tunneling (FNT) and step tunneling (ST) while suppressing defect mediated carrier transport. High injected tunneling current densities approaching 103 A cm−2 (limited by series resistance), and excellent current–voltage nonlinearity and asymmetry are achieved using a 1 nm thick high quality dielectric, thulium silicate (TmSiO), as the first insulator layer, and titanium dioxide (TiO2) as a high electron affinity second layer insulator. We also confirm the feasibility and effectiveness of our approach in a full GBT structure which shows dramatic improvement in the collector on-state current density with respect to the previously reported GBTs. The device design and the fabrication scheme have been selected with future CMOS process compatibility in mind. This work proposes a bilayer tunnel barrier approach as a promising candidate to be used in high performance vertical graphene-based tunneling devices.