Showing papers on "Error detection and correction published in 1992"

Techniques for automatically correcting words in text

Abstract: Research aimed at correcting words in text has focused on three progressively more difficult problems:(1) nonword error detection; (2) isolated-word error correction; and (3) context-dependent work correction. In response to the first problem, efficient pattern-matching and n-gram analysis techniques have been developed for detecting strings that do not appear in a given word list. In response to the second problem, a variety of general and application-specific spelling correction techniques have been developed. Some of them were based on detailed studies of spelling error patterns. In response to the third problem, a few experiments using natural-language-processing tools or statistical-language models have been carried out. This article surveys documented findings on spelling error patterns, provides descriptions of various nonword detection and isolated-word error correction techniques, reviews the state of the art of context-dependent word correction techniques, and discusses research issues related to all three areas of automatic error correction in text.

8-PSK trellis codes for a Rayleigh channel

Abstract: A suboptimal trellis coding approach based on the concept of combining a good convolutional code and bit interleavers is presented. The aim is to improve the reliability of digital radio communication over a fading channel. It is shown that over a Rayleigh channel and for a fixed code complexity the proposed system is superior to the baseline system. Its performance is analyzed using the generalized R/sub o/ and the upper bound on the bit error rate. The results suggest that on a Rayleigh channel, the standard trellis codes may not be the correct approach for improving the reliability of the communication channel. The discussion is restricted to a rate 2/3 coded system with 8-PSK modulation. >

Introduction to digital communication

Abstract: (NOTE: Most chapters begin with an Introduction and conclude with Summary, References, and Problems.) 1. Introduction to Digital Data Transmission. Components of a Digital Communication System. Communications Channel Modeling. Communication Link Power Calculations. Driving Forces in Communications. Computer Use in Communication System Analysis and Design. Preview of the Book. 2. Signals, Systems, Modulation, and Noise: Overview. Review of Signal and Linear System Theory. Basic Analog Modulation Techniques. Complex Envelope Representation of Bandpass Signals and Systems. Signal Distortion and Filtering. Practical Filter Types and Characteristics. Sampling Theory. Random Processes. Computer Generation of Random Variables. 3. Basic Digital Communication Systems. The Binary Digital Communications Problem. Signaling through Bandlimited Channels. Equalization in Digital Data Transmission. A Digital Communication System Simulation Example. Noise Effects in Pulse Code Modulation. 4. Signal-Space Methods in Digital Data Transmission. Optimum Receiver Principals in Terms of Vector Spaces. Performance Analysis of Coherent Digital Signaling Schemes. Signaling Schemes Not Requiring Coherent References at the Receiver. Comparison of Digital Modulation Systems. Comparison of M-ary Digital Modulation Schemes on Power and Bandwidth-Equivalent Bases. Some Commonly Used Modulation Schemes. Design Examples and System Tradeoffs. Multi-h Continuous Phase Modulation. Orthogonal Frequency Division Multiplexing. 5. Channel Degradations in Digital Communications. Synchronization in Communication Systems. The Effects of Slow Signal Fading in Communicative Systems. Diagnostic Tools for Communication System Design. 6. Fundamentals of Information Theory and Block Coding. Basic Concepts of Information Theory. Fundamentals of Block Coding. Coding Performance in Slow Fading Channels. 7. Fundamentals of Convolutional Coding. Basic Concepts. The Viterbi Algorithm. Good Convolutional Codes and Their Performance. Other Topics. 8. Fundamentals of Repeat Request Systems. General Considerations. Three ARQ Strategies. Codes for Error Detection. 9. Spread-Spectrum Systems. Two Communication Problems. Types of Spread-Spectrum Systems. Complex-Envelope Representation of Spread Spectrum. Generation and Properties of Pseudorandom Sequences. Synchronization of Spread-Spectrum Systems. Performance of Spread-Spectrum Systems in Jamming Environments. Performance in Multiple User Environments. Multiuser Detection. Examples of Spread-Spectrum Systems. 10. Introduction to Cellular Radio Communications. Frequency Reuse. Channel Models. Mitigation Techniques for the Multipath Fading Channel. System Design and Performance Prediction. Advanced Mobile Phone Service. Global System for Mobile Communications. Code Division Multiple Access. Recommended Further Reading. 11. Satellite Communications. Allocation of a Satellite Transmission Resource. Link Power Budget Analysis. Examples of Link Power Budget Calculations. Low- and Medium-Earth Orbit Voice Messaging Satellite Systems. Appendix A. Probability and Random Variables, Probability Theory. Random Variables, Probability Density Functions, and Averages. Characteristic Function and Probability Generating Function. Transformations of Random Variables. Central Limit Theorem. Appendix B. Characterization of Internally Generated Noise. Appendix C. Attenuation of Radio-Wave Propagation by Atmospheric Gases and Rain. Appendix D. Generation of Coherent References. Description of Phase Noise and Its Properties. Phase-Lock Loop Models and Characteristics of Operation. Frequency Synthesis. Appendix E. Gaussian Probability Function. Appendix F. Mathematical Tables. The Sinc Function. Trigonometric Identities. Indefinite Integrals. Definite Integrals. Series Expansions. Fourier Transform Theorems. Fourier Transform Pairs. Index.

FERRARI: a tool for the validation of system dependability properties

Abstract: The authors present FERRARI, a fault and error automatic real-time injector, which can evaluate complex systems by emulating most hardware faults in software. The current version of FERRARI runs on SPARC workstations, in an Xwindow environment. The motivation, methodology, design, implementation, and evaluation of FERRARI are presented. The techniques used to emulate permanent faults and transient errors in software are described in detail. Experimental results are presented for several error detection techniques. They demonstrate the effectiveness of FERRARI in its role as a fault and error injector. >

Fault tolerant disk drive system with error detection and correction

Abstract: A fault tolerant, magnetic disk drive array with error detection and correction. The present invention performs vertical parity checks and one or two additional diagonal parity checks on a data stream as it is read into a disk drive array. The results of these "read-in" parity checks are stored in either two or three redundant disk drives. Upon read out of the data stream from the disk drive array, similar "read-out" parity checks are performed on the data. Based upon a comparison of the "read in " and read "out" vertical and diagonal parity checks, corrupted data can be detected and corrected.

Multipoint communication by hierarchically encoded data

Abstract: A novel multipoint communication paradigm, in which each destination receives a subset of the source's signal that corresponds to that destination's terminal and access bandwidth constraints, is presented. The approach to realizing this paradigm is based on integration of layered coding of the source's signal, routing based on bandwidth demand, optimization of signal parameters, and layered error control. The author gives an overview of several hierarchical signal coding techniques; presents methods for finding maximum bandwidth available to destination, establishing maximum-bandwidth routes; and optimally assigns bandwidth to the signal layers to maximize overall reception quality. Error control procedures whereby the network, source, and destinations cooperate to maintain layered-based data integrity, using erasure recovery coding and prioritized packet detection are also presented. >

Subband image coding using entropy-coded quantization over noisy channels

Abstract: Under the assumption of noiseless transmission the authors develop two entropy-coded subband image coding schemes. The difference between these schemes is the procedure used for encoding the lowest frequency subband: predictive coding is used in one system and transform coding in the other. After demonstrating the unacceptable sensitivity of these schemes to transmission noise, the authors also develop a combined source/channel coding scheme in which rate-compatible convolutional codes are used to provide protection against channel noise. A packetization scheme to prevent infinite error propagation is used and an algorithm for optimal assignment of bits between the source and channel encoders of different subbands is developed. It is shown that, in the presence of channel noise, these channel-optimized schemes offer dramatic performance improvements. >

Triple orthogonally interleaed error correction system

Abstract: The detection and correction of errors in digital data transmitted by or stored in a media channel is provided by processing the data through a triple orthogonally interleaved error correction system. On the transmit/store side of the system, the data is encoded three times prior to placement in the media channel with two different interleaving steps performed between the encoding steps. The first interleave is an orthogonal row shuffling interleave that provides enhanced protection against burst errors. On the receive/play back side, the data is decoded and deinterleaved, with included errors detected and corrected to enable recovery of the original data. To enhance the error correction, a circuit is used for generating a symbol accurate error flag identifying symbols containing errors thereby allowing the error correcting decoders to focus on and correct the data.

Storage system using multiple independently mechanically-driven storage units

Abstract: A storage system for data words in which error correction bits are generated for each data word and are stored independently from the data word on a separate mechanically-driven medium. In another aspect, the storage system serves a wide high throughput parallel bus by storing different portions of each data word that appears on the bus in different asynchronous storage units.

Error correction in mobile robot map learning

Abstract: An issue that must be addressed in map-learning systems is that of error accumulation. The primary emphasis in the literature has been on reducing errors entering the map. The authors suggest that this methodology must reach a point of diminishing returns, and hence focus on explicit error detection and correction. By identifying the possible types of mapping errors, structural constraints can be exploited to detect and diagnose mapping errors. Such robust mapping requires little overhead beyond that needed for nonrobust mapping. A mapping system was implemented based on those ideas. Extensive testing in simulation demonstrated the effectiveness of the proposed error-correction strategies. >

Infrared communications network

Abstract: An infrared data communications network in which groups of personal computers and associated peripherals may communicate by infrared signals which each other. The system utilizes a error correction and a packet switched protocol which allows any terminal to select communications with any other terminal or terminals without degradation of the error rate. Error free transmission is maintained by means of error correcting encoding and a handshake protocol. The packet switched protocol permits any terminal to function as a store and forward repeater thus making the system more reliable and less susceptible to beam blockage.

Error concealment apparatus for a compressed video signal processing system

Abstract: Apparatus in a receiver includes error detection circuitry for detecting segments of transmitted encoded image data having non correctable errors. Further apparatus generates error maps for respective frames in the transmitted sequence. Responsive to the data in the error maps, known good image data or interpolated image data is substituted for data corresponding to the segments containing errors. Error indications for anchor frames, from which predictive frames are encoded, are propagated into error maps corresponding to the predictive encoded frames to accommodate error concealment of errors that may propagate into successive dependently encoded frame data.

A coding theory approach to error control in redundant residue number systems. I. Theory and single error correction

Abstract: A coding theory approach to error control in redundant residue number systems (RRNSs) is presented. The concepts of Hamming weight, minimum distance, weight distribution, and error detection and correction capabilities in redundant residue number systems are introduced. The necessary and sufficient conditions for the desired error control capability are derived from the minimum distance point of view. Closed-form expressions are derived for approximate weight distributions. Computationally efficient procedures are described for correcting single errors. A coding theory framework is developed for redundant residue number systems, and an efficient numerical procedure is derived for a single error correction. >

Two software techniques for on-line error detection

Abstract: Two software-based techniques for online detection of control flow errors were evaluated by fault injection. One technique, called block signature self-checking (BSSC), checks the control flow between program blocks. The other, called error capturing instructions (ECIs), inserts ECIs in the program area, the data area, and the unused area of the memory. To demonstrate these techniques, a program has been developed which modifies the executable code for the MC6809E 8-b microprocessor. The error detection techniques were evaluated using two fault injection techniques: heavy-ion radiation from a californium-252 source and power supply disturbances. Combinations of the two error detection techniques were tested for three different workloads. A combination BSSC, ECIs, and a watchdog timer was also evaluated. >

Process for independently protecting two dimensional codes from one or more burst errors patterns

Abstract: All error correction computations for correcting decode errors that corrupt a binary message that is encoded in a two dimensional code, such as a two dimensional self-clocking glyph code, are performed on byte aligned (or, more generally, symbol aligned) symbol sets that span the message but no other variables.

A coding theory approach to error control in redundant residue number systems. II. Multiple error detection and correction

Abstract: For pt.I see ibid., vol.39, no.1, p.8-17 (1992). The coding theory approach to error control in redundant residue number systems (RRNSs) is extended by deriving computationally efficient algorithms for correcting multiple errors, single-burst-error, and detecting multiple errors. These algorithms reduce the computational complexity of the previously known algorithms by at least an order of magnitude. >

Method and apparatus for ensuring data integrity in a dynamically mapped data storage subsystem

Abstract: The dynamically mapped data storage subsystem generates a two error correction, three error detection code of extent sufficient to cover not only the data but also the corresponding memory address for each data record stored therein. The error correction code is transmitted and stored with the data within the data storage subsystem to ensure the integrity of both the data and its memory address.

On-the-fly error correction with embedded digital controller

Abstract: An on-the-fly error correction method for correcting a data block within a stream of substantially contiguous data blocks during a data decoding process, each block having error syndrome information calculated and appended in accordance with a predetermined Reed Solomon code during an encoding process occurring before the data decoding process, comprising the steps of: passing the block of data through a syndrome information recovery circuit to obtain recovered information related to the error syndrome information, comparing the recovered information with zero to determine if an error burst is present within the data block, and if an error burst is determined to be present: latching the recovered information into a remainder latch in order to free the syndrome information recovery circuit for the next data block of the stream, causing a microcontroller to call and execute an error correction service routine and thereupon: selectively transferring bytes of the recovered information from the remainder latch to the microcontroller, determining with the microcontroller the location and a corrected value for the error burst in accordance with a predetermined Reed Solomon error correction algorithm implemented within the microcontroller by the service routine, and substituting the corrected value for the error burst within the block detected to contain the error burst before it is delivered to a host system. Cross checking the correction, and error detection of data block ID fields is also disclosed.

Apparatus and method for recording and reading information

Abstract: At least one of an error detection code for detecting an error in information to be recorded and an error correction code for correcting the error in the information is added to the information, and the information with at least one of the error detection code and the error correction code added thereto is recorded in a magnetic recording section provided in a photographic film. The information recorded in the magnetic recording section of the photographic film is read, and at least one of the detection of an information-reading failure and the correction of the error in the information is effected on the basis of at least one of the error detection code and the error correction code added to the information which has been read.

Incorporation of a positivity constraint into a Kalman-filter-based algorithm for correction of spectrophotometric data

Abstract: The results of spectrophotometric measurements are subject to systematic errors of instrumental type which may be partially corrected provided a mathematical model of the instrumental imperfections is identified. It is assumed that this model has the form of an integral, convolution-type equation of the first kind. The correction of the results of the measurements subject to random measurement errors consists in the numerical solution of this equation on the basis of these results. A new method for solving the problem of correction is proposed; it is based on application of the Kalman filter modified in such a way that the negative values of the solution are prohibited. The efficiency of this regularization method is demonstrated. It is studied using both synthetic and real data. >

ECC function with self-contained high performance partial write or read/modify/write and parity look-ahead interface scheme

Abstract: An error correcting code (ECC) function and a parity interface scheme providing a translation capability between the ECC and parity protocols is implemented for memory systems in personal computers (PCs). The ECC function addresses the problems of interfacing memory with a variety of other components that may communicate in words composed of differing numbers of bytes. A partial write function within an ECC module permits a read/modify/write operation without extra components, at faster speeds and with minimal use of the system bus. An improved parity/ECC protocol interface is implemented by choosing an appropriate ECC code to facilitate parity generation and checking. This is done by selecting a code that contains groupings of data bits corresponding to the desired parity scheme. The ECC XOR trees are modified to allow parity checking and error correction decode simultaneously, thereby eliminating the need for two sets of XOR trees in the interface.

Unbiased estimation of gross errors in process measurements

Abstract: A new approach to gross error detection provides unbiased estimates and 100(1-α)% simultaneous confidence intervals of process variables when biased process measurements and process leaks exist. Presented in this article are estimation equations for process variables, as well as equations that help identify biased measurements and process leaks. These equations include the power function for a global test, and two types of α-level component tests and their power functions. Important strengths and weaknesses of this approach are compared to those of the serial compensation strategy, in particular, by varying the significance level (α), the variance-covariance matrix (Σ), the size of measurement bias (δ), the number of biased variables, and the sample size (N). Accuracy of δ estimation and performance in detecting the presence of process leaks (γ) are also evaluated and compared. The proposed approach has unique features that can provide a basis for improving the reconciliation of variables in process operations.

Reed-Solomon error control coding for Rayleigh fading channels with feedback

Abstract: The use of nonbinary block error control codes over Rayleigh fading channels with feedback is examined. It is assumed that the fading is slow with respect to the rate of symbol transmission. Expressions are derived for the probabilities of channel symbol error and erasure, which are in turn used to develop expressions for code symbol error and erasure. Two erasure generation mechanisms are considered, one based on the existence of channel amplitude side information, the other not. This analytical framework is used to evaluate the performance of the Reed-Solomon/hybrid-ARQ protocol (RS/HARQ) over fading channels with feedback. The RS/HARQ system uses erasure decoding in a hybrid-ARQ protocol to provide excellent reliability performance at the expense of a reduction in throughput. The RS/HARQ protocol allows for the variation of the erasure threshold and the effective diameter of the decoding operation. >

Analysis of memory and incremental redundancy ARQ schemes over a nonstationary channel

Abstract: A generalized type II automatic-repeat-request (ARQ) scheme using punctured convolutional coding on a two-state Markov model of a nonstationary channel is analyzed. A simple ARQ scheme with memory is also analyzed. It is shown that the simple memory ARQ scheme offers a substantial throughput improvement over a conventional ARQ scheme at severe channel conditions. Furthermore, the generalized type II ARQ scheme yields a better performance than the conventional type II ARQ scheme under all channel conditions, thus making it attractive for use over time-varying channels. >

Digital transmission of acoustic signals over a noisy communication channel

Abstract: The performance of digital communication over a noisy communication channel is improved. An encoder combines bit modulation with error control encoding to allow the decoder to use the redundancy in the error control codes to detect uncorrectable bit errors. This method improves the efficiency of the communication system since fewer bits are required for error control, leaving more bits available for data. In the context of a speech coding system, speech quality is improved without sacrificing robustness to bit errors. A bit prioritization method further improves performance over noisy channels. Individual bits in a set of quantizer values are arranged according to their sensitivity to bit errors. Error control codes having higher levels of redundancy are used to protect the most sensitive (highest priority) bits, while lower levels of redundancy are used to protest less sensitive bits. This method improves efficiency of the error control system, since only the highest priority data is encoded with the highest levels of redundancy. The effect of uncorrectable bit errors is reduced by adaptively smoothing the spectral parameters in a speech decoder. The amount of smoothing is varied depending upon the number of errors detected during the error control decoding of the received data. More smoothing is used when a large number of errors are detected, thereby reducing the perceived effect of any uncorrectable bit errors which may be present.

A high-performance full-motion video compression chip set

Abstract: A seven-chip set which performs the functions associated with video and image compression algorithms, and CCITT H.261 in particular, has been designed, fabricated, and is fully functional. The major functions performed by the devices include motion estimation, DCT and IDCT, forward and inverse quantization, Huffman coding and decoding, BCH error correction, and loop filtering. The chips that perform the predictive and transform coding section of the algorithm operate with pixel rates up to 40 MHz. Array-based technologies of 1.5 and 1.0 mu m CMOS were used extensively to achieve a 28 man-month design time. Each die is less than 10 mm on a side. >

Decoding system for distinguishing different types of convolutionally encoded signals

Abstract: A decoding system discriminates between different types of communications traffic signals. Each type of traffic signal is encoded using a different error correction code. Plural, parallel decoders each decode a received traffic signal using a different decoding technique. Each decoding technique operates in accordance with one of the error correction codes. A quantitative measurement of the reliability of a decoded result is generated by each decoder. A comparison processor accumulates the quantitative measurements made by each decoder and compares the accumulated values. That decoder having the most reliable, accumulated value is selected to decode the current traffic signals. The remaining decoders are deactivated to conserve processing time.

Method for fabricating wafer-scale integration wafers and method for utilizing defective wafer-scale integration wafers

Abstract: The invention relates primarily to wafer-scale integration. Yet in one aspect, circuitry is provided to enable dicing of the wafer to use discrete memory sections thereon as memory chips should the wafer as a whole fail test. In another aspect, error detection and correction circuitry is provided within the street area to detect and correct errors generated within the discrete memory sections where wafer-scale integration manufacturing is successful. In another aspect, clusters of discrete sections of integrated circuitry are provided which include RAM integrated circuitry. One discrete section within the cluster comprises a) control circuitry to control and coordinate operation of discrete sections within the cluster, and b) error detection and correction circuitry to detect and correct errors generated within the discrete sections of RAM integrated circuitry. In still another aspect, test circuitry including fuses are provided within the street area and interconnect with selective portions of different discrete sections of circuitry. Fuses within the test circuitry would be provided and selectively blown to isolate the inoperative areas from each respective memory section, thereby effectively increasing the yield of operable circuitry on the wafer.

Error correction system for n bits using error correcting code designed for fewer than n bits

Abstract: A computer system includes an error detection and correction system for detecting and correcting single-bit errors, two-adjacent-bit errors, and four-adjacent-bit errors. Two identical error detection and correction (EDC) circuits are connected to the system memory array, and each EDC circuit is connected to half of the data bits in alternating pairs. Each EDC circuit detects single-bit errors and two-adjacent-bit errors. The EDC circuits are connected to alternating pairs of data bits so that errors of up to four adjacent bits are actually detected and corrected, two bits by the first EDC circuit and two bits by the second. Thus, if one of the x4 DRAMs in a memory array fails, each erroneous data bit from the DRAM is corrected to its original value, and the failure of the DRAM is registered.