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Showing papers on "Etching (microfabrication) published in 1993"


Journal ArticleDOI
TL;DR: In this paper, a technique for patterning a self-assembled monolayer (SAM) on a gold substrate using an elastomer stamp was described, followed by selective etching in an aqueous, basic solution of cyanide ion and dissolved dioxygen (1M KOH, 0.1 M KCN).
Abstract: This letter describes a technique that can be used to produce well‐defined features of gold. The technique involves patterning of a self‐assembled monolayer (SAM) on a gold substrate using an elastomer stamp (fabricated either from a phenol‐formaldehyde polymer or polydimethylsiloxane), followed by selective etching in an aqueous, basic solution of cyanide ion and dissolved dioxygen (1M KOH, 0.1 M KCN). Electrically conductive structures of gold with dimensions as small as 1 μm have been produced using this procedure. Once a rubber stamp is fabricated, patterning and etching of gold substrates is straightforward. This method is convenient, does not require routine access to clean rooms and photolithographic equipment, and can be used to produce multiple copies of a pattern.

1,756 citations


Patent
Franz Laermer1, Andrea Schilp1
27 Nov 1993
TL;DR: In this paper, anisotropic plasma etching of silicon is used to provide laterally defined recess structures therein through an etching mask employing a plasma, the method including anisotropically-plasmine etching, polymerizing in a polymerizing step at least one polymer former contained in the plasma onto the surface of the silicon during which the surfaces that were exposed in a preceding etching step are covered by a polymer layer thereby forming a temporary etching stop.
Abstract: A method of anisotropic plasma etching of silicon to provide laterally defined recess structures therein through an etching mask employing a plasma, the method including anisotropic plasma etching in an etching step a surface of the silicon by contact with a reactive etching gas to removed material from the surface of the silicon and provide exposed surfaces; polymerizing in a polymerizing step at least one polymer former contained in the plasma onto the surface of the silicon during which the surfaces that were exposed in a preceding etching step are covered by a polymer layer thereby forming a temporary etching stop; and alternatingly repeating the etching step and the polymerizing step. The method provides a high mask selectivity simultaneous with a very high anisotropy of the etched structures.

934 citations


Journal ArticleDOI
G. A. C. M. Spierings1
TL;DR: The etch rate is determined by the composition of the etchant as well as by the glass, although the mechanism of dissolution is not influenced as discussed by the authors, since the dissolution reaction is governed by the adsorption of the two reactive species: HF and HF 2 - and the catalytic action of H+ ions.
Abstract: The etching of silicate glasses in aqueous hydrofluoric acid solutions is applied in many technological fields. In this review most of the aspects of the wet chemical etching process of silicate glasses are discussed. The mechanism of the dissolution reaction is governed by the adsorption of the two reactive species: HF and HF 2 - and the catalytic action of H+ ions, resulting in the breakage of the siloxane bonds in the silicate network. The etch rate is determined by the composition of the etchant as well as by the glass, although the mechanism of dissolution is not influenced. In the second part of this review, diverse applications of etching glass objects in technology are described. Etching of SiO2 and doped SiO2 thin films, studied extensively for integrated circuit technology, is discussed separately.

371 citations


Patent
20 Sep 1993
TL;DR: In this paper, methods of constructing a wire interconnect structure on a substrate are described, which broadly comprise the steps of depositing a spacer layer on a surface of the substrate, depositing mask layer on the spacer layers, and removing a first portion of the mask layer overlying a desired area on the substrate surface to expose the sacer layer underlying the first part of mask layer.
Abstract: Methods of constructing a wire interconnect structure on a substrate are described. The methods broadly comprise the steps of depositing a spacer layer on a surface of the substrate, depositing a mask layer on the spacer layer, and removing a first portion of the mask layer overlying a desired area on the substrate surface to expose the spacer layer underlying the first portion of the mask layer. The methods further comprise the step of etching the structure such that a first portion of the spacer layer overlaying the desired area is removed and such that a portion of the desired area is exposed, and the step of depositing a first conductive material on the exposed portion of the desired area such that a conductive post is formed on the substrate surface and mounted to the desired area. Some of the disclosed methods comprise additional steps for forming an interconnect structure on the opposite surface of the substrate and providing an electrical interconnect means between the two interconnect structures. Additionally, some of the disclosed methods comprise steps for forming fillets around the conductive post at the substrate surface.

301 citations


Journal ArticleDOI
TL;DR: In this paper, a 65 nm thick layer of polymethylmethacrylate (PMMA) resist was exposed with an 80 kV electron beam of diameter smaller than 5 nm, and the resist was developed in 3:7 cellosolve:methanol with ultrasonic agitation.
Abstract: The present limit of around 10 nm for the width of lines fabricated by e‐beam lithography using polymethylmethacrylate (PMMA) resist on silicon substrates has been overcome. 5–7 nm wide etched lines in bulk Si substrates have been produced. A 65 nm thick layer of PMMA was exposed with an 80 kV electron beam of diameter smaller than 5 nm. After exposure the resist was developed in 3:7 cellosolve:methanol with ultrasonic agitation. The pattern in resist was transferred to the Si substrate with reactive ion etching. Lines of width varying between 5 and 7 nm were recorded using an S‐900 scanning electron microscope which has a resolution of 0.7 nm.

270 citations


Proceedings ArticleDOI
07 Feb 1993
TL;DR: In this article, a special surface micromachining process, using oxidized polysilicon sacrificial layer and poly-nitride/poly membranes, has been developed for realizing the monolithic integration of light modulators with silicon devices.
Abstract: A special surface micromachining process, using oxidized polysilicon sacrificial layer and poly-nitride/poly membranes, has been developed for realizing the monolithic integration of light modulators with silicon devices. The design and processing considerations for developing a compact micromachined silicon Fabry-Perot interferometer are presented. Initial tests have shown that these micromachined membranes represent a compact and effective light modulating method. >

229 citations


Patent
01 Apr 1993
TL;DR: A domed plasma reactor chamber uses an antenna driven by RF energy (LF, MF, or VHF) which is inductively coupled inside the reactor dome for etching metals, dielectrics and semiconductor materials as discussed by the authors.
Abstract: A domed plasma reactor chamber uses an antenna driven by RF energy (LF, MF, or VHF) which is inductively coupled inside the reactor dome. The antenna generates a high density, low energy plasma inside the chamber for etching metals, dielectrics and semiconductor materials. Auxiliary RF bias energy applied to the wafer support cathode controls the cathode sheath voltage and controls the ion energy independent of density. Various magnetic and voltage processing enhancement techniques are disclosed, along with etch processes, deposition processes and combined etch/deposition processed. The disclosed invention provides processing of sensitive devices without damage and without microloading, thus providing increased yields.

218 citations


Journal ArticleDOI
TL;DR: In this paper, the bias dependence of the etching of silicon (111) has been investigated by means of in situscanning tunneling microscopy observations, and currentvoltage curves and etch rate results derived from the loss of material and performed with n-type Si samples of various orientations, show that electrochemical and chemical reactions coexist in the oxidation of Si.
Abstract: In Part I of this work, the bias dependence of the etching of silicon (111) has been investigated by means of in situscanning tunneling microscopy observations. In this second part, current‐voltage curves and etch rate results derived from the loss of material and performed with n‐type Si samples of various orientations, show that electrochemical and chemical reactions coexist in the oxidation of Si. A model is presented for the oxidation of a Si atom in a kink site in different situations of polarization. The key feature of the description is the understanding of the persistent hydrogen termination of the surface in spite of the continuous oxidative removal of Si atoms from the surface. The model includes the hydrolytic splitting of Si—H and Si—Si bonds as the important chemical contributions to the etching process. At the rest potential, the chemical component is dominant. The sequence of reactions leaves the surface in the terminated state. The anodic current is due to the injection of electrons which are produced during the substitution of Si—H by Si—OH bonds. This results above a critical electrode potential in passivation. In this respect, (111) and (100) faces present quite different behaviors. At cathodic bias where the hydrogen evolution becomes fast, due to the accumulation of electrons at the surface, not only the anodic component of the etching reaction vanishes but also the chemical component decreases in rate and is eventually stopped.

218 citations


Journal ArticleDOI
TL;DR: A multiple beam apparatus has been constructed to facilitate the study of ion-enhanced fluorine chemistry on undoped polysilicon and silicon dioxide surfaces by allowing the fluxes of fluorine (F) atoms and argon (Ar+) ions to be independently varied over several orders of magnitude.
Abstract: A multiple beam apparatus has been constructed to facilitate the study of ion‐enhanced fluorine chemistry on undoped polysilicon and silicon dioxide surfaces by allowing the fluxes of fluorine (F) atoms and argon (Ar+) ions to be independently varied over several orders of magnitude. The chemical nature of the etching surfaces has been investigated following the vacuum transfer of the sample dies to an adjoining x‐ray photoelectron spectroscopy facility. The etching ‘‘enhancement’’ effect of normally incident Ar+ ions has been quantified over a wide range of ion energy through the use of Kaufman and electron cyclotron resonance‐type ion sources. The increase in per ion etching yield of fluorine saturated silicon and silicon dioxide surfaces with increasing ion energy (Eion) was found to scale as (Eion1/2−Eth1/2), where Eth is the etching threshold energy for the process. Simple near‐surface site occupation models have been proposed for the quantification of the ion‐enhanced etching kinetics in these syste...

212 citations


Journal ArticleDOI
TL;DR: In this paper, the etching of n-type silicon (111) has been investigated by means of in situ scanning tunneling microscopy (STM) observations performed over a wide range of bias of the sample.
Abstract: The etching of n-type silicon (111) has been investigated by means of in situ scanning tunneling microscopy (STM) observations performed over a wide range of bias of the sample A special procedure has been used to observe topography changes at potentials close and positive of the rest potential Irrespective of the bias, images show that the surface consists in atomically smooth terraces separated by 31 A high steps At cathodic bias, the etching occurs principally at terrace edges and (111) terraces are most probably H terminated, which prevents their reconstruction, as could be seen in atomically resolved pictures taken in situ Triangular etch pits nucleate when the potential approaches the rest potential

207 citations


Patent
Kouhei Kawamura1
25 Mar 1993
TL;DR: An NF 3 /H 2 mixture as a feed gas for an etchant for etching an SiO 2 film on an silicon wafer is used with a 1 : 160 NF 3/H 2 mixed ratio.
Abstract: An NF 3 /H 2 mixture as a feed gas for an etchant for etching an SiO 2 film on an silicon wafer is used with a 1 : 160 NF 3 /H 2 mixed ratio. The mixture is made into plasma, and activated species of fluorine, hydrogen and nitrogen are supplied downstream to allow the species to be adsorbed in and on the SiO 2 film. The NF 3 /H 2 mixed ratio of the mixture is so set as not to effect the etching of the SiO 2 film under a chemical action. Then the adsorbed activated species are irradiated with Ar low energy ions so that the activated species are excited and etch the SiO 2 film. During etching, the semiconductor wafer is maintained to about -100° C. Less damage is caused to the silicon wafer and etching can be made in a high selection ratio.

Journal ArticleDOI
Koichi Hashimoto1
TL;DR: In this article, the effect of antenna shape on charge damage has been examined using electron cyclotron resonance (ECR) plasma metal etching and test devices with an 8-nm-thick gate oxide.
Abstract: The effect of antenna shape on charge damage has been examined using electron cyclotron resonance (ECR) plasma metal etching and test devices with an 8-nm-thick gate oxide. A dense-line antenna causes capacitor breakdown and the positive shift of the transistor's threshold voltage (Vt), while a sparse-line antenna does not. This positive Vt shift corresponds to a positive charge-up of the dense line, and is not dependent on overetching. Such damage is hardly observed when the antenna's top surface is exposed to the plasma, indicating that the plasma is uniform in terms of conventional charge damage. These new phenomena can be explained by a new mechanism consisting of electron shading with photoresist patterns. This shading leads to less neutralization of the ion charge impinging onto the transitory metal which remains between the antenna lines because of the microloading effect, and thus the excess positive charge causes the damage.

Patent
28 May 1993
TL;DR: In this paper, a CCD camera is used to measure etching or deposition rate uniformity in situ using a view of the wafer during plasma processing. But the method is not suitable for the measurement of thin films.
Abstract: A new technique has been developed to measure etching or deposition rate uniformity in situ using a CCD camera which views the wafer during plasma processing. The technique records the temporal modulation of plasma emission or laser illumination reflected from the wafer; this modulation is caused by interferometry as thin films are etched or deposited. The measured etching rates compare very well with those determined by Helium-Neon laser interference. This technique is capable of measuring etching rates across 100-mm or larger wafers. It can resolve etch rate variations across a wafer or within a die. The invention can also be used to make endpoint determinations in etching operations as well as measuring the absolute thickness of thin films.

Journal ArticleDOI
TL;DR: In this article, a technique for fabricating Si nanostructures with a scanning tunneling microscope operated in air is presented, which involves direct chemical modification of a H-passivated Si(100) surface and a subsequent liquid etch.
Abstract: A technique is presented for fabricating Si nanostructures with a scanning tunneling microscope operated in air. The process involves the direct chemical modification of a H‐passivated Si(100) surface and a subsequent liquid etch. The chemically modified portions of the surface can withstand a deep (≳100 nm) liquid etch of the unmodified regions with no etch degradation of the modified surface. At a write speed of 1–10 μm/s, large‐area (50 μm×50 μm) patterns with lateral feature sizes ∼25 nm are reliably fabricated.

Book
24 May 1993
TL;DR: In this article, the authors present a comparison of alternative deposition methods for amorphous silicon-based alloys with conventional glow discharge, remote-plasma assisted chemical vapour deposition and physical vapour-deposition methods.
Abstract: Introduction material characteristics of amorphous silicon-based alloys film diagnostic measurements conventional glow discharge deposition processes for amorphous silicon-based alloys design of glow discharge deposition reactors glow discharge deposition parameters for hydrogenated amorphous silicon glow discharge deposition reaction chemistry for hydrogenated amorphous silicon modifications of conventional glow discharge remote-plasma-assisted chemical vapour deposition methods photochemical vapour deposition thermally-induced chemical vapour deposition physical vapour deposition methods etching properties of amorphous silicon-based alloys comparison of alternative deposition methods microcrystalline silicon and silicon carbide safety.

Journal ArticleDOI
TL;DR: In this paper, a two-dimensional (r,z) hybrid model for inductively coupled plasmas (ICP) was developed and used to investigate Ar/CF4/O2 mixtures for etching applications.
Abstract: Inductively coupled plasmas (ICPs) are currently being investigated as high density (≳1011–1012 cm−3), low pressure (<1–20 mTorr) sources for semiconductor etching and deposition. We have developed a two‐dimensional (r,z) hybrid model for ICP sources and have used the model to investigate Ar/CF4/O2 mixtures for etching applications. The simulation consists of electromagnetic, electron Monte Carlo, and hydrodynamic modules with an ‘‘off‐line’’ plasma chemistry Monte Carlo simulation. The model produces the temporally and spatially dependent magnetic and electric fields (both inductively and capacitively coupled), plasma densities, and the energy resolved flux of ions and radicals to the substrate. We discuss results for densities, power deposition, and ion energies to the substrate as a function of position.

Patent
Chishio Koshimizu1
19 Apr 1993
TL;DR: In this article, an end-point detecting section monitors the luminous intensity of the CF 2 radical reacting with SiO 2 during the etching process and determines that the process has just ended.
Abstract: In one aspect of the invention, CHF 3 gas and CF 4 gas (i.e., reactant gases), and argon gas (i.e., plasma-stabilizing gas) are introduced into a vacuum chamber. RF power is then applied between the electrodes within the chamber, thereby generating plasma. The plasma is applied to a substrate placed in the chamber, thus etching the SiO 2 film formed on the substrate. A spectrometer extracts a light beam of a desired wave-length, emitted from the CF 2 radical which contributes to the etching. An end-point detecting section monitors the luminous intensity of the CF 2 radical reacting with SiO 2 during the etching. Once the SiO 2 film has been etched away, the luminous intensity of the CF 2 radical increases. Upon detecting this increase, the section determines that etching has just ended. The selected wavelength ranges from 310 nm to 236 nm, preferably being 219.0 nm, 230.0 nm, 211.2 nm, 232.5 nm, or any one ranging from 224 nm to 229 nm. In another aspect of the invention, the device attached to the observation window of the chamber removes products stuck to the window during the etching. The window thus cleaned, more light than otherwise passes through the window and reaches the spectrometer. This enables the section to detect even a slight change in the luminous intensity of the CF 2 radical, thereby detecting the end point of etching with accuracy.

Journal ArticleDOI
TL;DR: In this article, the thermal behavior of arrays of micro heat pipes fabricated in silicon wafers was investigated using an infrared thermal imaging unit, the temperature gradients and maximum localized temperatures were measured and an effective thermal conductivity was computed.
Abstract: An experimental investigation was conducted to determine the thermal behavior of arrays of micro heat pipes fabricated in silicon wafers. Two types of micro heat pipe arrays were evaluated, one that utilized machined rectangular channels and the other that used an anisotropic etching process to produce triangular channels. Once fabricated, a clear pyrex cover plate was bonded to the top surface of each wafer using an ultraviolet bonding technique to form the micro heat pipe array. These micro heat pipe arrays were then evacuated and charged with a predetermined amount of methanol. Using an infrared thermal imaging unit, the temperature gradients and maximum localized temperatures were measured and an effective thermal conductivity was computed. The experimental results were compared with those obtained for a plain silicon wafer

Journal ArticleDOI
TL;DR: In this article, damage-free selective etching of Si native oxides against Si has been achieved by NH3/NF3 and SF6/H2O downflow etching.
Abstract: Damage‐free selective etching of Si native oxides against Si has been achieved by NH3/NF3 and SF6/H2O down‐flow etching. In the NH3/NF3 etching, the wafer was covered with a film, and after its removal by heating above 100 °C, only SiO2 was found to be etched with an extremely high selectivity with respect to Si. Selective etching of Si oxides has also been obtained for SF6/H2O microwave discharge. In this case, a film of liquid solution containing HF and H2SOx is considered to form on the wafer surface. The selective etching of SiO2 takes place by the dissolved HF just as in the wet etching by an HF solution. The mechanisms of these selective reactions are discussed in detail based on the covalency of Si and SiO2 bondings.

Journal ArticleDOI
TL;DR: In this article, the authors used chemical depth profiling, with a depth resolution of 10 A, in conjunction with x-ray photoelectron spectroscopy to study the composition and chemical bonding in thin silicon oxides grown in N2O with both a conventional furnace and a rapid thermal annealer (RTA) process.
Abstract: We have used chemical depth profiling, with a depth resolution of 10 A, in conjunction with x‐ray photoelectron spectroscopy to study the composition and chemical bonding in thin silicon oxides grown in N2O with both a conventional furnace and a rapid thermal annealer (RTA) process. The nitrogen profiles of RTA and furnace oxides differ, with the RTA oxides showing an increase in nitrogen concentration at the interface and the furnace oxides showing a more uniform nitrogen distribution. The percentage of nitrogen at the interface also differs, and correlates with a reduction in interface state generation under current injection for increased nitrogen concentration. The chemical environment for the nitrogen changes with distance from the interface, and this is attributed to an increasing number of nitrogen—silicon bonds near the interface.

Patent
29 Jan 1993
TL;DR: In this article, a process for producing a semiconductor substrate is provided which comprises providing a first substrate made of silicon having a porous silicon layer formed thereon by making porous the substrate silicon and a nonporous monocrystalline silicon layer epitaxially grown on the porosity silicon layer.
Abstract: A process for producing a semiconductor substrate is provided which comprises providing a first substrate made of silicon having a porous silicon layer formed thereon by making porous the substrate silicon and a nonporous monocrystalline silicon layer epitaxially grown on the porous silicon layer, laminating the first substrate onto a second substrate in a state that at least one of lamination faces of the first and the second substrates has a silicon oxide layer and the nonporous monocrystalline silicon layer is interposed between the laminated substrates, and removing the porous silicon layer by etching, wherein the porous silicon layer is removed by etching with an etchant which etches the nonporous monocrystalline silicon layer and the silicon oxide layer at respective etching rates of not more than 10 angstroms per minute.

Journal ArticleDOI
TL;DR: An etching mechanism for thin silicon dioxide films in hydrofluoric acid solutions has been deduced from experimental results and a review of literature sources as mentioned in this paper, which consists of two elementary chemical reactions at the surface of the silicon dioxide thin film.

Patent
16 Dec 1993
TL;DR: In this paper, a hydrogen halide plasma is created within an etch chamber and the negative charge at the bottom of the chamber attracts the positively charged plasma, thereby etching the substrate in the downward direction.
Abstract: Silicon dioxide on a substrate is directionally etched using a hydrogen halide plasma which is created within an etch chamber. The method selectively etches silicon dioxide relative to polysilicon and silicon nitride. A substrate and the combination of NH 3 and NF 3 gases or the combination of CF 4 and O 2 gases mixed with H 2 and N 2 gases are located within an etch chamber. An electrical field is created within the etch chamber causing the gas mixture to form a plasma. The negative charge at the bottom of the chamber attracts the positively charged plasma, thereby etching the substrate in the downward direction. The result is an anisotropic product. The method is also shown to be effective in non-selectively etching thermal and deposited oxides, resulting in a similar etch rate for the different types of oxides.

Patent
28 Jan 1993
TL;DR: In this article, a process for preparing a semiconductor device substrate comprises a step of making at least one surface of a first substrate composed of Si material porous, oxidizing inside walls of pores in the resulting porous Si surface layer, forming a monocrystalline Si layer on the porous Si layer, and bonding the mon-coalescence Si layer to one substrate through an insulating layer therebetween.
Abstract: A process for preparing a semiconductor device substrate comprises a step of making at least one surface of a first substrate composed of Si material porous, a step of oxidizing inside walls of pores in the resulting porous Si surface layer, a step of forming a monocrystalline Si layer on the porous Si surface layer, a step of bonding the monocrystalline Si layer to one surface of a second substrate through an insulating layer therebetween, a first etching step of removing the first substrate by selective etching except for the porous Si layer, and a second etching step of impregnating the porous Si layer exposed by the removal of the first substrate with hydrofluoric acid or a first liquid mixture of hydrofluoric acid and at least one of an alcohol and a hydrogen peroxide solution, or by buffered hydrofluoric acid or a second liquid mixture of bufffered hydrofluoric acid and at least one of an alcohol and an hydrogen peroxide solution, thereby selectively removing the porous Si layer.

Patent
05 Oct 1993
TL;DR: In this article, a method for accurate etching and removal of thin layer by controlling the surface residence time, thickness and composition of reactant containing film is described, using a quartz crystal microbalance.
Abstract: New device and method are described for accurate etching and removal of thin layer by controlling the surface residence time, thickness and composition of reactant containing film. Etching of silicon dioxide at low pressure using a quartz crystal microbalance is illustrated. Usefulness of the invention in the manufacture of microelectronic devices is shown.

Journal ArticleDOI
TL;DR: In this article, the development of micromachining techniques to create silicon-based waveguide circuits, which can operate up to high submillimeter-wave frequencies, is reported.
Abstract: The development of micromachining techniques to create silicon-based waveguide circuits, which can operate up to high submillimeter-wave frequencies, is reported. As a first step, a WR-10 waveguide has been fabricated from

Journal ArticleDOI
TL;DR: In this paper, a method of measuring the mechanical strength of thin films is described, where miniature arrays of four tensile specimens, each 0.25 mm wide, 1 mm long, and 2.2 μm thick, are prepared using deposition, patterning, and etching processes common to the semiconductor industry.
Abstract: A new method of measuring the mechanical strength of thin films is described. We prepare miniature arrays of four tensile specimens, each 0.25 mm wide, 1 mm long, and 2.2 μm thick, using deposition, patterning, and etching processes common to the semiconductor industry. Each array of four specimens is carried on and protected by a rectangular silicon frame. Thirty-six such specimens are produced on a single wafer. After a specimen frame is mounted, its vertical sides are severed without damaging the specimens. The load is applied by micrometers through a special tension spring. Tensile properties of a 2.2 μm thick Ti–Al–Ti film were determined.

Patent
03 Dec 1993
TL;DR: In this paper, an electrostatic chuck for attracting and holding a semiconductor wafer is provided on the susceptor, and the resistive layer is formed to have such a surface roughness that a center line average hight falls within a range of 0.1 to 1.5 μm.
Abstract: The plasma etching apparatus for a semiconductor wafer includes a susceptor provided in the vacuum process chamber. An electrostatic chuck for attracting and holding the wafer is provided on the susceptor. The electrostatic chuck comprises a chuck electrode provided on the susceptor via an insulative layer. The chuck electrode is connected to the positive terminal of the DC power supply via a switch. The chuck electrode is coated with a resistive layer, and the wafer is placed directly on the resistive layer. The resistive layer exhibits an electric resistivity of 1×10 10 Ω·cm to 1×10 12 Ω·cm in a temperature range for etching. The resistive layer is formed to have such a surface roughness that a center line average hight falls within a range of 0.1 to 1.5 μm. When the potential of the positive terminal of the DC power supply is applied to the chuck electrode, and the wafer is grounded via plasma, a contact potential difference is created between the surface of the resistive layer and the rear surface of the wafer, generating an electrostatic attractive force, so that the wafer is attracted and held by the resistive layer.

Patent
27 Jan 1993
TL;DR: A colored microlens array is a color filter array of different color filter layers and transparent microlenses as mentioned in this paper, which can be applied to image sensing devices, color liquid crystal display units, etc.
Abstract: A colored microlens array which functions as both a color filter array of different color filter layers and transparent microlenses. The colored microlens array has a transparent basic layer and a plurality of colored microlenses of different colors formed on the transparent basic layer in two dimensional arrangement in accordance with at least one basic color arrangement pattern. The colored microlenses are manufactured by forming semispherical lens forming layer portions on the respective color filter layers of the color filter array and by etching the color filter layers with the formed semispherical lens forming layer portions as a mask, to change in shape the respective color filter layers into the semispherical lenses, respectively. The colored microlenses are applied to solid-state image sensing devices, color liquid crystal display units, etc.

Patent
10 Dec 1993
TL;DR: In this article, the etching terminus is detected by sufficiently tapering an etching shape having a thin film without oxidizing a conductive film suck as a holding capacitance electrode of the groundwork.
Abstract: PURPOSE:To obtain a dry-etching method capable of detecting the etching terminus by sufficiently tapering an etching shape having a thin film without oxidizing a conductive film suck as a holding capacitance electrode of the groundwork, etc., and to obtain a transistor array having a thin film which prevents a generation of failure of transistors due to a disconnected wire or contact failure and which does not have defects with high yield. CONSTITUTION:When a thin film on a substrate 1 is dry-etched, a predetermined etching part in a region 19 for forming arrays and photoresist in a substrate peripheral part 18 are removed to etch them together.