Showing papers on "Etching (microfabrication) published in 1997"

Antireflection behavior of silicon subwavelength periodic structures for visible light

Abstract: We describe subwavelength surfaces etched into silicon wafers that exhibit antireflection characteristics for visible light. The wafers are fabricated by holographically recording a crossed-grating in a photoresist mask followed by reactive-ion etching to transfer the primary mask onto the silicon substrate. The dependence of reflectivity on the wavelength and angle of incidence is measured. The overall antireflection performance of the corrugated silicon wafers is compared with that of standard thin-film stacks, and is interpreted with the effective medium theory and with simulation results obtained from rigorous computations.

Method of surface treatment of semiconductor substrates

Abstract: This invention relates to methods for treatment of semiconductor substrates and in particular a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition, wherein one or more of the following parameters: gas flow rates, chamber pressure, plasma power, substrate bias, etch rate, deposition rate, cycle time and etching/deposition ratio vary with time.

Plasma-processing method

Abstract: PROBLEM TO BE SOLVED: To provide a method of etching an ITO film, which is capable of preventing an electrode wiring material from being corroded and etching the ITO film at a high speed, and a method of exfoliating a regist formed on a substrate surface, without leaving residues behind SOLUTION: In this method, a resist exfoliation chamber 11 for exfoliating a resist after an etching processing has been finished, is evacuated down to a predetermined pressure, and a gas containing Fe atom is mixed with O2 gas so as to be provided in a ratio in a range of 05 to 15%, and furthermore the mixed gas is introduced into the chamber 11 as an ashing gas and is set to a predetermined pressure The ashing gas in the chamber 11 is irradiated with microwaves to be made into a plasma, and active species produced thereby ashes the resist Thereafter, a resist residue left behind on the surface of the substrate 23 is cleaned

Role of steady state fluorocarbon films in the etching of silicon dioxide using CHF3 in an inductively coupled plasma reactor

Abstract: It has been found that in the etching of SiO2 using CHF3 in an inductively coupled plasma reactor of the planarized coil design, a thin steady state fluorocarbon film can play an important role in determining the rate of etching. This etching is encountered as the amount of bias power used in the SiO2 etching process is increased, and a transition from fluorocarbon film growth on the SiO2 to an oxide etching rate which is consistent with reactive sputtering theory is made. The observed presence of an intermediate region where etching occurs, although a steady state fluorocarbon film suppresses the etch rate from that expected for a reactive sputtering process, has been referred to as the fluorocarbon suppression regime. This work demonstrates the role of the steady state fluorocarbon film present on silicon dioxide during etching within the fluorocarbon suppression regime. X-ray photoelectron spectroscopy studies of the surfaces of partially etched SiO2 have shown a thinning of this film with increasing r...

Highly anisotropic photoenhanced wet etching of n-type GaN

Abstract: A room-temperature photoelectrochemical etching process for n-type GaN films using a 0.04 M KOH solution and Hg arc lamp illumination is described. The process provides highly anisotropic etch profiles and high etch rates (>300 nm/min) at moderate light intensities (50 mW/cm2 @365 nm). The etch rate and photocurrent are characterized as a function of light intensity for stirred and unstirred solutions, and the etch process is found to be diffusion limited for light intensities greater than 20 mW/cm2 @365 nm. A reaction mechanism for the etch process is proposed.

Method for removing etching residues and contaminants

Abstract: A gas plasma process without argon sputtering for removing photoresist, etch residues and other contaminants involved in etching vias in integrated circuit devices is disclosed. The process involves placing the substrate having etched vias or contact holes in a suitable low bias reactor; applying to the substrate surface a mixture of gases at low bias selected from the group consisting of oxygen, nitrogen, fluorine, hydrofluorocarbon and fluorinated methane and amine gases to both remove the photoresist layer and alter the composition of the residues such that the residues are soluble in water; and rinsing the substrate with deionized water. The plasma process should be carried out at temperatures of less than about 100 degrees C. to avoid mobile ion contamination problems and oxidation of the etch residues.

High deposition rate recipe for low dielectric constant films

Abstract: An insulating film with a low dielectric constant is more quickly formed on a substrate by reducing the co-etch rate as the film is deposited. The process gas is formed into a plasma from silicon-containing and fluorine-containing gases. The plasma is biased with an RF field to enhance deposition of the film. Deposition and etching occur simultaneously. The relative rate of deposition to etching is increased in the latter portion of the deposition process by decreasing the bias RF power, which decreases the surface temperature of the substrate and decreases sputtering and etching activities. Processing time is reduced compared to processes with fixed RF power levels. Film stability, retention of water by the film, and corrosion of structures on the substrate are all improved. The film has a relatively uniform and low dielectric constant and may fill trenches with aspect ratios of at least 4:1 and gaps less than 0.5 μm.

Polarity of (00.1) GaN epilayers grown on a (00.1) sapphire

Abstract: The polarity is found to be a key parameter for the growth of high quality epitaxial GaN films on sapphire (00.1) substrates. A model is suggested which may consistently explain the observed influence of the process parameters on the polar orientation of the epitaxial film. A simple etching technique is proposed for quick distinction of the film polarity. The assignment of the etching behavior to the proper crystal structure is achieved by an analysis of the respective two-dimensional photoelectron diffraction patterns.

Quantum mechanical effects in the silicon quantum dot in a single-electron transistor

Abstract: The quantum mechanical effects in silicon single-electron transistors have been investigated. The devices have been fabricated in the form of point contact metal–oxide–semiconductor field-effect transistors with various channel widths using electron beam lithography and the anisotropic etching technique on silicon-on-insulator substrates. The device with an extremely narrow channel shows Coulomb blockade oscillations at room temperature. At low temperatures, negative differential conductances and fine structures are superposed on the device characteristics, which are attributed to the quantum mechanical effects in the silicon quantum dot in the channel. The energy spectrum of the dot is extracted from the experimental results.

Silicon dioxide sacrificial layer etching in surface micromachining

Abstract: Silicon dioxide sacrificial layer etching has become a major surface micromachining method to fabricate microsensors and microactuators often made of polycrystalline silicon. An overview of the materials available in integrated circuit manufacturing is given, and the etch mechanism and sacrificial layer etch kinetics are reviewed. Selectivity issues important for the proper choice of layers and etchants are addressed discussing the chemical attack of aluminum during long sacrificial layer etching, as an example. Various etchants known from other studies are compared: concentrated and dilute HF, buffered HF (BHF), nitric acid based etchants known as P-etch, R-etch, S-etch, as well as mixtures of HF and HCl, and vapor HF. `Pad-etch', an acetic acid/ammonium fluoride/ethyleneglycole solution is shown to have an enhanced selectivity against aluminum. Some device examples such as arrays of deflectable micromirrors demonstrate the versatile application of sacrificial oxide etching in surface micromachining.

Vertical mirrors fabricated by deep reactive ion etching for fiber-optic switching applications

Abstract: We report on vertical mirrors fabricated by deep reactive ion etching of silicon. The mirror height is 75 /spl mu/m, covering the fiber core of a single-mode fiber when the latter is placed into a groove of equal depth and etched simultaneously with the mirror. To obtain a uniform etch depth, etching is stopped on a buried oxide layer. Using the buried oxide as a sacrificial layer allows to fabricate mirrors with suspension and actuation structures as well as fiber-alignment grooves in one and the same processing step. A minimal mirror thickness of 2.3 /spl mu/m was achieved, resulting in an aspect ratio higher than 30. The verticality was better than 89.3/spl deg/. In the upper part of the mirror a surface roughness below 40 nm rms was obtained. At a wavelength of 1300 nm the reflectivity of the aluminum-coated mirrors was measured to be higher than 76%. Using a reactive ion etched mirror we have fabricated an optical fiber switch with electrostatic actuation. The coupling loss in the bar state of two packaged prototypes was between 0.6 and 1.7 dB and between 1.4 and 3.4 dB in the cross state. The switching time is below 0.2 ms.

Method of manufacturing semiconductor wafers

Abstract: According to the invention, the flatness and quality can be improved while simplifying the process even when large size wafers of 200 to 300 mm or above are processed. Basic steps involved are a slicing step E for obtaining thin disc-shaped wafers by slicing, a chamfering step F for chamfering the sliced wafers, a flattening step G for flattening the chamfered wafers, an alkali etching step H for removing process damage layers from the flattened wafers, and a double-side polishing step K of simultaneously polishing the two sides of the etched wafers. If necessary, a plasma etching step is used in lieu of the flattening and etching steps G and H respectively.

High rate and selective etching of GaN, AlGaN, and AlN using an inductively coupled plasma

Abstract: The etching behavior of gallium nitride (GaN), aluminum gallium nitride (AlxGa1−xN), and aluminum nitride (AlN) has been systematically examined in an inductively coupled plasma (ICP) using Cl2 and Ar as the reagents Etch rates were strongly influenced by ICP power and dc bias, while relatively insensitive to pressure, flow rate, and gas composition Maximum etch rates of 9800 A/min for GaN, 9060 A/min for Al028Ga072N, and 7490 A/min for AlN were attained The etch profiles were highly anisotropic over the range of conditions studied The dc bias had to exceed certain voltages before significant etch rates were obtained These values were −50 V for AlN As such, increasing selectivity for GaN over Al028Ga072N and AlN was achieved at dc biases below −40 V At −20 V, the GaN etch rates were 38 times greater than AlN and a factor of 10 greater than Al028Ga072N These results demonstrate the importance of ion bombardment in the etching of these materials

An overview of level set methods for etching, deposition, and lithography development

Abstract: The range of surface evolution problems in etching, deposition, and lithography development offers significant challenge for numerical methods in front tracking. Level set methods for evolving interfaces are specifically designed for profiles which can develop sharp corners, change topology, and undergo orders of magnitude changes in speed. They are based on solving a Hamilton-Jacobi type equation for a level set function, using techniques borrowed from hyperbolic conservation laws. Over the past few years, a body of level set methods have been developed with application to microfabrication problems. In this paper, we give an overview of these techniques, describe the implementation in etching, deposition, and lithography simulations, and present a collection of fast level set methods, each aimed at a particular application. In the case of photoresist development and isotropic etching/deposition, the fast marching level set method, introduced by Sethian (1996), can track the three-dimensional photoresist process through a 200/spl times/200/spl times/200 rate function grid in under 55 s on a Sparc10. In the case of more complex etching and deposition, the narrow band level set method, introduced in Adalsteinsson and Sethian (1995), can be used to handle problems in which the speed of the interface delicately depends on the orientation of the interface versus an incoming beam, the effects of visibility, surface tension, reflection and re-emission, and complex three-dimensional effects. Our applications include photoresist development, etching/deposition problems under the effects of masking, visibility, complex flux integrations over sources, nonconvex sputter deposition problems, and simultaneous deposition and etch phenomena.

Method for anisotropically etching tungsten using SF6, CHF3, and N2

Abstract: A method for etching a tungsten containing layer 25 on a substrate 10 substantially anisotropically, with good etching selectivity, and without forming excessive passivating deposits on the etched features. In the method, the substrate 10 is placed in a plasma zone 55, and process gas comprising SF 6 , CHF 3 , and N 2 , is introduced into the plasma zone. A plasma is formed from the process gas to anisotropically etch the tungsten containing layer 22. Preferably, the plasma is formed using combined inductive and capacitive plasma operated at a predefined inductive:capacitive power ratio.

Methods and apparatus for etching semiconductor wafers

Abstract: A method for etching a TiN layer of a wafer stack in a plasma processing chamber. The method includes the step of etching at least partially through the TiN layer using a first chemistry, which preferably includes a TiN etchant, a noble gas, and a polymer-forming chemical. In one embodiment, the TiN etchant is Cl2, the noble gas is argon, and the polymer-forming chemical is CHF3.

Oxide etch and method of etching

Abstract: An oxide etchant and method of etching are provided. The etchant includes at least one fluorine-containing compound and at least one auxiliary component selected from the group of a boron-containing compound and a phosphorus-containing compound.

A Review of SiC Reactive Ion Etching in Fluorinated Plasmas

Abstract: Research and development in semiconducting silicon carbide (SiC) technology has produced significant progress in the past five years in many areas: material (bulk and thin film) growth, device fabrication, and applications. A major factor in this rapid growth has been the development of SiC bulk crystals and the availability of crystalline substrates. Current leading applications for SiC devices include high power and high temperature devices and light emitting diodes. Due to the strong bonding between Si and C (Si-C = 1.34 x Si-Si), wet chemical etching can only be performed at high temperature. Therefore, plasma-based (dry) etching plays the crucial role of patterning SiC for the fabrication of various electronic devices. In the past several years, reactive ion etching (RIE) of SiC polytypes (3C and 6H) has been investigated in fluorinated gases (primarily CHF3, CBrF3, CF4, SF 6 , and NF 3 ), usually mixed with oxygen and occasionally with other additives or in a mixture of fluorinated gases. In this paper, a review of SiC RIE is presented. The primary emphasis is on etching of the 3C and 6H polytypes, but some results on RIE of the 4H polytype are included. The paper covers the basic etching mechanisms, provides typical etching properties in selected plasma conditions, discusses the effects of changes in various etching parameters, such as plasma pressure, density and power, etching time, etc. The etching of features of sizes varying from sub-μm to tens of μm's is addressed. Finally, optimum etching conditions and trade-offs are considered for various device configurations.

Kinetic study of low energy ion-enhanced polysilicon etching using Cl, Cl2, and Cl+ beam scattering

Abstract: The chlorine ion-enhanced etching yield of polysilicon in the low ion energy regime was characterized as a function of Cl ion energy, ion flux, neutral-to-ion flux ratio, and the ion impingement angle by utilizing Cl+, Cl, and Cl2 beam scattering. The chlorine ionic, atomic, and molecular fluxes were controlled independently over more than an order of magnitude and at flux levels within an order of magnitude of that typically used in high density plasma processes. The etching yield increased with the increase of Cl/Cl+ flux ratio but gradually saturated at higher flux ratios as the surface became saturated with chlorine. The ion energy dependence was a linear function of (Eion1/2−Eth1/2), where the threshold energy Eth was found to be approximately 10 eV. With Cl+ ion bombardment, the etching yield of Cl was two to three times higher than that of Cl2 at higher flux ratios. The angular dependence of ion-enhanced etching yield was also measured. The etching yield was reduced by approximately 30% and 50% whe...

Method and apparatus for reducing isolation stress in integrated circuits

Abstract: Stress resulting from silicon nitride is diminished by forming an oxidation mask with silicon nitride having a graded silicon concentration. Grading is accomplished by changing the silicon content in the silicon nitride by varying the amount of hydride, such as dichlorosilane (DCS), mixed with ammonia. The silicon nitride can be graded in a substantially linear or non-linear fashion. Silicon nitride formed with higher levels of DCS mixed with ammonia is referred to as silicon rich nitride because of its relatively higher silicon content. In one embodiment, the graded silicon nitride may be formed with one type of non-linear silicon grading, an abrupt junction. In other embodiments, the silicon nitride is formed in a variety of shapes fashioned during or after silicon nitride growth. In one embodiment, the stress from the silicon nitride is reduced by forming a polysilicon buffer layer between two silicon nitride layers. In another embodiment, the stress from the silicon nitride is reduced by forming the silicon nitride on a pad layer, which in turn is formed on a base layer.

TMAH etching of silicon and the interaction of etching parameters

Abstract: A study of tetramethylammonium hydroxide (TMAH) etching of silicon and the interaction of etching parameters has been carried out. We find that the silicon etch rate increases as the TMAH concentration increases and it reaches a maximum at 4 wt.%. The etch rate of n-type silicon is found to be slightly higher than that of p-type silicon. We conclude that illumination has no effect on the etch rate with our present experimental set-up. Etching experiments on silicon oxide layers show that both wet and dry oxides etch faster in lower TMAH concentration, and wet oxide generally etches faster than a dry oxide layer. A higher temperature also results in a higher etch rate for both the wet and dry oxides. From factorial analysis, we conclude that for silicon etching, the interaction between TMAH concentration and substrate type is the strongest. The silicon oxide etching experiments show that temperature is the most prominent factor and the most pronounced interaction exists between temperature and TMAH concentration.

Techniques for etching an oxide layer

Abstract: A method for etching a substrate having thereon a silicon dioxide-containing layer disposed above a TiN layer is disclosed. The method includes positioning the substrate in the plasma processing chamber. There is also included flowing an etchant source gas that includes CO, CHF 3 , neon and N 2 into the plasma processing chamber. Further, there is included forming a plasma out of the etchant source gas within the plasma processing chamber to cause etching of the silicon-dioxide-containing layer.

A precision yaw rate sensor in silicon micromachining

Abstract: A new generation of production-ready yaw rate sensor, based on silicon micromachining, is presented. The sensor is designed for mass production and high performance applications. A combination of surface and bulk micromachining leads to an advantage in design, signal evaluation and packaging. This paper discusses the design of the sensing element: two bulk micromachined oscillating masses each of which supports two surface micromachined accelerometers for detection of the Coriolis force. Mechanical balancing of the sensor is avoided by implementation of a new dry etching process and precise photolithography. The electrodynamic actuation and high Q-value of the oscillator allow packaging at atmospheric pressure. Characterization results of the device are presented.

Wafer-to-wafer transfer of microstructures using break-away tethers

Abstract: Break-away tethers to secure electronic, mechanical, optical, or other microstructures, during release from one substrate and transfer to another. Microstructures are fabricated with integrated tethers attaching them to a first substrate. The structures are undercut by etching and contacted and bonded to a second substrate. First and second substrates are separated, breaking the tethers.

High-density plasma etching of compound semiconductors

Abstract: Inductively coupled plasma (ICP) etching of GaAs, GaP, and InP is reported as a function of plasma chemistry, chamber pressure, rf power, and source power. Etches were characterized in terms of rate and anisotropy using scanning electron microscopy, and root-mean-square surface roughness using atomic force microscopy. ICP etch rates were compared to electron cyclotron resonance etch rates for Cl2/Ar, Cl2/N2, BCl3/Ar, and BCl3/N2 plasmas under similar plasma conditions. High GaAs and GaP etch rates (exceeding 1500 nm/min) were obtained in Cl2-based plasmas due to the high concentration of reactive Cl neutrals and ions generated as compared to BCl3-based plasmas. InP etch rates were much slower and independent of plasma chemistry due to the low volatility of the InClx etch products. The surface morphology for all three materials was smooth over a wide range of etch conditions.

Gas-phase Silicon Etching With Bromine Trifluoride

Abstract: We report the first study of gas phase silicon micromachining using pure bromine trifluoride (BrF/sub 3/) gas at room temperature. This work includes both the design of a new apparatus and etching characterization. Consistent etching results and high molecular etching efficiency (80%) have been achieved by performing the etching in a controlled pulse mode. This pure gaseous BrF/sub 3/ etching process is isotropic and has a high etch rate with superb selectivity over silicon dioxide (3000:1), silicon nitride (400-800:1) and photoresist (1000:1). Moreover, gaseous BrF/sub 3/ etching has also been demonstrated in surface micromachining process, where silicon nitride channels and membranes using polysilicon as the sacrificial layer have been successfully fabricated.

Methods for performing plasma etching operations on microelectronic structures

Abstract: A method for etching a layer of a microelectronic structure includes the steps of masking the layer to be etched so that predetermined portions of the layer are exposed, and providing an etching gas. An additional gas is also provided wherein the additional gas generates a compound having a carbene structure when exposed to a plasma discharge. A plasma of the etching gas and the additional gas is generated to thereby etch the exposed portions of the layer and to form the compound having a carbene structure. A polymer can thus be formed from the compound having the carbene structure on the sidewalls of the etched portions of the layer. Accordingly, the profile of the etched layer can be improved.