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Showing papers on "Etching (microfabrication) published in 2003"


Journal ArticleDOI
TL;DR: In this paper, the etch rates of 53 materials that are used or potentially can be used or in the fabrication of microelectromechanical systems and integrated circuits were prepared.
Abstract: Samples of 53 materials that are used or potentially can be used or in the fabrication of microelectromechanical systems and integrated circuits were prepared: single-crystal silicon with two doping levels, polycrystalline silicon with two doping levels, polycrystalline germanium, polycrystalline SiGe, graphite, fused quartz, Pyrex 7740, nine other preparations of silicon dioxide, four preparations of silicon nitride, sapphire, two preparations of aluminum oxide, aluminum, Al/2%Si, titanium, vanadium, niobium, two preparations of tantalum, two preparations of chromium, Cr on Au, molybdenum, tungsten, nickel, palladium, platinum, copper, silver, gold, 10 Ti/90 W, 80 Ni/20 Cr, TiN, four types of photoresist, resist pen, Parylene-C, and spin-on polyimide. Selected samples were etched in 35 different etches: isotropic silicon etchant, potassium hydroxide, 10:1 HF, 5:1 BHF, Pad Etch 4, hot phosphoric acid, Aluminum Etchant Type A, titanium wet etchant, CR-7 chromium etchant, CR-14 chromium etchant, molybdenum etchant, warm hydrogen peroxide, Copper Etchant Type CE-200, Copper Etchant APS 100, dilute aqua regia, AU-5 gold etchant, Nichrome Etchant TFN, hot sulfuric+phosphoric acids, Piranha, Microstrip 2001, acetone, methanol, isopropanol, xenon difluoride, HF+H/sub 2/O vapor, oxygen plasma, two deep reactive ion etch recipes with two different types of wafer clamping, SF/sub 6/ plasma, SF/sub 6/+O/sub 2/ plasma, CF/sub 4/ plasma, CF/sub 4/+O/sub 2/ plasma, and argon ion milling. The etch rates of 620 combinations of these were measured. The etch rates of thermal oxide in different dilutions of HF and BHF are also reported. Sample preparation and information about the etches is given.

1,256 citations


Journal ArticleDOI
TL;DR: In this article, an out-of-plane hollow microneedles are fabricated using a sequence of deep-reactive ion etching (DRIE), anisotropic wet etching and conformal thin film deposition.
Abstract: This paper presents a novel process for the fabrication of out-of-plane hollow microneedles in silicon. The fabrication method consists of a sequence of deep-reactive ion etching (DRIE), anisotropic wet etching and conformal thin film deposition, and allows needle shapes with different, lithography-defined tip curvature. In this study, the length of the needles varied between 150 and 350 micrometers. The widest dimension of the needle at its base was 250 /spl mu/m. Preliminary application tests of the needle arrays show that they are robust and permit skin penetration without breakage. Transdermal water loss measurements before and after microneedle skin penetration are reported. Drug delivery is increased approximately by a factor of 750 in microneedle patch applications with respect to diffusion alone. The feasibility of using the microneedle array as a blood sampler on a capillary electrophoresis chip is demonstrated.

410 citations


Journal ArticleDOI
TL;DR: In this paper, the growth of single-crystalline silicon nanowires was carried out through an electroless metal deposition process in a conventional autoclave containing aqueous HF and AgNO3 solution near room temperature.
Abstract: This article concerns the detailed investigations on the silver dendrite-assisted growth of single-crystalline silicon nanowires, and their possible self-assembling nanoelectrochemistry growth mechanism. The growth of silicon nanowires was carried out through an electroless metal deposition process in a conventional autoclave containing aqueous HF and AgNO3 solution near room temperature. In order to explore the mechanism and prove the centrality of silver dendrites in the growth of silicon nanowires, other etching solution systems with different metal species were also investigated in this work. The morphology of etched silicon substrates strongly depends upon the composition of the etching solution, especially the metal species. Our experimental results prove that the simultaneous formation of silver dendrites is a guarantee of the preservation of free-standing nanoscale electrolytic cells on the silicon substrate, and also assists in the final formation of silicon nanowire arrays on the substrate surface.

389 citations


Journal ArticleDOI
TL;DR: In this article, ZnO:Al films were prepared on glass substrates with different sputter techniques from ceramic and metallic targets using a wide range of deposition parameters and the correlation of sputter parameters, film growth and structural properties was discussed in terms of a modified Thornton model.

367 citations


Patent
26 Nov 2003
TL;DR: In this paper, a process for removing a substance having a dielectric constant greater than silicon dioxide from a substrate by reacting the substance with a reactive agent consisting of at least one member from the group consisting a halogen-containing compound, a boron-containing compounds, a hydrogen-containing chemical compound, an organochlorosilane, a carbon-containing polysilicon dioxide compound, and a chlorophane is described.
Abstract: A process for the removal of a substance from a substrate for etching and/or cleaning applications is disclosed herein. In one embodiment, there is provided a process for removing a substance having a dielectric constant greater than silicon dioxide from a substrate by reacting the substance with a reactive agent that comprises at least one member from the group consisting a halogen-containing compound, a boron-containing compound, a hydrogen-containing compound, nitrogen-containing compound, a chelating compound, a carbon-containing compound, a chlorosilane, a hydrochlorosilane, or an organochlorosilane to form a volatile product and removing the volatile product from the substrate to thereby remove the substance from the substrate.

346 citations


Journal ArticleDOI
TL;DR: In this article, a double-sided metal waveguide was used for lasing at ∼3.0 ε-THz (λ≈98-102 µm) in a quantum-cascade structure.
Abstract: We report lasing at ∼3.0 THz (λ≈98–102 μm) in a quantum-cascade structure in which mode confinement is provided by a double-sided metal waveguide. The depopulation mechanism is based on resonant phonon scattering, as in our previous work. Lasing takes place in pulsed mode up to a heat-sink temperature of 77 K. The waveguide consists of metallic films placed above and below the 10-μm-thick multiple-quantum-well gain region, which gives low losses and a modal confinement factor of nearly unity. Fabrication takes place via low-temperature metallic wafer bonding and subsequent substrate removal using selective etching. This type of waveguide is expected to be increasingly advantageous at even longer wavelengths.

342 citations


Journal ArticleDOI
22 Aug 2003-Langmuir
TL;DR: In this paper, a new combined vapor phase and solution phase process, using only inexpensive commodity chemicals, was used to produce Si nanoparticles with bright visible photoluminescence at room temperature.
Abstract: Silicon nanoparticles with bright visible photoluminescence have been prepared by a new combined vapor phase and solution phase process, using only inexpensive commodity chemicals. CO2 laser induced pyrolysis of silane was used to produce Si nanoparticles at high rates (20−200 mg/h). Particles with an average diameter as small as 5 nm were prepared directly by this vapor phase (aerosol) synthesis. Etching these particles with mixtures of hydrofluoric acid (HF) and nitric acid (HNO3) reduced the size and passivated the surface of these particles such that after etching they exhibited bright visible luminescence at room temperature. The wavelength of maximum photoluminescence (PL) intensity was controlled from above 800 nm to below 500 nm by controlling the etching time and conditions. Particles with blue emission (maximum PL intensity at 420 nm) were prepared by rapid thermal oxidation of orange-emitting particles. The particle synthesis methods; steady-state photoluminescence spectra; results of their cha...

320 citations


Patent
10 Apr 2003
TL;DR: In this article, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer.
Abstract: In a solar cell having p doped regions and n doped regions alternately formed in a surface of a semiconductor wafer in offset levels through use of masking and etching techniques, metal contacts are made to the p regions and n regions by first forming a base layer contacting the p doped regions and n doped regions which functions as an antireflection layer, and then forming a barrier layer, such as titanium tungsten or chromium, and a conductive layer such as copper over the barrier layer. Preferably the conductive layer is a plating layer and the thickness thereof can be increased by plating.

268 citations


Patent
Selena Chan1, Andrew A. Berlin1, Sunghoon Kwon1, Narayanan Sundararajan1, Mineo Yamakawa1 
07 Oct 2003
TL;DR: In this article, a thin coating of a Raman active metal, such as gold or silver, may be applied to the porous silicon substrate by cathodic electromigration or any known technique, providing an extensive, metal rich environment for SERS, SERRS, hyper-Raman and/or CARS spectroscopy.
Abstract: The methods and apparatus 300 disclosed herein concern Raman spectroscopy using metal coated nanocrystalline porous silicon substrates 240, 340. In certain embodiments of the invention, porous silicon substrates 110, 210 may be formed by anodic etching in dilute hydrofluoric acid 150. A thin coating of a Raman active metal, such as gold or silver, may be coated onto the porous silicon 110, 210 by cathodic electromigration or any known technique. The metal-coated substrate 240, 340 provides an extensive, metal rich environment for SERS, SERRS, hyper-Raman and/or CARS Raman spectroscopy. In certain embodiments of the invention, metal nanoparticles may be added to the metal-coated substrate 240, 340 to further enhance the Raman signals. Raman spectroscopy may be used to detect, identify and/or quantify a wide variety of analytes, using the disclosed methods and apparatus 300.

229 citations


Journal ArticleDOI
TL;DR: In this article, the link between etch process parameters such as pressure, rf power, etching gas chemistry, temperature, and the energy-resolving quadrupole mass spectrometer assembled into the cathode was established.
Abstract: The process of pattern transfer of desired topological features into silicon plays a critical role for the production of microelectronic and photonic devices, and micro- and nanoelectromechanical systems. Any deviation from the desired shape of the pattern limits density, yield, and reliability of these devices. Gas reactivity, pressure, ion, electron, and reactant transport to the surface, and product transport away from the surface, have all been identified as important issues that control the microscopic uniformity in high aspect ratio etching. When etch-inhibiting chemistry by the gas chopping deep reactive ion etching (RIE) was employed, it caused enormous complications in the scaling of etching rates, with increasing aspect ratio. Using an energy-resolving quadrupole mass spectrometer assembled into the cathode, specially designed test features, and etching simulation models, we establish the link between etch process parameters such as pressure, rf power, etching gas chemistry, temperature, and the...

208 citations


Journal ArticleDOI
F. Laermer1, A. Urban1
TL;DR: In this article, an optimized hardware for balanced RF drive at high power levels (3 kW) of the inductive plasma source in combination with spatial ion discrimination and collimation yields etch-rates in excess of 10 µm/min with excellent uniformity of profile and rate distribution.

Journal ArticleDOI
TL;DR: In this paper, the transport properties of single asymmetric nanopores in polyethylene terephthalate (PET) and polyimide (Kapton) membranes are investigated.
Abstract: Transport properties of single asymmetric nanopores in polyethylene terephthalate (PET) and polyimide (Kapton) membranes are investigated. The pores are produced by the track-etching technique based on irradiation of the polymer with heavy ions and subsequent chemical etching. Electrolytic conductivity measurements show that asymmetric pores in both polymeric materials rectify the ionic current. The PET and Kapton pores differ however significantly in their transient transport properties. The ion current through the PET nanopore fluctuates with the amplitudes reaching even 100% of the mean current, whereas nanopores in Kapton exhibit a stable current signal. We show that the transient properties of the pores depend on the chemical structure of the polymer as well as on the irradiation and etching procedures used in this work.

Patent
29 Oct 2003
TL;DR: In this article, the antireflection film material to be used for lithography contains at least a polymer compound having a repeating unit by the copolymerization expressed by general formula.
Abstract: PROBLEM TO BE SOLVED: To provide an antireflection film material having an excellent antireflection effect against exposure at short wavelength, a high etching selection ratio, that is, having a sufficiently fast etching rate with respect to a photoresist film, and having a sufficiently slow etching rate compared to the substrate to be processed, and capable of producing a perpendicular profile of a resist pattern to be formed in the photoresist film on the antireflection film. SOLUTION: The antireflection film material to be used for lithography contains at least a polymer compound having a repeating unit by the copolymerization expressed by general formula (1), or a polymer compound having a repeating unit by the copolymerization expressed by general formula (2) and a polymer compound having a repeating unit by the copolymerization expressed by general formula (3). COPYRIGHT: (C)2005,JPO&NCIPI

Journal ArticleDOI
TL;DR: In this article, the formation of GaN nanotip pyramids by selective and anisotropic etching of N-polar GaN in KOH solution was demonstrated.
Abstract: We experimentally demonstrate the formation of GaN nanotip pyramids by selective and anisotropic etching of N-polar GaN in KOH solution. For samples grown with adjacent Ga- and N-polar regions on the same wafer, the KOH solution was found to selectively etch only the N-polar surface while leaving the Ga-polar surface intact. An aggregation of hexagonal pyramids with well defined {10 1 1} facets and very sharp tips with diameters less than ∼20 nm were formed. The density of the pyramids can be controlled by varying the KOH concentration, solution temperature or the etch duration. The GaN etching activation energy is estimated to be Ea≈0.587 eV. Dense GaN pyramids with sharp tips have applications in both electronic and photonic devices.

Journal ArticleDOI
TL;DR: In this paper, the fabrication of arrays of sub-50-nm gold dots and line structures with deliberately designed 12−100-nm gaps is reported, which are made by initially using dip-pen nanolithography to pattern the etch resist, 16-mercaptohexadecanoic acid, on Au/Ti/SiOx/Si substrates and then using wet-chemical etching to remove the exposed gold.
Abstract: The fabrication of arrays of sub-50-nm gold dots and line structures with deliberately designed 12−100-nm gaps is reported. These structures were made by initially using dip-pen nanolithography to pattern the etch resist, 16-mercaptohexadecanoic acid, on Au/Ti/SiOx/Si substrates and then using wet-chemical etching to remove the exposed gold.

Patent
Yunsang Kim1, Shin Neung Ho1, Chae Hee Yeop1, Joey Chiu1, Yan Ye1, Fang Tian1, Xiaoye Zhao1 
01 Aug 2003
TL;DR: In this article, a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber is described.
Abstract: The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 Å/min.

Patent
22 May 2003
TL;DR: In this paper, a substrate having a metal layer thereon is placed in a plasma chamber and the metal layer is etched and then the substrate is removed from the plasma chamber to perform a dry cleaning.
Abstract: A method for cleaning a plasma chamber after metal etching. First, a substrate having a metal layer thereon is placed in a plasma chamber. Next, the metal layer is etched. Finally, the substrate is removed from the plasma chamber to perform a dry cleaning which includes the following steps. First, the inner wall of the plasma chamber is cleaned by plasma etching using oxygen as a process gas. Next, the top and bottom electrode plates in the plasma chamber are cleaned by plasma etching using chlorine and boron chloride as process gases. Next, the inner wall of the plasma chamber is cleaned again by plasma etching using sulfur hexafluoride and oxygen as process gases. Finally, oxygen and helium used as purging gases are injected into the plasma chamber and exhausted from therein.

Journal ArticleDOI
TL;DR: 3D adiabatically tapered structures are fabricated integrally with optical waveguides in a silicon-on-insulator wafer, for efficient coupling from an optical fiber, or free-space, to a chip.
Abstract: We present the fabrication of 3D adiabatically tapered structures, for efficient coupling from an optical fiber, or free-space, to a chip. These structures are fabricated integrally with optical waveguides in a silicon-on-insulator wafer. Fabrication involves writing a single grayscale mask in HEBS glass with a high-energy electron beam, ultra-violet grayscale lithography, and inductively coupled plasma etching. We also present the experimentally determined coupling efficiencies of the fabricated tapers using end-fire coupling. The design parameters of the tapered structures are based on electromagnetic simulations and are discussed in this paper.

Patent
01 Jul 2003
TL;DR: In this paper, a method of fabricating an ultra shallow junction of a field effect transistor is described, which includes the steps of etching a substrate near a gate structure to define a source region and a drain region of the transistor, forming a spacer/protective film having poor step coverage to protect frontal surfaces of the source and drain regions, laterally etching sidewalls of the regions beneath a gate dielectric, and removing the protective film.
Abstract: A method of fabricating an ultra shallow junction of a field effect transistor is provided. The method includes the steps of etching a substrate near a gate structure to define a source region and a drain region of the transistor, forming a spacer/protective film having poor step coverage to protect frontal surfaces of the source and drain regions, laterally etching sidewalls of the regions beneath a gate dielectric to define a channel region, and removing the protective film.

Patent
Hiroyuki Ohta1
24 Sep 2003
TL;DR: In this article, a gate electrode traverses a corresponding one of active regions and forming extension regions of source/drain in the active region on both sides of the gate electrode.
Abstract: A semiconductor device manufacture method has the steps of: (a) forming a gate electrode traversing a corresponding one of active regions and forming extension regions of source/drain in the active region on both sides of the gate electrode; (b) depositing first and second insulating films having different etching characteristics and anisotropically etching the first and second insulating films to form a side wall spacer on the side walls of the gate electrode; (c) selectively etching the first insulating film to form a retraction portion; (d) implanting ions to form source/drain regions in the silicon substrate; and (e) depositing metal capable of silicidation, and performing a silicidation reaction and form silicide regions also under the retraction portion.

Patent
09 Dec 2003
TL;DR: A gallium nitride (GaN) based light emitting diode (LED), wherein light is extracted through a nitrogen face (N-face) of the LED and a surface of the N-face (42) is roughened into one or more hexagonal shaped cones as discussed by the authors.
Abstract: A gallium nitride (GaN) based light emitting diode (LED), wherein light is extracted through a nitrogen face (N-face) (42) of the LED and a surface of the N-face (42) is roughened into one or more hexagonal shaped cones. The roughened surface reduces light reflections occurring repeatedly inside the LED, and thus extracts more light out of the LED. The surface of the N-face (42) is roughened by an anisotropic etching, which may comprise a dry etching or a photo-enhanced chemical (PEC) etching.

Patent
03 Jul 2003
TL;DR: In this paper, a non-metallic mask layer is used to expose the underlying areas of the substrate to a plasma at a first rate and a mask layer at a rate lower than the first rate.
Abstract: A method of etching silicon carbide using a nonmetallic mask layer. The method includes providing a silicon carbide substrate; forming a non-metallic mask layer by applying a layer of material on the substrate; patterning the mask layer to expose underlying areas of the substrate; and etching the underlying areas of the substrate with a plasma at a first rate, while etching the mask layer at a rate lower than the first rate.

Journal ArticleDOI
TL;DR: In this article, the effects of the ion beam-solid interaction determining the formation of small structures by ion-beam sputtering and chemically assisted material deposition and etching are investigated.
Abstract: Focused ion beams with diameters of 8 to 50 nm are used for material processing in the nanoscale regime. In this paper, effects of the ion beam–solid interaction determining the formation of small structures by ion-beam sputtering and chemically assisted material deposition and etching are investigated. In the case of decreasing feature size, angle-dependent sputtering, a non-constant sputter rate, and scattered ions play an important role. The impact on side-wall angle, aspect ratio, and shape of the bottom of the etched structures is discussed. In beam tail regions, these effects will be especially pronounced, leading to material swelling instead of material removal. Ion beam assisted etching and deposition will face additional effects. For small structures, gas depletion becomes a significant drawback. The impact on gas depletion and the competition with sputtering are discussed.

Patent
18 Sep 2003
TL;DR: In this paper, a method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon oxide and an aluminum oxide, which is exposed to an etching solution comprising HF and an organic HF solvent.
Abstract: A method of etching silicon nitride substantially selectively relative to an oxide of aluminum includes providing a substrate comprising silicon nitride and an oxide of aluminum. The silicon nitride and the oxide is exposed to an etching solution comprising HF and an organic HF solvent under conditions effective to etch the silicon nitride substantially selectively relative to the oxide. Other aspects and implementations are contemplated.

Patent
13 Nov 2003
TL;DR: In this article, a semiconductor device is provided to avoid a defect of a gate oxide layer and solve a scratch problem by depositing an oxide layer of a thickness corresponding to the depth of a trench and selectively etching the oxide layer to form a trench oxide layer.
Abstract: PURPOSE: A semiconductor device is provided to avoid a defect of a gate oxide layer and solve a scratch problem by depositing an oxide layer of a thickness corresponding to the depth of a trench and by selectively etching the oxide layer to form a trench oxide layer. CONSTITUTION: An oxide layer that has a thickness corresponding to a desired depth of the trench and a width corresponding to a desired width of the trench is patterned on a silicon wafer(11). A shallow silicon epitaxial layer(13) thinner than the oxide layer is formed between the patterned oxide layers and on the silicon wafer. A gate oxide layer(14) of a predetermined width is formed on the silicon epitaxial layer. A gate(15) is formed on the gate oxide layer. An impurity-doped LDD(lightly doped drain) region(16) is formed in the outside of the gate and in the silicon epitaxial layer. Sidewalls(17) are formed on the sides of the oxide layer and the gate formed on the silicon epitaxial layer. An impurity-doped source/drain region(18) is formed in the silicon epitaxial layer deeper than the LDD region in the outside of the sidewall.

Journal ArticleDOI
TL;DR: In this paper, a gyroscope with a measured noise floor of 0.02/spl deg/s/Hz/sup 1/2/ at 5 Hz is fabricated by post-CMOS micromachining that uses interconnect metal layers to mask the structural etch steps.
Abstract: A gyroscope with a measured noise floor of 0.02/spl deg//s/Hz/sup 1/2/ at 5 Hz is fabricated by post-CMOS micromachining that uses interconnect metal layers to mask the structural etch steps. The 1 /spl times/ 1 mm lateral-axis angular rate sensor employs in-plane vibration and out-of-plane Coriolis acceleration detection with on-chip CMOS circuitry. The resultant device incorporates a combination of 1.8-/spl mu/m-thick thin-film structures for springs with out-of-plane compliance and 60-/spl mu/m-thick bulk silicon structures defined by deep reactive-ion etching for the proof mass and springs with out-of-plane stiffness. The microstructure is flat and avoids excessive curling, which exists in prior thin-film CMOS-microelectromechanical systems gyroscopes. Complete etch removal of selective silicon regions provides electrical isolation of bulk silicon to obtain individually controllable comb fingers. Direct motion coupling is observed and analyzed.

Patent
26 Jun 2003
TL;DR: In this paper, a new methodology of monitoring process drift and chamber seasoning is presented based on the discovery of the strong correlation between chamber surface condition and free radical density in a plasma.
Abstract: A new methodology of monitoring process drift and chamber seasoning is presented based on the discovery of the strong correlation between chamber surface condition and free radical density in a plasma. Lower free radical density indicates either there is a significant process drift in the case of production wafer etching or that the chamber needs more seasoning before resuming production wafer etching. Free radical density in the plasma is monitored through measuring the emission intensities of free radicals in the plasma by an optical spectrometer. A timely detection of the extent of process drift and chamber seasoning can help to minimize the chamber downtime and improve its throughput significantly. Such method can also be implemented in existing production wafer etching or chamber seasoning practices in an in-situ, real-time, and non-intrusive manner.

Journal ArticleDOI
TL;DR: Micrometer-sized one-dimensional photonic crystals of porous Si that spontaneously assemble, orient, and sense their local environment are prepared and spontaneously align at an organic liquid–water interface, inducing predictable shifts in the optical spectra of both mirrors.
Abstract: Micrometer-sized one-dimensional photonic crystals of porous Si that spontaneously assemble, orient, and sense their local environment are prepared. The photonic crystals are generated by electrochemically etching two discrete porous multilayered dielectric mirrors into Si, one on top of the other. The first mirror is chemically modified by hydrosilylation with dodecene before the etching of the second mirror, which is prepared with an optical reflectivity spectrum that is distinct from the first. The entire film is removed from the substrate, and the second mirror is then selectively modified by mild thermal oxidation. The films are subsequently fractured into small particles by sonication. The chemically asymmetric particles spontaneously align at an organic liquid-water interface, with the hydrophobic side oriented toward the organic phase and the hydrophilic side toward the water. Sensing is accomplished when liquid at the interface infuses into the porous mirrors, inducing predictable shifts in the optical spectra of both mirrors.

Journal ArticleDOI
TL;DR: In this article, the performance evaluation of miniature fuel cells on silicon wafers is presented, where the feed holes and channels are prepared by anisotropic silicon etching from the back and front of the wafer using silicon dioxide as an etching mask.

Patent
Zhisong Huang1, Lumin Li1
06 Oct 2003
TL;DR: In this paper, a method for etching a feature in a layer through an etching mask is described, in which a protective layer is formed on exposed surfaces of the etch mask and vertical sidewalls of the feature with a passivation gas mixture.
Abstract: A method for etching a feature in a layer through an etching mask is provided. A protective layer is formed on exposed surfaces of the etching mask and vertical sidewalls of the feature with a passivation gas mixture. The feature is etched through the etching mask with reactive etching mixtures containing at least one etching chemical and at least one passivation chemical.