Showing papers on "Etching (microfabrication) published in 2009"

Silicon Nanotube Battery Anodes

Abstract: We present Si nanotubes prepared by reductive decomposition of a silicon precursor in an alumina template and etching. These nanotubes show impressive results, which shows very high reversible charge capacity of 3247 mA h/g with Coulombic efficiency of 89%, and also demonstrate superior capacity retention even at 5C rate (=15 A/g). Furthermore, the capacity in a Li-ion full cell consisting of a cathode of LiCoO2 and anode of Si nanotubes demonstrates a 10 times higher capacity than commercially available graphite even after 200 cycles.

Anisotropic etching and nanoribbon formation in single-layer graphene.

Abstract: We demonstrate anisotropic etching of single-layer graphene by thermally activated nickel nanoparticles. Using this technique, we obtain sub-10-nm nanoribbons and other graphene nanostructures with edges aligned along a single crystallographic direction. We observe a new catalytic channeling behavior, whereby etched cuts do not intersect, resulting in continuously connected geometries. Raman spectroscopy and electronic measurements show that the quality of the graphene is resilient under the etching conditions, indicating that this method may serve as a powerful technique to produce graphene nanocircuits with well-defined crystallographic edges.

Nanostructured black silicon and the optical reflectance of graded-density surfaces

Abstract: We fabricate and measure graded-index “black silicon” surfaces and find the underlying scaling law governing reflectance. Wet etching (100) silicon in HAuCl4, HF, and H2O2 produces Au nanoparticles that catalyze formation of a network of [100]-oriented nanopores. This network grades the near-surface optical constants and reduces reflectance to below 2% at wavelengths from 300 to 1000 nm. As the density-grade depth increases, reflectance decreases exponentially with a characteristic grade depth of about 1/8 the vacuum wavelength or half the wavelength in Si. Observation of Au nanoparticles at the ends of cylindrical nanopores confirms local catalytic action of moving Au nanoparticles.

Single crystalline mesoporous silicon nanowires.

Abstract: Herein we demonstrate a novel electroless etching synthesis of monolithic, single-crystalline, mesoporous silicon nanowire arrays with a high surface area and luminescent properties consistent with conventional porous silicon materials. These porous nanowires also retain the crystallographic orientation of the wafer from which they are etched. Electron microscopy and diffraction confirm their single-crystallinity and reveal the silicon surrounding the pores is as thin as several nanometers. Confocal fluorescence microscopy showed that the photoluminescence (PL) of these arrays emanate from the nanowires themselves, and their PL spectrum suggests that these arrays may be useful as photocatalytic substrates or active components of nanoscale optoelectronic devices.

Electrically conductive and optically active porous silicon nanowires.

Abstract: We report the synthesis of vertical silicon nanowire array through a two-step metal-assisted chemical etching of highly doped n-type silicon (100) wafers in a solution of hydrofluoric acid and hydrogen peroxide. The morphology of the as-grown silicon nanowires is tunable from solid nonporous nanowires, nonporous/nanoporous core/shell nanowires, to entirely nanoporous nanowires by controlling the hydrogen peroxide concentration in the etching solution. The porous silicon nanowires retain the single crystalline structure and crystallographic orientation of the starting silicon wafer and are electrically conductive and optically active with visible photoluminescence. The combination of electronic and optical properties in the porous silicon nanowires may provide a platform for novel optoelectronic devices for energy harvesting, conversion, and biosensing.

Etching of graphene devices with a helium ion beam.

Abstract: We report on the etching of graphene devices with a helium ion beam, including in situ electrical measurement during lithography. The etching process can be used to nanostructure and electrically isolate different regions in a graphene device, as demonstrated by etching a channel in a suspended graphene device with etched gaps down to about 10 nm. Graphene devices on silicon dioxide (SiO(2)) substrates etch with lower He ion doses and are found to have a residual conductivity after etching, which we attribute to contamination by hydrocarbons.

Plasma process with photoresist mask pretreatment

Abstract: A method for etching features in a dielectric layer through a photoresist (PR) mask is provided. The PR mask is patterned using laser light having a wavelength not more than 193 nm. The PR mask is pre-treated with a noble gas plasma, and then a plurality of cycles of a plasma process is provided. Each cycle includes a deposition phase that deposits a deposition layer over the PR mask, the deposition layer covering a top and sidewalls of mask features of the PR mask, and a shaping phase that shapes the deposition layer deposited over the PR mask.

Substrate processing method

Abstract: The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.

Black silicon method X: a review on high speed and selective plasma etching of silicon with profile control: an in-depth comparison between Bosch and cryostat DRIE processes as a roadmap to next generation equipment

Abstract: An intensive study has been performed to understand and tune deep reactive ion etch (DRIE) processes for optimum results with respect to the silicon etch rate, etch profile and mask etch selectivity (in order of priority) using state-of-the-art dual power source DRIE equipment. The research compares pulsed-mode DRIE processes (e.g. Bosch technique) and mixed-mode DRIE processes (e.g. cryostat technique). In both techniques, an inhibitor is added to fluorine-based plasma to achieve directional etching, which is formed out of an oxide-forming (O2) or a fluorocarbon (FC) gas (C4F8 or CHF3). The inhibitor can be introduced together with the etch gas, which is named a mixed-mode DRIE process, or the inhibitor can be added in a time-multiplexed manner, which will be termed a pulsed-mode DRIE process. Next, the most convenient mode of operation found in this study is highlighted including some remarks to ensure proper etching (i.e. step synchronization in pulsed-mode operation and heat control of the wafer). First of all, for the fabrication ...... Enjoy reading . Henri Jansen 18 June 2008

Luminescent Colloidal Dispersion of Silicon Quantum Dots from Microwave Plasma Synthesis: Exploring the Photoluminescence Behavior Across the Visible Spectrum

Abstract: Aiming for a more practical route to highly stable visible photoluminescence (PL) from silicon, a novel approach to produce luminescent silicon nanoparticles (Si-NPs) is developed. Single crystalline Si-NPs are synthesized by pyrolysis of silane (SiH 4 ) in a microwave plasma reactor at very high production rates (0.1-10 gh -1 ). The emission wavelength of the Si-NPs is controlled by etching them in a mixture of hydrofluoric acid and nitric acid. Emission across the entire visible spectrum is obtained by varying the etching time. It is observed that the air oxidation of the etched Si-NPs profoundly affects their optical properties, and causes their emission to blue-shift and diminish in intensity with time. Modification of the silicon surface by UV-induced hydrosilylation also causes a shift in the spectrum. The nature of the shift (red/blue) is dependent on the emission wavelength of the etched Si-NPs. In addition, the amount of shift depends on the type of organic ligand on the silicon surface and the UV exposure time. The surface modification of Si-NPs with different alkenes results in highly stable PL and allows their dispersion in a variety of organic solvents. This method of producing macroscopic quantities of Si-NPs with very high PL stability opens new avenues to applications of silicon quantum dots in optoelectronic and biological fields, and paves the way towards their commercialization.

Densely Packed Arrays of Ultra-High-Aspect-Ratio Silicon Nanowires Fabricated using Block-Copolymer Lithography and Metal-Assisted Etching

Abstract: Metal-assisted etching is used in conjunction with block-copolymer lithography to create ordered and densely-packed arrays of high-aspect-ratio single-crystal silicon nanowires with uniform crystallographic orientations. Nanowires with diameters and spacings down to 19 nm and 10 nm, respectively, are created as either continuous carpets or as carpets within trenches. Wires with aspect ratios up to 220 are fabricated, and capillary-induced clustering of wires is eliminated through post-etching critical point drying. The wires are single crystals with 〈100〉 axis directions. The distribution of wire diameters is narrow and closely follows the size distribution of the block copolymer, with a standard deviation of 3.12 nm for wires of mean diameters 22.06 nm. Wire arrays formed in carpets and in channels have hexagonal order with good fidelity to the block copolymer pattern. Fabrication of wires in topographic features demonstrates the ability to accurately control wire placement. Wire arrays made using this new process will have applications in the creation of arrays of photonic and sensing devices.

Smooth siconi etch for silicon-containing films

Abstract: A method of etching silicon-containing material is described and includes a SiConi™ etch having a greater or lesser flow ratio of hydrogen compared to fluorine than that found in the prior art. Modifying the flow rate ratios in this way has been found to reduce roughness of the post-etch surface and to reduce the difference in etch-rate between densely and sparsely patterned areas. Alternative means of reducing post-etch surface roughness include pulsing the flows of the precursors and/or the plasma power, maintaining a relatively high substrate temperature and performing the SiConi™ in multiple steps. Each of these approaches, either alone or in combination, serve to reduce the roughness of the etched surface by limiting solid residue grain size.

Carbon-coated silicon nanowire array films for high-performance lithium-ion battery anodes

Abstract: Carbon-coated silicon nanowire array films prepared by metal catalytic etching of silicon wafers and pyrolyzing of carbon aerogel were used for lithium-ion battery anodes. The films exhibited an excellent first discharge capacity of 3344 mAh g−1 with a Coulombic efficiency of 84% at a rate of 150 mA g−1 between 2 and 0.02 V and a significantly enhanced cycling performance, i.e., a reversible capacity of 1326 mAh g−1 was retained after 40 cycles. These improvements were attributed to the uniform and continuous carbon coatings, which increased electronic contact and conduction and buffered large volume changes during lithium ion insertion/extraction.

Method of forming self-aligned contacts and local interconnects

Abstract: A method for simultaneous formation of a self-aligned contact of a core region and a local interconnect of a peripheral region of an integrated circuit includes etching a cap dielectric layer to simultaneously form a hole in the core region and a trench in the peripheral region of the cap dielectric layer, etching a dielectric layer to simultaneously form a hole in the core region and a trench in the peripheral region of the dielectric layer of the dielectric layer, etching a liner layer simultaneously on a shoulder of sidewall spacers associated with the hole and with the trench of the dielectric layer without etching the liner layer at a bottom area of the hole and the trench, performing an oxygen flushing to remove polymer residues, and etching simultaneously through the liner layer that lines the bottom area of the hole and the trench.

Ordered arrays of vertically aligned [110] silicon nanowires by suppressing the crystallographically preferred etching directions.

Abstract: The metal-assisted etching direction of Si(110) substrates was found to be dependent upon the morphology of the deposited metal catalyst. The etching direction of a Si(110) substrate was found to be one of the two crystallographically preferred 100 directions in the case of isolated metal particles or a small area metal mesh with nanoholes. In contrast, the etching proceeded in the vertical [110] direction, when the lateral size of the catalytic metal mesh was sufficiently large. Therefore, the direction of etching and the resulting nanostructures obtained by metal-assisted etching can be easily controlled by an appropriate choice of the morphology of the deposited metal catalyst. On the basis of this finding, a generic method was developed for the fabrication of wafer-scale vertically aligned arrays of epitaxial [110] Si nanowires on a Si(110) substrate. The method utilized a thin metal film with an extended array of pores as an etching catalyst based on an ultrathin porous anodic alumina mask, while a prepatterning of the substrate prior to the metal depostion is not necessary. The diameter of Si nanowires can be easily controlled by a combination of the pore diameter of the porous alumina film and varying the thickness of the deposited metal film.

Rattle-type silica colloidal particles prepared by a surface-protected etching process

Abstract: This paper explores the capability of the “surface-protected etching” process for the creation of rattle-type SiO2@void@SiO2 colloidal structures featuring a mesoporous silica shell and a mesoporous movable silica core. The surface-protected etching process involves stabilization of the particle surface using a polymer ligand, and then selective etching of the interior to form hollow structures. In this paper, this strategy has been extended to the formation of rattle-like structures by etching SiO2@SiO2 core shell particles which are synthesized by a two-step sol gel process. The key is to introduce a protecting polymer of polyvinylpyrrolidone (PVP) to the surface of both core and shell in order to tailor their relative stability against chemical etching. Upon reacting with NaOH, the outer layer silica becomes a hollow shell as only the surface layer is protected by PVP and the interior is removed, while the core remains its original size thanks to the protection of PVP on its surface. This process can be carried out at room temperature without the need of additional templates or complicated heterogeneous coating procedures. The etching process also results in the rattle-type colloids having mesoscale pores with two distinct average sizes. In our demonstration of a model drug delivery process, such mesoporous structures show an interesting two-step elution profile which is believed to be related to the unique porous rattle structures.

Oxide etch with NH4-NF3 chemistry

Abstract: The present invention generally provides apparatus and methods for selectively removing various oxides on a semiconductor substrate. One embodiment of the invention provides a method for selectively removing an oxide on a substrate at a desired removal rate using an etching gas mixture. The etching gas mixture comprises a first gas and a second gas, and a ratio of the first gas and a second gas is determined by the desired removal rate.

Low loss etchless silicon photonic waveguides

Abstract: We demonstrate low loss silicon waveguides fabricated without silicon etching by selective oxidation. We show propagation losses of 0.3dB/cm (λ=1.55µm), roughness of 0.3nm RMS, and 0.0002dB loss for a 90° bend with 20µm bending radius.

Examination of Etching Agent and Etching Mechanism on Femotosecond Laser Microfabrication of Channels Inside Vitreous Silica Substrates

Abstract: We examined the physical chemistry underlying a wet chemical etching-assisted femtosecond laser microfabrication technique Close scrutiny of etching reagents and the etching process has led to further refinement of the method for practical use such as microchips for chemical total analysis systems (μ-TAS) Microchannels as long as a centimeter scale with less than 60 μm diameter (aspect ratio of ∼200) were fabricated inside vitreous silica substrates In this regard, we demonstrated that a concentrated aqueous solution of KOH is advantageous over commonly used aqueous HF because of least saturation behavior in elongating channel structures Resultant nearly twice as large the etching selectivity of KOH as that of HF allowed substantial penetration depths within the laser-modified volume while leaving the unmodified regions practically intact Furthermore, the mechanism of laser-modification that permits highly selective wet etching was investigated by photoluminescence and confocal Raman spectral measure

Multi-chamber system having compact installation set-up for an etching facility for semiconductor device manufacturing

Abstract: A multi-chamber system of an etching facility for manufacturing semiconductor devices occupies a minimum amount of floor space in a cleanroom by installing a plurality of processing chambers in multi-layers and in parallel along a transfer path situated between the processing chambers. The multi-layers number 2 to 5, and the transfer path can be rectangular in shape and need only be slightly wider than the diameter of a wafer. The total width of the multi-chamber system is the sum of the width of one processing chamber plus the width of the transfer path.

Gas sensing properties of single crystalline porous silicon nanowires

Abstract: We demonstrate that the porous silicon nanowires (SiNWs) prepared by metal-assisted chemical etching method could impart sensitivity of nanowire electrical properties to gaseous nitrogen oxide (NO) at room temperature, thus are suitable for sensing NO and air monitoring. Particularly, the sensors made from the porous SiNWs assembly showed fast response and excellent reversibility to subparts per million NO concentrations. The excellent sensing performance coupled with scalable synthesis of porous SiNWs could open up opportunities in scalable production of sensor chips working at room temperature.

Focus ring, plasma etching apparatus and plasma etching method

Abstract: In a plasma etching apparatus for performing a plasma etching on a surface of a substrate mounted on a susceptor in a processing vessel, a focus ring is installed to surround the substrate and has a first region at an inner side on a surface thereof, in which an average surface roughness is small such that a reaction product produced during an etching processing is not captured to be deposited, and a second region at an outer side from the first region, in which an average surface roughness is large such that a reaction product produced during the etching process is captured to be deposited. A boundary between the first and the second region is a part where an etching amount is relatively significantly changed compared to other parts while the focus ring is equipped in the plasma etching apparatus and the plasma etching is performed on the substrate.

Silicon-selective dry etch for carbon-containing films

Abstract: A method of etching silicon-and-carbon-containing material is described and includes a SiConi™ etch in combination with a flow of reactive oxygen. The reactive oxygen may be introduced before the SiConi™ etch reducing the carbon content in the near surface region and allowing the SiConi™ etch to proceed more rapidly. Alternatively, reactive oxygen may be introduced during the SiConi™ etch further improving the effective etch rate.

Effect of Catalyst Shape and Etchant Composition on Etching Direction in Metal-Assisted Chemical Etching of Silicon to Fabricate 3D Nanostructures

Abstract: Metal-assisted chemical etching (MaCE) of silicon in conjunction with shaped catalysts was used to fabricate 3D nanostructures such as sloping channels, cycloids, and spirals along with traditional vertical channels. The investigation used silver nanorods, nanodonuts along with electron beam lithography (EBL)-patterned gold nanodiscs, nanolines, squares, grids, and star-shaped catalysts to show how catalyst shape and line width directly influence etching direction. Feature sizes ranging from micrometers down to 25 nm were achieved with aspect ratios of at least 10:1 and wall roughness of 10 nm or less. This research demonstrates the potential of MaCE as a new, maskless nanofabrication technology.

Non-Close-Packed Crystals from Self-Assembled Polystyrene Spheres by Isotropic Plasma Etching: Adding Flexibility to Colloid Lithography

Abstract: Hexagonally ordered arrays of non-close-packed nanoscaled spherical polystyrene (PS) particles are prepared exhibiting precisely controlled diameters and interparticle distances. For this purpose, a newly developed isotropic plasma etching process is applied to extended monolayers of PS colloids (starting diameters <300 nm) deposited onto hydrophilic silicon. Accurate size, shape, and smoothness control of such particles is accomplished by etching at low temperatures (−150 °C) with small rates not usually available in standard reactive ion etching equipment. The applicability of such PS arrays as masks for subsequent pattern transfer is demonstrated by fabricating arrays of cylindrical nanopores into Si.

Plasma atomic layer etching using conventional plasma equipment

Abstract: The decrease in feature sizes in microelectronics fabrication will soon require plasma etching processes having atomic layer resolution. The basis of plasma atomic layer etching (PALE) is forming a layer of passivation that allows the underlying substrate material to be etched with lower activation energy than in the absence of the passivation. The subsequent removal of the passivation with carefully tailored activation energy then removes a single layer of the underlying material. If these goals are met, the process is self-limiting. A challenge of PALE is the high cost of specialized equipment and slow processing speed. In this work, results from a computational investigation of PALE will be discussed with the goal of demonstrating the potential of using conventional plasma etching equipment having acceptable processing speeds. Results will be discussed using inductively coupled and magnetically enhanced capacitively coupled plasmas in which nonsinusoidal waveforms are used to regulate ion energies to optimize the passivation and etch steps. This strategy may also enable the use of a single gas mixture, as opposed to changing gas mixtures between steps.

Plasma etching method, plasma etching device, and computer storage medium

Abstract: PROBLEM TO BE SOLVED: To provide a plasma etching method for plasma-etching an antireflection film (Si-ARC) containing silicon by a high etching rate and a sufficient selection ratio, while suppressing the damage (roughening) of an ArF photo resist, and also to provide a plasma etching device and a computer storage medium. SOLUTION: The plasma etching method is the method for etching the antireflection film 102, which is positioned in the lower layer of the ArF photo resist 103 and contains Si, by the plasma of processing gas with the ArF photo resist 103 formed on a substrate as a mask. As the processing gas, mixture gas containing CF based gas and/or CHF based gas, CF 3 I gas, and oxygen gas is used, and a DC voltage is applied to an upper electrode. COPYRIGHT: (C)2010,JPO&INPIT

Method for reducing line width roughness with plasma pre-etch treatment on photoresist

Abstract: A method for reducing line width roughness (LWR) of a feature in an etch layer below a patterned photoresist mask having mask features is provided. The method includes (a) non-etching plasma pre-etch treatment of the photoresist mask, and (b) etching of a feature in the etch layer through the pre-treated photoresist mask using an etching gas. The non-etching plasma pre-etch treatment includes (a1) providing a treatment gas containing H 2 and COS, (a2) forming a plasma from the treatment gas, and (a3) stopping the treatment gas.

Damascene write poles produced via full film plating

Abstract: A method for forming a write pole comprises forming a stop layer over a substrate layer of a wafer, the stop layer having an opening above a damascene trench in the substrate layer, and forming a buffer layer over the stop layer, the buffer layer having an opening above the opening of the stop layer. The method further comprises plating a layer of magnetic material over the wafer, disposing a first sacrificial material over a region of the magnetic material above the damascene trench, performing a milling or etching operation over the wafer to remove the magnetic material not covered by the first sacrificial material and to remove the first sacrificial material, disposing a second sacrificial material over the wafer, and performing a polishing operation over the wafer to remove the region of the magnetic material above the damascene trench, the second sacrificial material, and the buffer layer.

Simple approach to wafer-scale self-cleaning antireflective silicon surfaces.

Abstract: A simple approach to wafer-scale self-cleaning antireflective hierarchical silicon structures is demonstrated. By employing the KOH etching and silver catalytic etching, pyramidal hierarchical structures were generated on the crystalline silicon wafer, which exhibit strong antireflection and superhydrophobic properties after fluorination. Furthermore, a flexible superhydrophobic substrate was fabricated by transferring the hierarchical Si structure to the NOA 63 film with UV-assisted imprint lithography. This method is of potential application in optical, optoelectronic, and wettability control devices.