Showing papers on "Fabrication published in 1975"

Effect of Crystallizing the Grain‐Boundary Glass Phase on the High‐Temperature Strength of Hot‐Pressed Si3N4 Containing Y2O3

Abstract: The effects of fabrication variables on the high-temperature strength of hot-pressed Si3N4 containing 5 wt% Y2O3 were studied. Materials containing a crystalline grain-boundary phase, formed as a consequence of a high-temperature presintering heat treatment and identified as Si3N4·Y2O3, had high-temperature strengths significantly superior to those observed for materials containing a glass phase.

Method for making transistors

Abstract: Submicron plasma trimming of a patterened resist material is combined with ion implantation techniques to achieve submicron control of lateral doping profiles. This makes possible the high-yield fabrication of, for example, bipolar microwave transitors of the self-aligned-emitter type. The basic technique can also be supplied to the fabrication of high performance insulted-gate field-effect transistors, junction-gate field-effect transistors and Schottky-barrier field-effect transistors.

Electron emitter and method of fabrication

Abstract: Transmission mode negative electron affinity gallium arsenide (GaAs) photthodes and dynodes with a technique for the fabrication thereof, utilizing multilayers of GaAs and gallium aluminum arsenide (GaAlAs) wherein the GaAs layers serve as the emitting layer and as an intermediate construction layer, and the GaAlAs layers serve as a passivating window and as an etch stop layer.

Fabrication of silicon MOS devices using X-ray lithography

Abstract: This paper reports on the high-yield fabrication of silicon MOS transistors using X-ray lithography, measurements and annealing of fast surface states and oxide charges created by X-ray irradiation, and design considerations for submicrometer linewidth X-ray lithography on 7.5-cm diameter silicon wafers.

Hybrid integrated circuit including thick film resistors and thin film conductors and technique for fabrication thereof

Abstract: A technique for the fabrication of hybrid integrated circuitry combining the expedients of thick and thin film technology is described. A novel processing sequence for attaining ohmic contact between thick film resistors and thin film conductive metallization involves the use of an interphase gold tab as a conductive link.

Superconducting members and methods of manufacturing thereof

Abstract: A superconducting member is manufactured by mechanical fabrication to final dimensions of a matrix comprising a base material, such as niobium, an alloy essentially consisting of a carrier material and at least one element, such as tin, a metal for stabilization and a barrier material protecting the metal for stabilization. After mechanical fabrication a superconducting compound of the base material and the element is formed by heat treatment to cause a solid state reaction. The barrier material prevents diffusion of any of the components into the metal for stabilization.

Prospects for x‐ray fabrication of Si IC devices

Abstract: In this paper we report on low‐x‐ray‐attenuation Si vacuum windows for use with Al K x‐ray sources and the fabrication of 5.5‐cm‐diam Si‐membrane x‐ray masks without supporting ribs. Also discussed are exposure configurations for achieving multilevel pattern superposition on 7.5‐cm‐diam wafers.

Abstract: New x‐ray mask of Al–Al2O3 structure

Abstract: This paper describes the fabrication and performance of a newly developed x‐ray lithography mask consisting of an aluminum substrate and an Al2O3 film which was grown on the aluminum substrate by anodization. Transparent membranes of Al2O3 film were made by chemically etching parts of the aluminum substrate beneath the film on which gold absorber patterns were fabricated. Gold micropatterns were replicated successfully by Al Kα (8.34 A) x rays. Properties of this mask include ease of fabrication, transparency, feasibility of realignment by optical means, and high mechanical strength allowing the capability of larger window size.

Fabrication of submicron polysilicon lines by conventional techniques

Abstract: A new method of making fine geometry polysilicon lines has been developed. It requires no special apparatus or critical processing. Silicon gate MOST’s with dimensions of about 1 μm have been fabricated. Applications of the fine geometry MOST’s to the fabrication of high−packing−density MOSIC’s and high−frequency transistors are outlined.

Fabrication and performance of NbN thin film planar squids

Abstract: Planar SQUIDs with a Dayem bridge and two holes have been fabricated by sputter etching NbN thin films deposited epitaxially on MgO substrates and their performance has been tested in a conventional mode of operation at 15 MHz. It has been found that the devices operate with satisfactory reliability and their operating temperature covers over a wide range nearly from the superconducting transition temperature of the basic films e.g.∼15 K down to the pumped liquid helium temperature. The fabrication technique and the result of the performance test are presented, and the bridge characteristics and possible application of the device are discussed from a technical point of view.

Advances in superconducting quantum electronic microcircuit fabrication

Abstract: Standard microelectronic fabrication techniques have been utilized to produce batch quantities of superconducting quantum electronic devices and circuits. The overall goal is a fabrication technology yielding circuits that are rugged and stable and capable of being fabricated controllably and reproducibly in sizeable quantities. Our progress toward this goal is presented, with primary emphasis on the most recent work, which includes the use of electron-beam lithography and techniques of hybrid microelectronics. Several prototype microcircuits have been successfully fabricated. These microcircuits are formed in a thin-film parent material consisting of layers of superconducting and normal metals, and use proximity-effect structures as the active circuit elements.

Fabrication of amorphous bubble film devices

Abstract: The invention discloses a technique for fabricating an amorphous (i.e., non-crystalline) bubble device which enables high quality permalloy films for drive circuits and magneto-resistors to be deposited without destroying the magnetic properties of the amorphous film.

Application of integrated circuit technology to the fabrication of large numbers of niobium based Josephson junctions

Abstract: A batch fabrication technology is described for the production of small niobium based Josephson junctions. This technology uses thermally oxidized silicon wafers as substrates, allowing maximum usage of silicon integrated circuit techniques and equipment. Patterns are produced in rf sputtered niobium films by sputter etching through masks generated by "step and repeat" photolithographic techniques. Typically over 600 junctions are fabricated at one time. Measurements of voltampere curves, Josephson current versus magnetic field, and self resonant step structure were made.

The solid state electrochromic phenomenon and its applications to display devices

Abstract: The development of a solid state electro-chromic device for display applications is reported in this paper. The electro-chromic structure consists of a multilayer thin film system and therefore, successful fabrication of it requires optimization of each constituent layer with respect to various deposition parameters. We discuss the physical principle, the fabrication methods and operational characteristics of a typical system. Some of the other systems involving "super-ionic conductors" and impurity doped systems are also considered.

Fabrication of a charge-coupled device

Abstract: The fabrication of a charge-coupled device consists in forming an insulating layer in the form of a periodic series of insulating steps, in depositing a metallic layer on alternate steps so as to form electrodes, in implanting regions doped with a type opposite to the substrate into the surface of the semiconductor by directing an ion beam through the insulating steps of small thickness which are transparent to the beam, and in connecting each electrode to a control line.

Bubble circuit fabrication by electrodeposition

Abstract: Bubble domain memory chips with micron dimension patterns have been fabricated by additive electroplating through photoresist windows using the conductor first processing Etching defines the detector strips and removes the plating base The various fabrication steps are described and discussed The uniformity of the plated films is good and gives a reasonable yield Nonmagnetic underlayers were plated below the NiFe bars The gap width could be reduced by overplating the photoresist windows 4 kbit chips have been fabricated with the processes described