Showing papers on "Fabrication published in 1983"

1.0‐GHz thin‐film bulk acoustic wave resonators on GaAs

Abstract: This letter reports on a new fabrication technique and experimental results obtained on bulk acoustic wave resonators using thin piezoelectric composite films of A1N on GaAs insulating substrates. The fabrication involves only a wafer top side planar processing compatible with integrated circuit technology. Resonators have been made in the frequency range UHF to 1 GHz in order to demonstrate the fabrication technique and evaluate material performance in resonator devices. Both longitudinal and shear wave resonators have been measured with temperature coefficients of −24 and −26.5 ppm/°C, respectively. Shear wave results were obtained from tilted c‐axis films grown in a dc planar magnetron sputtering system.

Promise and challenge of thin-film silicon approaches to active matrices

Abstract: This paper reviews the state of the art of laser-annealed crystalline, amorphous, and small-grained polycrystalline Si thin-film transistor arrays built for the addressing of liquid-crystal displays. The fabrication and performance of these arrays are compared with each other and with the more traditional CdSe-type device arrays.

Method of making planar III-V compound device by ion implantation

Abstract: A planar process and new structure which leads to large scale integration capability by utilizing selective ion implantation into semi-insulating Gallium Arsenide substrates or any other compound semi-conducting material to yield isolated depletion enhancement mode JFETS and MESFETS, p-n junction and Schottky diodes, resistors and hot electron current limiters. The planar structure provides relatively simple integrated circuit fabrication which results in an increase of circuit device reliability and thereby improves not only the ease of fabrication but thereby increases yield of enhancement mode JFETS and MESFETS and other like devices in integrated circuit fabrication. In addition improved device structure is possible which increases device speed.

Fabrication of Grain-Oriented PbBi2Nb2O9

Abstract: This paper describes a process for the fabrication of grain-oriented PbBi2Nb2O9 ceramics. A molten salt technique was used to synthesize crystallites of PbBi2Nb2O9 with a high degree of shape anisotropy. Tape casting and subsequent uniaxial hot-pressing resulted in ceramics with grain orientation of >90% with densities >96% theoretical.

Method of making self-aligned high-frequency static induction transistor

Abstract: A gate-source structure and fabrication method for a surface-gate static induction transistor. The method requires only one masking step during fabrication, thereby eliminating or minimizing mask registration problems during fabrication of the devices. The method and the device are characterized by a two-step etching process which forms T-shaped gate windows in layers of poly-crystalline silicon with different doping levels. The source region is formed during an annealing step from the layer with high doping level. During the annealing step, the gate regions are also formed from gate impurities implanted previously in the gate windows. The source structure and the gate structure are separated by a silicon dioxide protective layer.

Preparation and properties of amorphous silicon produced by a consecutive, separated reaction chamber method

Abstract: A new fabrication apparatus was developed from the consecutive, separated reaction chamber method in order to fabricate the multi-gap amorphous solar cell. In this fabrication process, the different amorphous materials are deposited in different reaction chambers. It was confirmed by IMA measurement that the intermixing of different amorphous materials was clearly avoided. The space charge density (Ni) of the films, into which a slight amount of boron is doped in this method, was measured. The minimum Ni was about 2 × 1014 cm−3 at the gas ratio B2H6/SiH4 of 2 × 10−6. The best conversion efficiency of p-i-n amorphous solar cells fabricated by this method was 10.0%.

Method of fabrication of piezoelectric polymer transducers by forging

Abstract: In a method of fabrication of piezoelectric polymer transducers by forging, a preform is subjected to flattening by compression in order to produce a radial orientation of the molecular chains constituting the polymer with respect to the center of pressure.

Fabrication of optically enhanced thin film a‐SiHx solar cells

Abstract: Fabrication methods used to produce the first optically enhanced thin film solar cells are described. Optically enhanced 0.6–1 μm thick a‐SiHx solar cells have been fabricated which yield short circuit currents ∼3 mA/cm2 greater than comparable unenhanced cells. This respresents a ∼20% improvement in the short circuit current and is due to trapping of weakly adsorbed photons in the semiconductor that have been scattered by textured surfaces within the cell. Texturing of the cell must be such that light is efficiently scattered, and the roughness must not produce shorting of the front surface transparent conductor with the rear electrical contact. To produce the required texture, thin film solar cells are deposited on the surface of substrates patterned with microstructures created using a new lithographic method (natural lithography). Other considerations for fabrication of enhanced PIN a‐SiHx cells include (1) production of reflector geometrics which minimize parasitic optical absorption and (2) creation...

Submicron filament multistrand powder metallurgy processed Cu-Nb-Sn wire

Abstract: Submicron size ultrafine Cu-Nb-Sn superconducting wire has been fabricated by the powder metallurgy process simulating large scale industrial fabrication using the bundling technique. Starting copper and niobium powders ranged from 250 to 500 μm. Both external and tin core processed wires were fabricated with overall current densities of J_{c} \sim 2-3 \times 10^{4} A/cm2at 14 T, demonstrating that both particle size and billet can be scaled up to large scale fabrication.

The Optical Properties and Processing of Lithium Niobate Optical Waveguides

Abstract: The laser-power-handling properties of planar out-diffused and in-diffused lithium niobate waveguides are considered in terms of fabrication process characteristics. The percentage of laser induced power-loss is found to increase as the square of both the input-coupled laser power and the beam's transmission distance in the guide, regardless of the fabrication details. Titanium in-diffused waveguides are found not to exhibit laser-induced power-loss for beams proloaaatina along their z-axis.

New fabrication process for a-Si photovoltaic devices using cylindrical diode glow discharge

Abstract: New fabrication process for a-Si photovoltaic devices using cylindrical diode glow discharge system has been developed. The device parameters derived from measurements of the photovoltaic characteristics, interface properties and photocapacitance for a-Si nip junctions are discussed.

Phosphosilicate glass flow over aluminum in integrated circuit devices

Abstract: A method of planarizing multilevel metallization struc tures in the fabrication of integrated circuit devices is presented. Radiation from a tunable TEA-CO 2 laser, under select conditions, is found to flow a layer of phosphosilicate glass, as thin as 1 µm and with as low as 5 % wt phosphorus, over aluminum steps. The flow is accomplished without any evidence of alloying the aluminum to the underlying silicon or melting the aluminum at the glass-to-metal interfaces.

Development of New Techniques for Silicon Solar Cell Fabrication

Abstract: The aim of this project is the development of new techniques for silicon solar cell fabrication. Most emphasis has been put on the use of screen printing for junction formation, metallization and for the realization of the antireflection coating. Through process optimization and improved understanding of the front contact formation efficiencies exceeding 12% on single crystal, using the integral printing process, have been achieved. Solar cells made on single crystal silicon in small batch quantities (400 wafers), using the printing technique for junction formation and electrode deposition and a spin-on ARC, have mean efficiencies over 11% with good yields and reproducibility. It has been found that the glass frit is very critical for the optimization of the front electrode metallization as well as for the formation of a BSF. Cell processing that is optimized for single crystal silicon is not directly transferable to polycrystalline silicon materials. The initial surface preparation and the silver ink firing temperature were more critical for polycrystalline materials. A reduction in cell efficiency of about 2 to 3% is found when implementing the screen printing fabrication technique on polycrystalline materials. This loss factor is similar to that when other more conventional fabrication technologies are implemented on the same materials. Initial results on epitaxially deposited thin films on upgraded metalurgically grade silicon obtained with the screen printing technology are encouraging since efficiencies of 9% have been reached.

GaAs microwave devices and circuits with submicron electron-beam defined features

Abstract: This paper describes the fabrication and application of GaAs FET's, both as discrete microwave devices and as the key active components in monolithic microwave integrated circuits. The performance of these devices and circuits is discussed for frequencies ranging from 3 to 25 GHz. The crucial fabrication step is the formation of the submicron gate by electron-beam lithography.

The Influence of Thermal Silicon Nitride Formation on VLSI Fabrication

Abstract: Thinning of SiO2 film in a MOS FET gate and memory capacitor can rduce such adverse effects as a short channel effect, subthreshold current, CL-prticle disturbance, etc. An insulator having a dielectric constant higher than that of SiO2 provides the same benefits as does thinning the SiO2 film. From this viewpoint, the characteristics of thermal silicon nitride (SiN) film have been investigated with the hope of developing higherdensity Si VLSI.(l) There has been, however, no report of SiN formation influence on Si substrate characteristics after SiN removal. In the context of VLSI fabrication, we investigated this influence on effective electron mobility (,u f) of SiN-gate FET and on the dielectric treakdown (DB) of SiO2 grown after SiN removal (SiO2(SiN)). In addition, we studied B, P and Sb diffusion in Si during nitridat ion.

Surface acoustic wave device from eutectic deposit

Abstract: A method for the fabrication of surface acoustic wave devices by the selective removal of one of the phases of a metallic eutectic, solidified as a thin film having a lamellar morphology, forms a first spaced array of metallic elements. Removal is by line-heater or laser beam. This then provides a self-aligned structure for the formation of a second array of metallic elements interdigitated with the elements of the first array.

Fabrication of a high density storage medium for electron beam memory

Abstract: A new concept for archival electron beam memory is being investigated. The storage medium consists of a two dimensional array of columns supported by a thin, electron transparent, membrane. Information is written by melting selected columns with an electron beam. The increase in cross‐sectional area of the resulting droplets provides contrast for electron transmission readout. In this paper, we describe a fabrication process for this storage medium. Gold columns are electroplated into a resist mold defined by electron beam lithography. Proximity effects are controlled by membrane and trilevel resist techniques. Two dimensional arrays of gold columns with 50 nm diameter, 100 nm period and 3:1 aspect ratios have been fabricated on 250 nm thick polyimide membranes.

Stable performance Nb variable thickness microbridge type Josephson junctions: A reproducible fabrication technique

Abstract: A novel method of fabrication, as described in the following, was developed that ensures a good reproducibility of the junction. Namely, poly‐Si was deposited over a Si substrate whose surface had been previously thermally oxidized. The poly‐Si overlaid surface was then thermally oxidized. The bridge configuration of the junction was microprocessed by means of electron beam lithography. The fabricated configuration served as a mask in depositing the Nb layer on the substrate by means of rf sputtering to conclude the fabrication of a microbridge Josephson junction. The final process of the formation of the variable thickness microbridge configuration was readily carried out by placing another properly shaped mask over the masking bridge or by forming an SiO2 layer over the poly‐Si layer. The SiO2 layer was processed by selective plasma etching so that it would act as a mask over the bridge portion. The stabilization of the characteristics of the junction has been achieved due to the passivation which takes...

Amorphous-silicon FET array for LCD panel

Abstract: A small 20 × 20 dot matrix array of a FET has been fabricated on a glass substrate using a-Si films as the semiconductor and silicon nitride deposited from a N2-SiH4 mixture as the gate insulator. Good operation is obtained for both TN-mode and GH-mode in transparent-type LCDs. The improved fabrication process and structure are reported.