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Showing papers on "Fabrication published in 1987"


Journal ArticleDOI
TL;DR: In this article, a new process was proposed to make films of Y1Ba2Cu3O7 using coevaporation of Y, Cu, and BaF2 on SrTiO3 substrates.
Abstract: We report on a new process to make films of Y1Ba2Cu3O7 using coevaporation of Y, Cu, and BaF2 on SrTiO3 substrates. The films have high transition temperatures (up to 91 K for a full resistive transition), high critical current densities (106 A/cm2 at 81 K), and a reduced sensitivity to fabrication and environmental conditions. Because of the lower reactivity of the films, we have been able to pattern them in both the pre‐annealed and post‐annealed states using conventional positive photoresist technology.

411 citations


Journal ArticleDOI
TL;DR: In this article, a solution-doping technique for the reproducible fabrication of low-loss optical fibres containing up to 4000 parts in 106 rare-earth ions is described.
Abstract: A solution-doping technique is reported for the reproducible fabrication of low-loss optical fibres containing up to 4000 parts in 106 of rare-earth ions. The method produces excellent dopant uniformity and is sufficiently versatile to allow codoping with different ions.

382 citations


Journal ArticleDOI
TL;DR: In this paper, the authors report preliminary success in the fabrication of fine-wire, composite superconductors consisting of a high-conductivity normal metal shell such as Ag or Cu/Ni/Au and a superconducting core of Ba2YCu3O7 oxide.
Abstract: Commercially useful, bulk superconductors typically require stabilization using a normal metal cladding for reasons of electrical, thermal, and mechanical protection and, in general, need to be drawn into fine fibers and wound into a magnet configuration. The recent discovery of high‐TC superconductor materials such as Ba2YCu3O7 stimulated worldwide interest in the subject, however, with much concern about fabricability of such brittle ceramic materials into desirable fine wire geometry. In this letter, we report preliminary success in the fabrication of fine‐wire, composite superconductors consisting of a high‐conductivity normal metal shell such as Ag or Cu/Ni/Au and a superconducting core of Ba2YCu3O7 oxide. The wire is would into a coil, and then heat treated to produce the desired chemistry in a dense structure. The resistivity of the composite wire is measured to be zero at ≊90 K (in zero field) with a zero‐field critical density of ≊175 A/cm2. Microscopy and x‐ray analysis show that the superconduc...

255 citations


Journal ArticleDOI
TL;DR: In this paper, the Ba2YCu3O7−δ type superconductors were fabricated using three different processes, i.e., melt drawing, melt spinning, or preform-wire melting.
Abstract: Fabrication of high Tc ceramic superconductors by an oxide melting method in place of a conventional sintering method has been attempted. Using three different processes, i.e., melt drawing, melt spinning, or preform‐wire melting, it is demonstrated that the Ba2YCu3O7−δ type superconductors can successfully be fabricated into a desired geometry such as wire and ribbon. Tc’s for R=0 were about 92 K. The density of the melt‐processed compound was measured to be as high as 6.2 g/cm3, or ∼98% of the theoretical density 6.3 g/cm3 as compared to the value of 80–85% density for sintered samples. The increased density is likely to be responsible for the noted improvements in fracture resistance and in the Jc value of the melt‐processed compound.

97 citations


Journal ArticleDOI
TL;DR: In this paper, a novel fibercoupler fabrication system which automatically processes fusion and elongation is presented, and the fabrication yield and reliability of the present system have been much higher than those of the conventional method and the processing time for fabrication could also be reduced.
Abstract: A novel fiber-coupler fabrication system which automatically processes fusion and elongation is presented. Not only conventional single-mode fiber couplers but also polarization-maintaining fiber couplers with excellent characteristics such as excess losses less than 0.11 dB and coupling-ratio accuracy better than 1.3 percent were obtained. In addition, it was confirmed that polarization crosstalk for polarization-maintaining fiber couplers in the present system was lower than that for the conventional manual method. The fabrication yield and reliability of the present system have been much higher than those of the conventional method and the processing time for fabrication could also be reduced.

73 citations


Book
01 Jan 1987

70 citations


Patent
05 May 1987
TL;DR: In this paper, a fabrication process for providing an epitaxial layer on a silicon substrate and over predefined insulator-capped islands which forms a self-aligned contact window in the epitaxia layer is presented.
Abstract: A FABRICATION METHOD FOR FORMING A SELF-ALIGNEDCONTACT WINDOW AND CONNECTION IN AN EPITAXIAL LAYER AND DEVICE STRUCTURES EMPLOYING THE METHOD ABSTRACT OF THE DISCLOSURE A fabrication process for providing an epitaxial layer on a silicon substrate and over predefined insulator-capped islands which forms a self-aligned contact window in the epitaxial layer. Application of the method to a three-dimensional dynamic random access memory (DRAM) device structure is shown, with an access transistor formed in monocrystalline silicon stacked on top of a trench capacitor. A fabrication method therefor is shown wherein the contact window for the source-to-trench connection is formed by self-aligned lateral epitaxial growth, followed by a contact-connection formation step using either a second epitaxial growth or a CVD refill and strapping process. The invention can be further applied to other device structures using the described principles, and more specifically to an inverter structure having the driver device stacked over the load-resistor as another example, which can be used as a basic building circuit unit for logic circuits and static-RAM cell.

67 citations


Patent
13 Feb 1987
TL;DR: In this paper, the same authors proposed the synthesis of positively-doped hydrogenated amorphous silicon alloys useful in the fabrication of photovoltaic and other electronically active devices.
Abstract: Compounds having the formula (MX3)n M'X4-n wherein M and M' are different Group 4A atoms, at least one of M and M' is silicon, X is hydrogen, halogen or mixtures thereof, and n is an integer between 1 and 4, inclusive, are useful as deposition feedstock materials in the formation of hydrogenated amorphous silicon alloys useful in the fabrication of photovoltaic and other electronically active devices. Dopants having the formula (SiX3)m L X3-m wherein L is a Group 5A atom selected from the group of phosphorous, arsenic, antimony and bismuth, X is hydrogen, halogen or mixtures thereof and m is an integer between 1 and 3, inclusive, are useful in the fabrication of negatively-doped hydrogenated amorphous silicon alloys useful in the fabrication of photovoltaic and other electronically active devices. Dopants having the formula YJX2 wherein Y is halogen or carbonyl, J is a Group 3A atom and X is hydrogen, halogen or mixtures thereof, are useful in the formation of positively-doped hydrogenated amorphous silicon alloys useful in the fabrication of photovoltaic and other electronically active devices.

47 citations


Journal ArticleDOI
TL;DR: In this article, the fabrication and optical properties of Nd3+-doped silica-based optical fibres as a function of core glass composition are discussed and the absorption and fluorescence spectra are shown to be very dependent on P2O5 concentration.

47 citations


Journal ArticleDOI
TL;DR: In this article, the projection patterning of Al was demonstrated by laser activated metalorganic chemical vapor deposition (LACVD) technique, which is compatible with standard photolithographic patterning and shows promise for simplifying integrated circuit fabrication.
Abstract: We demonstrate the projection patterning of Al by laser activated metalorganic chemical vapor deposition. The laser activated deposition technique, which selects surface over gas phase reactions, is found to be compatible with standard photolithographic patterning and shows promise for simplifying integrated circuit fabrication. Two applications are highlighted: metal‐oxide field‐effect transistor metallization and Al interconnect fabrication.

40 citations


Patent
29 Jun 1987
TL;DR: In this article, a planar MOS device with coplanar top surfaces of the source, drain and gate electrodes and the overlying electrical contact structure is produced by a method of fabrication in which the gate is defined by forming an oxide mesa on a substrate, building up the substrate with semiconductor material around the mesa, and filling the resultant trough with doped polysilicon to form the self-aligned gate.
Abstract: An MOS device having a planar configuration in which the top surfaces of the source, drain and gate electrodes are coplanar, and the overlying electrical contact structure is also planar, is produced by a method of fabrication in which the gate is defined by forming an oxide mesa on a substrate, building up the substrate with semiconductor material around the mesa, removing the mesa, and filling the resultant trough with doped polysilicon to form the self-aligned gate. Line width and alignment control are enchanced. The planarity of the device and the improved dimensional control enable a reduction of device dimensions and consequently increased device density in integrated circuits.

Journal ArticleDOI
TL;DR: In this article, the stages in the construction of sensors implemented in thick film technology are described and specific examples of specific steps in the fabrication from layout to finished mask(s) are detailed.
Abstract: This paper describes the stages in the construction of sensors implemented in thick film technology. The use of CAD facilities greatly reduces the time required for development, and automatic design rule checking minimises errors. Steps in the fabrication from layout to finished mask(s) are detailed and specific examples given. Strain gauges using piezoresistive properties of thick film resistor inks with various sheet resistivities (Du Pont HS80 series) printed on insulated stainless steel substrates were examined under strains ranging from 0 to ±1000 microstrain. Results show gauge factors to be dependent on the ink's sheet resistivity and range from 2 to 12. The temperature coefficients of resistance were determined over temperatures of +20°C to +140°C, revealing good tracking and reproducibility.

Patent
05 Oct 1987
TL;DR: In this paper, a tab disposed on a corner portion of the pixel electrodes was used for the fabrication of thin film field effect transistors in active matrix liquid crystal display devices, which allowed the utilization of a wider range of gate and upper level metallization materials, particularly aluminum, whose etchants are otherwise found deleterious to pixel electrode material.
Abstract: A process for the fabrication of thin film field effect transistors in active matrix liquid crystal display devices includes the utilization of a protective, conductive tab disposed on a corner portion of the pixel electrodes. Electrical contact is made to the pixel electrodes not directly, but rather through a via opening in protective, insulative and amorphous silicon layers. The structure is particularly advantageous in that it permits the utilization of a wider range of gate and upper level metallization materials, particularly aluminum, whose etchants are otherwise found deleterious to pixel electrode material such as indium tin oxide. The structure of the present invention is seen to be readily fabricatable in accordance with high yield fabrication procedures.

Journal ArticleDOI
TL;DR: In this paper, the fabrication of single tap ring resonators made by thermal ion exchange in various types of glass substrates was reported, and the highest finesse achieved was 55 with an efficiency of 32 percent.
Abstract: We report the fabrication of single tap ring resonators made by thermal silver ion-exchange in various types of glass substrates. The highest finesse achieved was 55 with an efficiency of 32 percent. We systematically measured losses arising from different sources such as intrinsic absorption in the glass and scattering from side wall roughness arising from the mask fabrication technique. All data was measured at \lambda = 0.6328 \mu m.


Journal ArticleDOI
TL;DR: In this article, a new grating fabrication method for phase-shifted DFB LDs has been developed, which uses a phase-shift layer, exhibits very good reproducibility.
Abstract: A new grating fabrication method for phase-shifted DFB LDs has been developed. This method, which uses a phase-shift layer, exhibits very good reproducibility. The fabrication yield was almost 100%. A cw single-longitudinal-mode(SLM) operation as high as 42 mW was achieved for a 1.55 µm DFB-DC-PBH LD with a λ/8-shifted grating fabricated by this method.

Patent
04 May 1987
TL;DR: A multilayer optical coating for semiconductor substrates characterized in that it is etchable by conventional techniques used for fabrication of integrated circuits and has high reflectivity is described in this article.
Abstract: A multilayer optical coating for semiconductor substrates characterized in that it is etchable by conventional techniques used for fabrication of integrated circuits and has high reflectivity.

Proceedings ArticleDOI
19 Jan 1987
TL;DR: In this paper, birefringence value control in high-silica single-mode channel waveguides in fabrication of a polarization-insensitive guided-wave Mach-Zehnder interferometer as an optical-frequency-division multi/ demultiplexer is described.
Abstract: A combination of flame hydrolysis glass deposition and reactive ion etching has enabled the fabrication of fiber-compatible high-silica channel optical waveguides on silicon substrates.1 In many single-mode applications–optical interference systems, for example–birefringence characteristics of waveguides are the crucial factors affecting the stability and sensitivity of the system. This paper describes birefringence value control in high-silica single-mode channel waveguides in fabrication of a polarization-insensitive guided-wave Mach-Zehnder interferometer as an optical-frequency-division multi/ demultiplexer.2,3

Journal ArticleDOI
TL;DR: In this article, the first successful fabrication of bipolar transistors in low-temperature (T dep = 745°C) epitaxial silicon deposited by a chemical-vapor-deposition (CVD) technology was reported.
Abstract: In this letter we report for the first time the successful fabrication of bipolar transistors in low-temperature (T dep = 745°C) epitaxial silicon deposited by a chemical-vapor-deposition (CVD) technology. The epitaxial layers were deposited by an ultra-low-pressure CVD (U-LPCVD) technique utilizing an optimized in-situ predeposition argon sputter clean. The critical parameter during the sputter clean has been identified as the substrate bias. Bias voltages of -200 or -300 V create dislocations that form emitter-collector shunts during the bipolar transistor fabrication process; a bias voltage of -100 V, however, permits the deposition of essentially defect-free (<10 dislocations cm-2by defect etching) epitaxial films suitable for bipolar transistor fabrication.

Journal ArticleDOI
TL;DR: It is found that the fracture mechanism is preferred to plastic scratching for most applications and the mechanism for fine grinding using diamond tools is shown to depend on the properties of the glass, the acidity of the grinding fluid, as well as the chemical and mechanical properties.
Abstract: The mechanism for fine grinding using diamond tools is shown to depend on the properties of the glass, the acidity of the grinding fluid, as well as the chemical and mechanical properties of the abrasive bonding material. Knowledge of the mechanism is essential for the implementation of this technology for the deterministic fabrication of precision optical surfaces. We find that the fracture mechanism is preferred to plastic scratching for most applications.

Journal ArticleDOI
TL;DR: In this article, a new diffusion technique for the reliable fabrication of low loss Ti:LiNbO3 waveguides is reported, where the LiNb O3 sample is placed in a closed platinum crucible where the sample itself serves as an Li2O source to eliminate the appearance of unwanted surface waveguide.
Abstract: A new diffusion technique for the reliable fabrication of low loss Ti:LiNbO3 waveguides is reported. During diffusion, the LiNbO3 sample is placed in a closed platinum crucible where the sample itself serves as an Li2O source to eliminate the appearance of unwanted surface waveguides. The influence of the diffusion conditions (temperature, addition of water vapour) on the waveguide performance is discussed.

Journal ArticleDOI
TL;DR: In this paper, the authors describe the fabrication of 0.1 μm rings in modulation-doped GaAs using electron beam lithography and reactive ion etching, which can be used to study a variety of quantum conduction and electron scattering effects.
Abstract: Techniques have been developed to make silicon metal‐oxide‐semiconductor field‐effect transistor (MOSFETs) with minimum dimensions as small as 25 nm for fundamental electron transport studies. These devices have been used to study a variety of quantum conduction and electron scattering effects. At a given size scale, these quantum effects can be increased by replacing silicon in these devices with a high mobility, low electron mass semiconductor like GaAs. To make such devices, we have extended our technology to the fabrication of III–V semiconductor nanostructures. As an example of this, we describe the fabrication of 0.1 μm rings in modulation‐doped GaAs using electron beam lithography and reactive‐ion etching.

Journal ArticleDOI
TL;DR: In this paper, the feasibility of manufacturing production quantities of a fine filament conductor was assessed and the important conductor properties (critical current density, piece length, yield, and cost) were compared for the various approaches.
Abstract: The successful fabrication of a fine filament high current density NbTi superconductor can have a significant impact on the cost of the Superconducting Supercollider. Consequently, we have been exploring various approaches for fabricating this type of superconductor, in collaboration with several superconductor wire manufacturers. The techniques investigated include double conventional hot extrusion, large single stack conventional hot extrusion, and warm hydrostatic extrusion. The important conductor properties (critical current density, piece length, yield, and cost) will be compared for the various approaches. Finally, the feasibility of manufacturing production quantities of a fine filament conductor will be assessed.

Journal ArticleDOI
TL;DR: In this article, optical channel waveguides have been fabricated into integrated circuit lithography mask plates by silver-sodium ion exchange, which combines the advantages of Ag thin-film ion sources and the accurate and reliable patterning of chromium films on mask plates.
Abstract: Optical channel waveguides have been fabricated into integrated circuit lithography mask plates by silver‐sodium ion exchange. The process combines the advantages of Ag thin‐film ion sources and the accurate and reliable patterning of chromium films on mask plates. The process is potentially suitable for cheap mass production, since no lithography is needed during the actual waveguide fabrication. The tailoring of waveguide cross sections by modifying the electric field distribution inside the glass is also presented.

Patent
20 Apr 1987
TL;DR: In this article, a method for fabrication of quasi-monolithic microwave integrated circuits is presented, in which metals, oxides, and processes are selected to enable fabrication of the circuits by first producing many layers of metals and oxides in situ without removing the circuit from its environmental chamber.
Abstract: Method for fabrication of quasi-monolithic microwave integrated circuits in which metals, oxides, and processes are selected to enable fabrication of the circuits by first producing many layers of metals and oxides in situ without removing the circuit from its environmental chamber. This reduces inclusion of contaminating chemical films and particles between the desired layers. Circuit elements are then defined by processing of the layers by photolithography and other processes from the top of the circuit downward. Lumped and distributed capacitors, resistors, inductors, transmission lines, and contacts for active devices are monolithically defined, with a reduced number of process steps.

Journal ArticleDOI
TL;DR: In this article, the authors describe a recently developed technique used for the fabrication of small scale welded steel models with plate thickness as low as 0.6 mm while maintaining fabrication geometrical tolerances to scaled equivalents of those found in full scale fabrication and within the ranges dictated by relevant design guidance documents.
Abstract: This paper describes a recently developed technique used for the fabrication of small scale welded steel models. The extensive use of jigging has allowed stiffened cylindrical models to be manufactured with plate thickness as low as 0.6 mm while maintaining fabrication geometrical tolerances to scaled equivalents of those found in full scale fabrication and within the ranges dictated by relevant design guidance documents.These models have been successfully loaded to destruction, with their performance correlated against that of larger scale models and the results of advanced non-linear numerical techniques.

Patent
11 Jun 1987
TL;DR: In this paper, a fabrication technique for making various devices in which a type of glass is used as a surface protection layer is described, and the glass layers are put down by particle bombardment (generally sputtering or e-beam bombardment) of a phosphorus-containing silicate glass target.
Abstract: A fabrication technique is described for making various devices in which a type of glass is used as a surface protection layer. The glass layers are put down by particle bombardment (generally sputtering or e-beam bombardment) of a phosphorus-containing silicate glass target. Devices with such layers are also described. Such glass layers are highly advantageous as encapsulating material, diffusion barrier layers, etc., particularly for optical type devices and certain semiconductor devices. Particularly important is the preparation procedure for the glass target used in the bombardment process. The glass layers are moisture stable, act as excellent barriers against diffusion, and are usable up to quite high temperatures without cracking or peeling. The glass layers also provide long-term protection against atmosphere components including water vapor, oxygen, atmosphere pollution contaminants, etc.

Journal ArticleDOI
TL;DR: In this paper, the fabrication of active and passive integrated optic device structures based on poled polymer electro-optic buried channel waveguides is described and experimental results are presented, including phase modulators, directional couplers and Y-branch interferometers.
Abstract: We report initial experiments on the fabrication of active and passiveintegrated optic device structures based on poled polymer electro-optic buried channel waveguides. The process of channel waveguide definition and fabrication through electric field poling is described and experimental results are presented. The fabrication, theoretical performance modeling and experimental evaluation of several integrated optic device structures, including phase modulators, directional couplers and Y-branch interferometers, are also reported.