Showing papers on "Fabrication published in 2003"

Friction stir processing: a novel technique for fabrication of surface composite

Abstract: A novel surface modifying technique, friction stir processing (FSP), has been developed for fabrication of surface composite. Al–SiC surface composites with different volume fractions of particles were successfully fabricated. The thickness of the surface composite layer ranged from 50 to 200 μm. The SiC particles were uniformly distributed in the aluminum matrix. The surface composites have excellent bonding with the aluminum alloy substrate. The microhardness of the surface composite reinforced with 27vol.%SiC of 0.7 μm average particle size was ∼173 HV, almost double of the 5083Al alloy substrate (85 HV). The solid-state processing and very fine microstructure that results are also desirable for high performance surface composites.

Precision nano-fabrication and evaluation of a large area sinusoidal grid surface for a surface encoder

Abstract: This paper describes the fabrication of a large area sinusoidal grid surface, which is used as the measurement reference of a surface encoder for multi-axis position measurement. The profile of the grid surface is a superposition of sinusoidal waves in the X-direction and the Y-direction with spatial wavelengths of 100 μm and amplitudes of 100 nm. Diamond turning with a fast tool servo (FTS) was chosen as the fabrication method. The constructed FTS, which employs a piezoelectric tube actuator (PZT) to actuate the diamond tool and a capacitance probe as the feedback sensor, was confirmed to have a bandwidth of approximately 2.5 kHz and a tool displacement accuracy of several nanometers in the closed-loop mode. Experiments of fabricating the sinusoidal grid surface were performed on a commercially available precision diamond turning machine. An aluminum alloy workpiece was vacuum chucked on the spindle and the FTS was mounted on the X-slide. Efforts were made to position the tool tip to the center of the spindle (center-alignment) since it was verified that the center-alignment is important for the fabrication accuracy of the sinusoidal grid surface. An evaluation technique based on the two-dimensional (2D) discrete Fourier transform (DFT) of interference microscope images was also developed to evaluate the fabricated grid surface effectively. The fabrication result of a grid surface over an area of ∅ 150 mm has indicated the effectiveness of the fabrication system.

Fabrication of silica nanotube arrays from vertical silicon nanowire templates.

Abstract: A simple thermal oxidation-etching process was developed to translate vertical silicon nanowire arrays into silica nanotube arrays. The obtained nanotubes perfectly retain the orientation of original silicon nanowire arrays. The inner tube diameter ranges from 10 to 200 nm. High-temperature oxidation produces relative thick, rigid, and pinhole-free walls that are made of condensed silica. This method could be useful for fabrication of single nanotube sensors and nanofluidic systems.

Fabrication of sub-50-nm solid-state nanostructures on the basis of dip-pen nanolithography

Abstract: The fabrication of arrays of sub-50-nm gold dots and line structures with deliberately designed 12−100-nm gaps is reported. These structures were made by initially using dip-pen nanolithography to pattern the etch resist, 16-mercaptohexadecanoic acid, on Au/Ti/SiOx/Si substrates and then using wet-chemical etching to remove the exposed gold.

Fabrication and characterization of three-dimensional silicon tapers

Abstract: We present the fabrication of 3D adiabatically tapered structures, for efficient coupling from an optical fiber, or free-space, to a chip. These structures are fabricated integrally with optical waveguides in a silicon-on-insulator wafer. Fabrication involves writing a single grayscale mask in HEBS glass with a high-energy electron beam, ultra-violet grayscale lithography, and inductively coupled plasma etching. We also present the experimentally determined coupling efficiencies of the fabricated tapers using end-fire coupling. The design parameters of the tapered structures are based on electromagnetic simulations and are discussed in this paper.

Electron Beam Freeform Fabrication: A Rapid Metal Deposition Process

Abstract: Manufacturing of structural metal parts directly from computer aided design (CAD) data has been investigated by numerous researchers over the past decade. Researchers at NASA Langley REsearch Center are developing a new solid freeform fabrication process, electron beam freeform fabrication (EBF), as a rapid metal deposition process that works efficiently with a variety of weldable alloys. The EBF process introduces metal wire feedstock into a molten pool that is created and sustained using a focused electron beam in a vacuum environment. Thus far, this technique has been demonstrated on aluminum and titanium alloys of interest for aerospace structural applications nickel and ferrous based alloys are also planned. Deposits resulting from 2219 aluminum demonstrations have exhibited a range of grain morphologies depending upon the deposition parameters. These materials ave exhibited excellent tensile properties comparable to typical handbook data for wrought plate product after post-processing heat treatments. The EBF process is capable of bulk metal deposition at deposition rated in excess of 2500 cubic centimeters per hour (150 cubic inches per our) or finer detail at lower deposition rates, depending upon the desired application. This process offers the potential for rapidly adding structural details to simpler cast or forged structures rather than the conventional approach of machining large volumes of chips to produce a monolithic metallic structure. Selective addition of metal onto simpler blanks of material can have a significant effect on lead time reduction and lower material and machining costs.

Dielectric nanocomposites for integral thin film capacitors: materials design, fabrication and integration issues

Abstract: Nanocomposites of organically modified barium titanate (BTO) nanoparticles in an epoxy matrix have been synthesized and evaluated as dielectrics for the fabrication of integral thin film capacitor arrays. Organic modification of the polymer inorganic interface has been used as a design tool to control the cross link density of the polymeric matrix and the interfacial interactions. Impedance spectra generated with model networks has been employed to analyze the experimental data and to model the role of the ceramic core, interface and the polymer matrix in determining the dielectric behavior of the nanocomposites. Stealth decoupling capacitor arrays were fabricated employing BTO-Epoxy nanocomposite thin films as dielectric layer. Capacitor arrays were fabricated by patterning the top electrode in the glass/Al/BTO-epoxy/spl bsol/Al heterostructures employing a photolithographic process and their electrical performance characterized. The role of an organically modified interface in limiting the thermal diffusion of copper metal in the composite thin film has been investigated employing Rutherford backscattering spectroscopy.

Membrane 3D IC fabrication

Abstract: General purpose methods for the fabrication of 5 integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially forced from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multi-chip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D 1C fabrication.

Fabrication of micronozzles using low-temperature wafer-level bonding with SU-8

Abstract: This paper describes a method for fabricating micronozzles using low-temperature wafer-level adhesive bonding with SU-8. The influence of different parameters on the bonding of structured wafers has been investigated. The surface energies of bonded wafers are measured to be in the range of 0.42–0.56 J m−2, which are comparable to those of some directly bonded wafers. Converging–diverging nozzle structures with throat widths as small as 3.6 µm are formed in an SU-8 film bonded with another SU-8 intermediate layer to produce sealed micronozzles. A novel interconnection technique is developed to interface and test the micronozzles with a macroscopic fluid delivery system to demonstrate the feasibility of the fabrication process. Leakage test results show that this low-temperature wafer bonding process is a viable MEMS fabrication technique for microfluidic applications.

Nanometer-scale engineered structures, methods and apparatus for fabrication thereof, and applications to mask repair, enhancement, and fabrication

Abstract: Photomask repair and fabrication with use of direct-write nanolithography, including use of scanning probe microscopic tips for deposition of ink materials including solgel and metallic inks. Additive methods can be combined with substractive methods. Holes can be filled with nanostructures. Height of the nanostructure filling the hole can be controlled without losing control of the lateral dimensions of the nanostructure. Chrome-on-Glass masks can be used and fabricated, as well as more advanced masks including masks for nanoimprint nanolithography.

Evaluations and Considerations for Self-Assembled Monolayer Field-Effect Transistors

Abstract: We elucidate the key chemical and physical requirements necessary for the future successful design and fabrication of molecular field-effect devices. We show that the molecular assembly, device fabrication, and electrical measurements of reported self-assembled monolayer field-effect transistors (SAMFETs) cannot be reproduced. Carrier tunneling and device electrostatics place minimum molecular lengths of L > 2.5−3 nm and minimum gate dielectric thickness tdielectric ≲ L/1.5 for such devices. In conflict with reported SAMFET device characteristics, for the values of L and tdielectric in these structures, it is fundamentally impossible to either turn the devices off or to obtain a significant field-effect. Synthesis, assembly, and characterization of functionalized molecular systems and fabrication and characterization of appropriately scaled device structures may enable the successful preparation of a molecular field-effect transistor.

A Nanochannel Fabrication Technique without Nanolithography

Abstract: We have developed a new nanochannel fabrication technique using chemical-mechanical polishing (CMP) and thermal oxidation. With this technique, it is possible to control the width, length, and depth of the nanochannels without the need for nanolithography. The use of sacrificial SiO2 layers allows the fabrication of centimeter-long nanochannels. In addition, the fabrication process is CMOS compatible. We have successfully fabricated an array of extremely long and narrow nanochannels (i.e., 10 mm long, 25 nm wide, and 100 nm deep) with smooth inner surfaces.

Simple and Low Cost Fabrication of Thermally Stable Polymeric Multimode Waveguides using a UV-curable Epoxy

Abstract: Polymeric multimode waveguides were fabricated using a UV-curable epoxy based polymer (SU-8) as the core layer and Cyclotene as the cladding layer. Contact printing lithography was adopted for the fabrication as a simple and low cost process. The materials are thermally stable up to 200°C as evidenced by the little change in refractive index at the temperature under an atmospheric condition. The propagation loss of the multimode waveguide was 0.36 dB/cm at the wavelength of 830 nm. A micro-mirror was also fabricated by contact printing method with tilted exposure.

Thin film solar cell configuration and fabrication method

Abstract: A new photovoltaic device configuration based on an n-copper indium selenide absorber and a p-type window is disclosed. A fabrication method to produce this device on flexible or rigid substrates is described that reduces the number of cell components, avoids hazardous materials, simplifies the process steps and hence the costs for high volume solar cell manufacturing.

An integrated optical oxygen sensor fabricated using rapid-prototyping techniques

Abstract: This paper details the design and fabrication of an integrated optical biochemical sensor using a select oxygen-sensitive fluorescent dye, tris(2,2′-bipyridyl) dichlororuthenium(II) hexahydrate, combined with polymeric waveguides that are fabricated on a glass substrate. The sensor uses evanescent interaction of light confined within the waveguide with the dye that is immobilized on an SU-8 waveguide surface. Adhesion of the dye to the integrated waveguide surface is accomplished using a unique process of spin-coating/electrostatic layer-by-layer formation. The SU-8 waveguide was chemically modified to allow the deposition process. Exposure of the dye molecules to the analyte and subsequent chemical interaction is achieved by directly coupling the fluid channel to the integrated waveguide. The completed sensor was linear in the dissolved oxygen across a wide range of interest and had a sensitivity of 0.6 ppm. A unique fabrication aspect of this sensor is the inherent simplicity of the design, and the resulting rapidity of fabrication, while maintaining a high degree of functionality and flexibility.

Multi-stack silicon-direct wafer bonding for 3D MEMS manufacturing

Abstract: Multi-stack wafer bonding is one of the most promising fabrication techniques for creating three-dimensional (3D) microstructures. However, there are several bonding issues that have to be faced and overcome to build multilayered structures successfully. Among these are: (1) chemical residues on surfaces to be bonded originating from the fabrication processes prior to bonding; (2) increased stiffness due to multiple bonded wafers and/or thick wafers; (3) bonding tool effects; (4) defect propagation to other wafer-levels after high-temperature annealing cycles. The problems and the solutions presented here are readily applicable to any microelectromechanical systems project involving the fabrication of multi-stack structures of two or more wafers containing intricate geometries and large etched areas.

Microstructure fabrication and microsystem integration

Abstract: Fabrication of a microstructure device includes assembling a mold component and a mold body to form a device mold for the microstructure device. The microstructure device is cast from the device mold, then the mold component is removed from the microstructure device. The microstructure device is then released from the mold body.

Three-dimensional micro-channels in polymers: One-step fabrication

Abstract: We report on the femtosecond laser fabrication of micro-channels of sub-micrometer cross section recorded in polymethylmethacrylate (PMMA) films in a single processing step. Both axial lengths of an elliptical cross section smaller than 0.4 μm were achieved for a fabrication irradiance close to the dielectric breakdown of PMMA. Femtosecond pulsed irradiation was scanned along the three-dimensional (3D) patterns inside the film. Channels have a self-formed densified cladding and can be 3D stacked into any pre-designed pattern and can extend over a mm length. These features are prospective for micro-total analysis system (μ-TAS) chip fabrication, micro- or nano-fluidic studies, and photonic applications such as photonic crystals .

Multi-stack silicon-direct wafer bonding for 3D MEMS manufacturing

Abstract: Multi-stack wafer bonding is one of the most promising fabrication techniques for creating three-dimensional (3D) microstructures. However, there are several bonding issues that have to be faced and overcome to build multilayered structures successfully. Among these are: (1) chemical residues on surfaces to be bonded originating from the fabrication processes prior to bonding; (2) increased stiffness due to multiple bonded wafers and/or thick wafers; (3) bonding tool effects; (4) defect propagation to other wafer-levels after high-temperature annealing cycles. The problems and the solutions presented here are readily applicable to any microelectromechanical systems project involving the fabrication of multi-stack structures of two or more wafers containing intricate geometries and large etched areas.

Metal Transfer Printing and Its Application in Organic Field‐Effect Transistor Fabrication

Abstract: The fabrication of multilayer microstructures, for example for organic field-effect transistors, using metal transfer printing (MTP) is demonstrated. The Figure shows a two-layer gold structure produced by MTP. Since MTP is a purely additive technique, in which mechanical adhesion acts as the patterning driving force, it is considered an attractive approach to reel-to-reel processing.

Mems fabrication

Abstract: This summary of selected microelectromechanical systems (MEMS) processes guides the reader through a wide variety of fabrication techniques used to make micromechanical structures. Process flows include wet bulk etching and wafer bonding, surface micromachining, deep trench silicon micromachining, CMOS MEMS, and micromolding.