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Showing papers on "Fast packet switching published in 1985"


Patent
18 Apr 1985
TL;DR: In this article, an integrated packet switching and circuit switching system comprising a number of switching modules (1000) each connected to a different plurality of user terminals (1001) is described.
Abstract: An integrated packet switching and circuit switching system comprising a number of switching modules (1000) each connected to a different plurality of user terminals (1001). Each switching module includes a time-slot interchange unit (1011) for providing circuit-switched communication channels and a control unit (1017) that controls the operation of the time-slot interchange unit. Each switching module also includes a packet switching unit (1400) used both to provide packet-switched communication channels among the user terminals connected to that switching module, and to switch control information between the user terminals (1001) and the control unit (1017) to establish circuit-switched calls and packet-switched calls.

92 citations


Patent
21 Nov 1985
TL;DR: In this paper, a multi-stage packet switching network comprising a plurality of packet switch nodes for communicating broadcast and non-broadcast packets each comprising stage identification information and sets of routing information is considered.
Abstract: A multi-stage packet switching network comprising a plurality of packet switch nodes for communicating broadcast and non-broadcast packets each comprising stage identification information and sets of routing information. Each node responsive to receipt of one of the packets for decoding the stage identification information to determine if the packet is a broadcast or a non-broadcast packet. If a broadcast packet has been received, the switch node transmits this packet to the next sequential stage on all output links interconnecting the switch node to the next sequential stage. If the packet is of the non-broadcast type, the switch node decodes the stage identification field to determine which of the sets of the routing information is to be used for routing the non-broadcast packet to the next sequential stage. Before routing the non-broadcast packet to the next sequential stage, the switch node increments the stage identification field. The switch node contains the necessary circuits for performing the incrementing of the stage identification field of a non-broadcast packet and for bypassing the adder circuit for a non-stage identification information portions of the packet and for bypassing the adder circuit for stage indentification field of the broadcast packet.

68 citations


Patent
25 Nov 1985
TL;DR: In this paper, a packet handler analyzes the header of each incoming packet from the correspondent circuit and decides the outgoing route of the packet, then sends out to an outgoing circuit of the decided route, the rest of it including the data field not being stored in the switching system, through a conventional cross-point switch for circuit-switching.
Abstract: In a packet switching system of the present invention, a packet handler is facilitated for each incoming circuit to the switching system. The packet handler analyzes the header of each incoming packet from the correspondent circuit and decides the outgoing route of the packet. The packet is then sent out to an outgoing circuit of the decided route, the rest of it including the data field not being stored in the switching system, through a conventional cross-point switch for circuit-switching. Thus, elimination of storing the whole packet raises the efficiency of packet processing and shortens the processing delay. The use of a cross-point switch enables the functional sharing of the system by circuit-switched calls and packet-switched calls.

54 citations


Patent
18 Apr 1985
TL;DR: An integrated packet switching and circuit switching comprising a number of switching modules (1000) each connected to a corresponding plurality of user terminals (1002) is described in this paper, where each switching module includes a time slot interchange unit (1011) for providing circuit-switched communication channels and a control unit that controls the operation of the time-slot interchange unit.
Abstract: An integrated packet switching and circuit switching comprising a number of switching modules (1000) each connected to a corresponding plurality of user terminals (1002). Each switching module includes a time-slot interchange unit (1011) for providing circuit-switched communication channels and a control unit (1017) that controls the operation of the time-slot interchange unit. Each switching module also includes a packet switching unit (1400) used both to provide packet-switched communication channels among the user terminals connected to that switching module, and to switch control information between the user terminals and the control unit to establish circuit-switched calls and packet-switched calls. A time-multiplexed switch (10) interconnects the switching modules to provide circuit-switched communication channels and packet-switched communication channels between user terminals of different switching modules.

52 citations


Patent
12 Nov 1985
TL;DR: In this paper, a self-routing packet switching network (100) is defined, in which packets are communicated through stages of the network in response to self-contained addresses (Fig. 2) and in which a packet is discarded if a packet cannot be transferred to a subsequent stage within a predefined amount of time.
Abstract: A self-routing packet switching network (100) in which packets are communicated through stages of the network in response to self-contained addresses (Fig. 2) and in which a packet is discarded if a packet cannot be transferred to a subsequent stage of the network within a predefined amount of time. In addition, upon a packet being discarded, a maintenance message is transmitted over a maintenance channel (140) to the processor (149) controlling the network. Each network comprises stages of switching nodes which are responsive to the physical address in a packet to communicate the packet to a designated subsequent node (100-15). The nodes provide for variable packet buffering, packet address rotation techniques, and inter-node and intra-node signaling protocols. Each node comprises a timer (531) which commences timing for a predefined amount of time upon receipt of a packet. If the timer times out, the packet is discarded and a maintenance message is transmitted to the processor controlling the network. The maintenance message includes the physical address plus an address identifying the network entry point of the packet. By discarding packets after a predefined amount of time, the problem of a self-routing network locking up is avoided when one switching node within the network fails or is experiencing overload traffic conditions.

47 citations


Journal ArticleDOI
TL;DR: This work considers a system of two users of slotted CSMA-CD (carrier-sense multiple-access with collision detection) who are assumed to have independent identical packet arrival streams, the identical randomizing policy for retransmission, and an infinite capacity for storing queued packets.
Abstract: We consider a system of two users of slotted CSMA-CD (carrier-sense multiple-access with collision detection). The two users are assumed to have independent identical packet arrival streams, the identical randomizing policy for retransmission, and an infinite capacity for storing queued packets. The mean packet delay (including the queueing and retransmission delays) is derived explicitly.

46 citations


Patent
20 Jun 1985
TL;DR: In this article, the seizure of an outgoing channel is made by scanning and searching a free channel in the bundle, which is the same as the seizure in this paper, but is different in the sense that each packet has inserted in an address field a sequence of addresses respectively assigned to the successive switching network.
Abstract: Multiservice packet telecommunication network in which each packet has inserted in an address field thereof a sequence of addresses respectively assigned to the successive switching network included in a route from a packet sender station to a packet receiver station and defining in these networks groups or bundles of outgoing channels. In each bundle the seizure of an outgoing channel is made by scanning and searching a free channel in the bundle.

38 citations


Patent
Yukitsuna Furuya1
03 Apr 1985
TL;DR: In this article, a packet detection circuit detects the arrival of a first periodical packet and predicts the time of arrival of the next packet for reserving the transmission path at the predicted time.
Abstract: A multiaccess packet transmission system for transmitting both bursty and periodical packets. A packet detection circuit detects the arrival of a first periodical packet and predicts the time of arrival of the next periodical packet for reserving the transmission path at the predicted time. Bursty packets are transmitted only when the transmission path is idle and not reserved.

31 citations


Journal ArticleDOI
TL;DR: In this paper, the authors present a distributed approach, in which intelligent store-and-forward packet switches are to be installed at various locations on the cable, and the analysis emphasizes three main criteria: the maximum traffic flow, the throughput of each switch and the average message delay.
Abstract: Most of tile present approaches to two-way interactive CATV focus on the centralized approach, in which all traffic must travel to the CATV head end. In this paper, we present a distributed approach, in which intelligent store-and-forward packet switches are to be installed at various locations on the cable. The analysis emphasizes three main criteria: the maximum traffic flow on the cable, the throughput of each switch, and the average message delay. Two possible schemes are compared. In one, the switches appear on the main trunk only. In the second, switches are used at branch locations as well.

30 citations


Journal ArticleDOI
TL;DR: A simple algorithm for the control of rearrangeable switching networks u(n, n, r) is given that makes it possible to compute the switch settings that implement a given Permutation.
Abstract: A simple algorithm for the control of rearrangeable switching networks u(n, n, r) is given. This algorithm makes it possible to compute the switch settings that implement a given Permutation. The algorithm takes serial time O(nr^{2}) and consists of one phase, i.e., it does not require iterations. The version of the algorithm which can be used for group switching is also presented.

30 citations


Patent
08 Nov 1985
TL;DR: In this paper, a packet memory assembly (GMP) is used to store the packet in memory once reception starts and despatches it to the outgoing circuit assemblies once reception ends.
Abstract: In this switch, the incoming packet is received by incoming circuit assemblies (GCE) and transmitted to packet memory assemblies (GMP) permitting the storing of the packet in memory once reception starts, the analysis of the header of the said packet during reception, and the despatching of its characteristics to the outgoing circuit assemblies (GCS) once reception ends. The despatching of the packet over an outgoing circuit (CS) is done through a three space-domain stage (SSS) packet transfer network (RTP), once the despatching of the previous packet has ended, the route within the packet transfer network being connected up before the end of the previous packet. The invention applies in particular to automatic packet switches for multi-service networks including visual communication.

Journal ArticleDOI
TL;DR: The performance avaluation of some channel access protocols for a Mobile Packet Radio Network link, which is a typical example of a degraded packet radio channel, is descirbed.
Abstract: MUCH WORK HAS been done in the areas of packet switching, packet radio, and random communication channels. However, efforts combining these areas are not as plentiful. There are several reasons for this. One reason is, the packet communications area is relatively young. Much of the research into packet communications has been accomplished by computer scientists rather then communications engineers, with a resulting emphasis on architecture, protocols, software, and so on. Even the development of packet radio has not fostered extensive examination of link effects on system performances. The UHF line-of-sight links and SHF satellite links have been assumed to be perfect with packet collisions as the dominant error source, which is a good assumption under normal circumstances. However, abnormal circumstances including ionospheric scintillations and multipath fading are another source of error on degraded packet radio links, which characterize Mobile Packet Radio Networks (MPRNET). In this paper we define and discuss Mobile Packet Radio Networks and presend their channel characteristics. The performance avaluation of some channel access protocols for a Mobile Packet Radio Network link, which is a typical example of a degraded packet radio channel, is descirbed.

Journal ArticleDOI
Kumar1, Dias, Jump
TL;DR: This correspondence investigates some methods for improving the performance of single-stage shuffle-exchange networks in a packet communication environment where the modules in a computer system communicate by sending fixed size packets.
Abstract: This correspondence investigates some methods for improving the performance of single-stage shuffle-exchange networks (SSN's) in a packet communication environment where the modules in a computer system communicate by sending fixed size packets. The three new switching strategies proposed use extra buffers to enhance performance, while preventing deadlocks. An intuitive criterion for determining the applicability of approximate analysis techniques is discussed.


Patent
20 Sep 1985
TL;DR: In this article, the authors propose to suppress an abolition rate to a prescribed value or below by transmitting a voice packet only added with header information, calculating the abolition rate of each packet at each prescribed time and controlling the recovery queue time of a received packet variably.
Abstract: PURPOSE: To set properly and simply a minimum recovery queue time suppressing an abolition rate to a prescribed value or below by transmitting a voice packet only added with header information, calculating the abolition rate of each packet at each prescribed time and controlling the recovery queue time of a received packet variably. CONSTITUTION: A voice/silence discrimination section 16 discriminates whether a voice packet generated by a packet composing section 14 from an input voice is a voice packet or a silence packet and a packet transmission control section 15 sends only the voice packet according to the result of discrimination. A packet reception section 2 stores the reception packet by a transmission control section 21 to a buffer memory 22 once, and it is extracted by a packet decomposing section 23 after a prescribed waiting time elapses and the result is decoded by a decoder 24 and the voice is outputted from a D/A converter 25 via a voice output section 26. Then a packet abolition rate discrimination section 27 inputs header information and calculates the abolition rate of the transmission packet at each prescribed time. COPYRIGHT: (C)1987,JPO&Japio




Patent
31 Oct 1985
TL;DR: In this article, the authors propose to generate a routing table by selectively suppressing to the minimum an inter-network passing delay of a traffic and the system evading traffic load rapid increase, as a mechanical generating means depending on the urgency/priority.
Abstract: PURPOSE: To generate a routing table by using selectively two procedures of the system suppressing to the minimum an inter-network passing delay of a traffic and the system evading traffic load rapid increase, as a mechanical generating means depending on the urgency/priority. CONSTITUTION: In case of the inter-network delay minimum procedure, a master node Q0 sends a routing set packet P01/P02 in multiple address to adjacent node Q1/Q2. In the nodes Q1, Q2, the reception packet is transferred to the next stage in terms of multiple address as P13/P14 and P23/P24 respectively. When the packet P13 is selected, a negative relay N32 is returned to the packet P23 arrived later and the packet P23 is abolished. A node Q6 receiving a packet P46 generated after the packet P14 returns an affirmative response A64 instantly because no transmission path exists. In a node Q4, P45/P43 is sent in multiple address in addition to above, receives a reply N54/N34 and returns an affirmative reply A41 as the own reply. The procedures above are repeated recursively. COPYRIGHT: (C)1987,JPO&Japio

Journal ArticleDOI
01 Sep 1985
TL;DR: The key to this control is a new network transport scheme called alpha transport, which combines the TDM circuit switching concept and packet switching technology and is robust, enables high utilization of the subnets bandwidth, reduces the subnet delay, and provides fairness.
Abstract: The control of the resources of a packet switching network is a very difficult problem to solve.1 Past attempts to solve this problem have been handicapped primarily by lack of an adequate means to quantify the user demands and then assign distributed resources to the demands in a globally coherent way.This paper presents a new approach to control the resources of packet switching networks. The key to this control is a new network transport scheme called alpha transport. Alpha transport combines the TDM circuit switching concept and packet switching technology. It is easy to implement and particularly cost effective to carry the subnet traffic of meshed packet switching networks. Alpha transport is robust, enables high utilization of the subnet bandwidth, reduces the subnet delay, and provides fairness.

Patent
Pohl Siegfried1
12 Aug 1985
TL;DR: In this article, the authors present a circuit arrangement for telecommunication exchanges, in particular telephone exchanges, with centralized and decentralized information processing switching devices, which have a limited capability with regard to the information processing capacity, and with a centralized switching matrix (K), and with decentralized line trunk groups (LTG), to which in each case a decentralized switching device is assigned, and to which subscriber lines, connecting lines, and connection-individual switching facilities, for examples connector sets and selection receiving facilities, are connected, and conduct an exchange of data, for example of selection information and control and setting
Abstract: 1. Circuit arrangement for telecommunication exchanges, in particular telephone exchanges, with centralized and decentralized information-processing switching devices, which have a limited capability with regard to the information-processing capacity, and with a centralized switching matrix (K), and with decentralized line trunk groups (LTG), to which in each case a decentralized switching device is assigned, and to which subscriber lines, connecting lines, for example local and long-distance junction lines, and connection-individual switching facilities, for examples connector sets and selection receiving facilities, are connected, and which conduct an exchange of data, for example of selection information and control and setting information, with the central switching device, this exchange serving the execution of the individual switching operations, and with measuring facilities for determining when there is a discrepancy between the acute information-processing workload of a centralized switching device and its capability, in particular for detecting information-processing traffic overloads and for averting such overloads, and with rejection facilities which are assigned to the decentralized line trunk groups and in which the quantity of information-processing orders occurring is reduced by a certain percentage of these orders being rejected, and with transfer switching means for the signalling of data on the discrepancy between the acute information-processing workload and the capability of a centralized switching device to the decentralized switching devices, in which the percentage is stored and in which memory switching means, provided for the storage of this percentage, reduce or increase the stored percentage step by step whenever data signalling an increase or decrease arrive, the data serving to signal the increase or decrease of this percentage being transferred from the centralized switching device to the decentralized switching devies and in the latter to the memory switching means, together with the data transferring the execution of the switching operations from the centralized switching device to the decentralized switching devices, in particular the setting and control information, characterized in that the data serving to signal the changing of the percentage and to transfer in each case from the centralized switching device to a decentralized switching device are passed on when connections are established via the switching matrix (K) and via two of the connection-individual switching facilities, which are connected to various line trunk groups, together with switching identifier information, in particular transit information, to be transferred connection-individually and from connection-individual switching facility to connection-individual switching facility and, thereby transmitted from the decentralized switching device just mentioned to the other decentralized switching devices.

Patent
01 Nov 1985
TL;DR: In this article, an error control range designation area is provided to a header of a packet data, formed by a packet header, a data 202 and a frame check sequence (FCS) 203 or the like, and the level of the area 204 is formed as '0' when the object range of error control is for all bits of the data 10 and '1' when for the head part 201 only.
Abstract: PURPOSE: To attain the free setting of an error control range optimum depending on the packet kind by providing information designating the object range of an error control at each packet so as to encode or decode only corresponding information. CONSTITUTION: An error control range designation area 204 is provided to a header 201 of a packet data 10 formed by a packet header 201, a data 202 and a frame check sequence (FCS) 203 or the like and the level of the area 204 is formed as '0' when the object range of error control is for all bits of the data 10 and '1' when for the head part 201 only. In response to the information of the area 204, an encoding range designation and encoding data share circuit 11 share only the object part of the error control of the data 10 to an encoding circuit 12. The share to a decoding circuit after the read is executed similarly, and only the header of, e.g., voice is in the error control range so as to set freely the error control range depending on the packet kind thereby applying high speed transmission and processing of various packets. COPYRIGHT: (C)1987,JPO&Japio

Journal ArticleDOI
TL;DR: The main purpose of the packet arrival rate control is to reduce the input of new packets to the node's queue when its length grows, and when the queue length decreases below assumed threshold, is to remove respective restrictions.
Abstract: A flow control method in virtual circuit-oriented packet-switched computer communication network is proposed. In a single packet switch a finite number of packet buffers, shared between several output queues, packet arrival rates and lengths of each individual queues to outgoing routes are dynamically restricted, depending upon the queue length and actual packet arrival rate. The main purpose of the packet arrival rate control is to reduce the input of new packets to the node's queue when its length grows, and when the queue length decreases below assumed threshold, is to remove respective restrictions. A simple queueing model is applied to analyze the proposed flow control scheme. To examine some performance tradeoffs of packet switch, simulation program has been elaborated.

Patent
28 Jan 1985
TL;DR: In this article, the authors propose to suppress rapid increases in traffic in a network at generation of restart by adding a list of numbers of an exchange node device in which opposite terminal devices are accommodated in a terminal communication state display table and adding a function generating a packet as a lumped packet.
Abstract: PURPOSE: To suppress rapid increases in traffic in a network at generation of restart by adding a list of numbers of an exchange node device in which opposite terminal devices are accommodated in a terminal communication state display table and adding a function generating a packet as a lumped packet. CONSTITUTION: When a packet transmission control section 2 in an exchange node device 1a detects that a restart packet 11 is received from a restart logical channel 8 of a packet form terminal device 7, a lumped packet processing section 16 is started. The lumped packet processing section 16 refers to numerical information of an information storage section 17 added to a terminal communication state display table 3 to generate a lumped packet 18 having numbers of opposite terminal devices 10a, 10b as in-packet information to an exchange node device 1b accommodating the opposite terminal device and the lumped packet 18 having numbers of opposite terminal devices 10c, 10d as the in-packet information to the exchange node device 1b accommodating the opposite terminal device. Then a packet relay control section 4 selects a packet transmission line 6 by using a destination exchange node number and transmits the data through the line. COPYRIGHT: (C)1986,JPO&Japio

Patent
18 Sep 1985
TL;DR: In this article, the authors propose an extension of the Invention Packet Switching (IPSW) protocol to DIGITAL TELECOMMUNICATIONS NETWORKS.
Abstract: RESPECT THE INVENTION PACKET SWITCHING NETWORKS. A NETWORK SWITCH INCLUDES ALL LEVELS WITH MANY PAIRS OF KNOTS SWITCHING 202-0, 202-2, ... WITH LINK 220-0 INTERNAL BETWEEN EACH PAIR OF KNOTS. ON THE BASIS OF THE INFORMATION CONTAINED IN EACH OF DESTINATION PACKAGE TOURS CONTROL FORWARD EVERY PACKAGE TO ITS DESTINATION USING ANY LINK 203-0 INTER-FLOOR OR INTERNAL LINK BETWEEN KNOTS 220-0 ACCORDING TO AVAILABILITY BONDS AND THE APPOINTMENT MADE BY A CIRCUIT USING A GENERATOR RANDOM NUMBER. APPLICATION TO DIGITAL TELECOMMUNICATIONS NETWORKS.

Proceedings ArticleDOI
R. Kung1
01 Oct 1985
TL;DR: In this paper, an exact expression for the optimum packet size is derived that depends only on the amount of packet overhead and the net bit error rate of the channel.
Abstract: A large community of bursty users can share a small number of satellite channels by employing a highly disciplined demand assignment multiple access (DAMA) protocol. One candidate DAMA design under consideration by the Air Force uses packet-switching techniques originally developed for large computer networks. This "packet-DAMA" approach divides the satellite time into periodic structures called frames. Within each frame are a control subframe and an information subframe. In this paper, an exact expression for the optimum packet size is derived. This optimum packet size depends only on the amount of packet overhead and the net bit error rate (BER) of the channel. Since BER can be estimated by decoders in many instances, this suggests the possibility of dynamic packet size determination. Also addressed in this paper is the penalty for using suboptimum packets. This issue is unique to packet-DAMA, where the frame structure may prevent the use of optimum packets.

Book ChapterDOI
01 Jan 1985
TL;DR: This paper presents a model of the telecommunication network for the problem formulated above and then proposes an algorithm of optimal control of packet flow in the network.
Abstract: The flow of packets in the network is a discrete process, because each packet is treated separately by all the elements of network. Therefore it seems that future development of methods of the packet routing in the telecommunication networks is connected with the analyse of such a flow that gives us information about every packet in the network. In this paper we present model of the telecommunication network for the problem formulated above and then we propose an algorithm of optimal control of packet flow in the network.

DOI
01 Jun 1985
TL;DR: A queueing model of a semiclosed network is developed, which includes blocking models for the flow-control mechanisms and still retains a product form for the equilibrium distribution.
Abstract: A packet-switching network with both end-to-end and local flow-control mechanisms is considered. End-to-end control is accomplished by window flow control and local control by using buffer management schemes between the input and transit traffic at the nodes. A queueing model of a semiclosed network is developed, which includes blocking models for the flow-control mechanisms and still retains a product form for the equilibrium distribution. Analytical expressions for network-performance measures are given and the effects of different buffer management schemes on these measures is studied using numerical techniques.

Patent
18 Sep 1985
TL;DR: A NETWORK SWITCHING SELF connects multiple DELIVERY CONTROLLER INTERFACE 207-0, 208-1, for the TRANSMISSION of TRANSMITTED INFORMATION PACKET and CIRCUIT, with multiple PATHS NETWORK.
Abstract: THE INVENTION RESPECT FOR SWITCHING SYSTEMS IN TELECOMMUNICATIONS. A NETWORK SWITCHING SELF connects multiple DELIVERY CONTROLLER INTERFACE 207-0, 208-1, FOR THE TRANSMISSION OF TRANSMITTED INFORMATION PACKET AND CIRCUIT, WITH MULTIPLE PATHS NETWORK. SAME STAGE OF INCLUDES NODE SWITCHING 102-0, 102-4 GROUPS THAT ARE IN PAIRS. THE FLOORS ARE CONNECTED BY LINKS 203-0 AND EACH PAIR OF KNOTS SWITCHING USING THE LINK TOGETHER EVEN INPUT 202-0, 202-2, 202-4 ... FROM PREVIOUS STAGE. APPLICATION TO NETWORKS MIXED PACKET AND CIRCUIT.