Showing papers on "Fast packet switching published in 1988"

Resource allocation for broadband networks

Abstract: The major benefit of a broadband integrated ATM (asynchronous transfer mode) network is flexible and efficient allocation of communications bandwidth for communications services. However, methods are needed for evaluating congestion for integrated traffic. The author suggests evaluating congestion at different levels, namely the packet level, the burst level, and the call level. Congestion is measured by the probabilities of packet blocking, burst blocking, and call blocking. He outlines the methodologies for comparing these blocking probabilities. The author uses the congestion measures for a multilayer bandwidth-allocation algorithm, emulating some function of virtual circuit setup, fast circuit switching, and fast packet switching at these levels. The analysis also sheds insight on traffic engineering issues such as appropriate link load, traffic integration, trunk group and switch sizing, and bandwidth reservation criteria for two bursty services. >

Design of a broadcast packet switching network

Abstract: An overview is given of a system designed to handle a heterogeneous and dynamically changing mix of applications. It is based on fiber-optic transmission systems and high-performance packet switching and can handle applications ranging from low-speed data to voice to full-rate video. A novel feature is a flexible multipoint connection capability suitable for broadcast and conferencing applications. The architecture of a switching systems that can be used to support this network is described. >

Nonblocking copy networks for multicast packet switching

Abstract: In addition to handling point-to-point connections, a broadband packet network should be able to provide multipoint communications that are required by a wide range of applications. The essential component to enhance the connection capability of a packet network is a multicast packet switch, capable of packet replications and switching, which is usually a serial combinations of a copy network and a point-to-point switch. The copy network replicates input packets from various sources simultaneously, after which copies of broadcast packets are routed to their final destination by the switch. A nonblocking, self-routing copy network with constant latency is proposed. Packet replications are accomplished by an encoding process and a decoding process. The encoding process transforms the set of copy numbers, specified in the headers of incoming packets, into a set of monotone address intervals which form new packet headers. The decoding process performs the packet replication according to the Boolean interval splitting algorithm through the broadcast banyan network, the decision making is based on a two-bit header information. This yields minimum complexity in the switch nodes. >

Paris: An approach to integrated high‐speed private networks

Abstract: This paper describes a design of a high-speed packet switching system for integrated voice, video and data communications. The system makes use of a simplified network architecture in order to achieve the low packet delay and high nodal throughput necessary for the transport of voice and video. A prototype of this system has been implemented and is now being tested under a variety of packet traffic loads. We have demonstrated that this system provides a cost-effective solution for private integrated networks.

Architecture of the control of a high performance packet switching distribution network

Abstract: A high capacity metropolitan area network (MAN) is described. Data traffic from users is connected to data concentrators at the edge of the network, and is transmitted over fiber optic data links to a hub where the data is switched. The hub includes a plurality of data switching modules, each having a control means, and each connected to a distributed control space division switch. Advantageously, the data switching modules, whose inputs are connected to the concentrators, perform all checking and routing functions, while the 1024×1024 maximum size space division switch, whose outputs are connected to the concentrators, provides a large fan-out distribution network for reaching many concentrators from each data switching module. Distributed control of the space division switch permits several million connection and disconnection actions to be performed each second, while the pipelined and parallel operation within the control means permits each of the 256 switching modules to process at least 50,000 transactions per second. The data switching modules chain groups of incoming packets destined for a common outlet of the space division switch so that only one connection in that switch is required for transmitting each group of chained packets from a data switching module to a concentrator. MAN provides security features including a port identification supplied by the data concentrators, and a check that each packet is from an authorized source user, transmitting on a port associated with that user, to an authorized destination user that is in the same group (virtual network) as the source user.

Buffer management system

Abstract: A Buffer Management System for a general multipoint packet switching network where the network has terminals transmitting data in the form of packets belonging to multiple channels over communication links through a packet switch array, the packet switches of the array receiving incoming packets from input data links and having memory arrays for temporarily storing the incoming packets for retransmitting the stored packets over output links. The Buffer Management System determines whether a packet should be stored, retransmitted, or discarded during an overload condition by identifying each incoming packet as either an excess packet or a nonexcess packet based on the number of packets stored in the memory array of the same channel as the incoming packet, and writing an incoming nonexcess packet into the memory array when the memory array is full and at least one excess packet is in the memory array and for discarding the excess packet from the memory array.

Self-routing multistage switching network for fast packet switching system

Abstract: A self-routing multistage switching network for a fast packet switching system suitable for multimedia communication. The self-routing multistage switching network has packet buffer means for storing packets, provided only in an input stage and respectively connected to input ports, and switching networks having no packet storing function and provided after the packet buffer means. The self-routing multistage switching network detects beforehand while packets are transmitted therethrough whether or not the packets are transmitted therethrough instead of being discarded, reports information for identifying the packets which are transmitted instead of being discarded backward to the packet buffer means through transmission routes through which the packets have been transmitted, and deletes the packets stored in the packet buffer means and corresponding to the packets which are allowed to be transmitted through the self-routing multistage switching network after sending out the same packets. The self-routing multistage switching network is capable of transmitting a plurality of packets for a piece of comunication without entailing outrun between the packets.

Reservation-based contention resolution mechanism for Batcher-Banyan packet switches

Abstract: We introduce a new method, called ring reservation, to design high-capacity packet switches. Input buffering is used with output port reservations to eliminate packet collisions. We describe a 32×32 prototype packet switch, built as a part of a broadband ISDN prototype, which has a per-port capacity of 30–55 Mbit/s.

Real-time packet switching: a performance analysis

Abstract: The authors model the internal structure of a packet-switching node in a real-time system and characterize the tradeoff between throughput, delay, and packet loss as a function of the buffer size, switching speed, etc. They assume a simple shared-single-path switch fabric, though the analysis can be generalized to a wider class of switch fabrics. They show that with a small number of buffers the node will provide a guaranteed delay bound for high-priority traffic, a low average delay for low-priority traffic, no loss of packets at the input and low probability of packet loss at output. >

Multichannel bandwidth allocation

Abstract: A method and apparatus for allocating bandwidth in a broadband packet switching network are disclosed. The invention utilizes channel groups (112) which may be defined as a set of parallel packet channels that act as a single data link connection between packet switches (110). In accordance with the invention, bandwidth is allocated in two steps. At virtual circuit setup time, bandwidth is reserved in particular channel groups. At transmission time packets are assigned to individual channels within the groups, illustratively, using a coordination mechanism in communication with the input ports of the appropriate packet switch. The bandwidth allocation technique, known as multichannel bandwidth allocation, leads to increased throughput and reduced packet loss probabilities.

Queueing in space-division packet switching

Abstract: The authors study the performance of four different approaches for providing the queuing necessary to smooth fluctuations in packet arrivals to a space-division packet switch. They are (1) input queueing, where a separate first-in, first-out (FIFO) buffer is provided at each input to switch; (2) input smoothing, where a frame of b packets is stored at each of the N input lines to the switch and simultaneously launched into a switch fabric of size Nb*Nb; (3) output queuing, where packets are queued in a separate FIFO buffer located at each output of the switch; and (4) completely shared buffering, where all queuing is done at the outputs and all buffers are completely shared among all the output lines. >

High speed, error-free data transmission system and method

Abstract: A method of operating a high speed, error-free data transmission system in a noisy medium comprises compressing data determined to be compressible, forward error correcting the data and interleaving the data in a bit matrix memory to enhance the forward error correction. Digital information packets are formulated including a header bearing a packet number, the total packet byte count, any packet number resend request, the data byte count of the actual data and a CRC. The digital information packet is loaded onto a transmitter carousel having a fixed number of sectors. The receiver receives the data, requests resend of any packet (by number) that is defective, error corrects if necessary and sequentially loads the packet onto a receiver carousel. Packets or sequential packet groups are removed from the carousel, selectively decompressed and the data words extracted and sent to the output.

Header driven packet switching system and method

Abstract: A header driven packet switching system including packet header processing circuits (41, 42 ... 4 m) for controlling the routing and header rewriting of data packets. The packet header processing circuits are the hunted type and are arranged independently from incoming lines (11 - 1 n) so that the packet switching capacity of the system will be improved, a high speed packet switching realized, and an improved flexibility of the system against traffic congestion will be obtained. In addition, it is possible to arrange the pocket header processing circuits (41, 42 ... 4m) according to traffic conditions.

Packet switching equipment and a packet switching method for controlling packet switched networks

Abstract: In order to enable an expansion of a packet switched network and a constitution change thereof to be readily achieved in a multistage switched network constitution, in a packet switched network including a packet data terminal, a packet switching equipment, a PBX, a multiplexer, an LAN, a voice communication apparatus such as a telephone set, and a facsimile or in a linkage between switching modules in a packet switching apparatus, the basic switching modules called configuration units connected to the network are interconnected to each other to form a hierarchic tree structure of which the number of hierarchic levels can be selected depending on a size of the packet switched network. Furthermore, in order to increase the reliability of the packet data transfer in the multi-stage switched network configuration, there are disposed a plurality of connecting lines between bit switches and upper-level configuration units so as to establish a redundant configuration.

Digital circuit-switching and packet-switching network and switching facility therefor

Abstract: A digital switching network is disclosed in which paths can be preset from any inlet to any outlet either for circuit-switched connections or for packet-switched messages (packets), as required. At any point in time, the paths preset for the packet-switched messages form a network whose nodes lie in the switching facilities of the switching network. The switching facilities contain the functional units required to switch each data packet on the path preset for it. This makes it possible to dynamically divide a single switching network into a circuit-switching network and a packet-switching network as required.

Integrated voice/data switching

Abstract: A basic understanding of the technical problems in integrating voice and data is provided. The different types of traffic found in communication systems are examined. Integration is investigated at different levels. In particular, the focus is on the integration of voice and data at the switching level. Different switching approaches are compared and some integrated-switching systems are described. >

Optical packet switching system using multi-stage combination of light triggering switches

Abstract: An optical packet switching system is disclosed in which a routing signal is composed of a wavelength-multiplexed optical signal and an information part and a packet end code are also composed of optical signals. In accordance with the present invention, a switching network is formed by a multi-stage combination of light triggering switches which are closed depending on the presence or absence of a particular wavelength in the wavelength-multiplexed optical signal.

Routing with packet duplication and elimination in computer networks

Abstract: Packet duplication is discussed as a means of increasing network reliability in an environment where packet loss exists. Several methods of routing the duplicates are presented, one of which-the st-numbering-is shown to have the combined advantage of using disjoint paths and more even utilization of network resources. An additional mechanism, deliberate packet elimination, is introduced as a means of controlling congestion that may result, in part, from the duplication. A comprehensive model is defined encompassing the process of packet duplication together with both forms of packet elimination. Within this model, a cost function based on average packet delay is defined. A quasi-static distributed algorithm is developed that is optimal, deadlock free, and loop free. Extension of the model to include packet retransmission is considered. >

Theory of periodic contention and its application to packet switching

Abstract: The following model of a packet switch is considered: at each clock tick, the switch attempts to route the head-of-line packet at the buffer of every input port to its destination port. Each output port can receive only one packet at a time, but there may be packets from multiple inputs destined for common output. The switch first selects exactly one packet for each requested output and then routes all selected packets through a self-route interconnection network such as the Batcher-Banyan network. Based on the traffic assumption of periodic packet streams, the necessary and sufficient clock rate is determined in order for the switch to be nonblocking. This result has turned out to be quite different from analyses based on the assumption of random traffic. >

Packet forwarding

Abstract: A packet network is viewed as consisting of two major interacting layers: a lower layer responsible for the determination of a set of paths that can be used to carry packet flows, and an upper layer responsible for actually sending the flows over these paths, on a per-packet basis. A systematic review is provided of the various techniques that can be used to perform the actual packet-by-packet routing operation at the upper layer, called the packet forwarding function. The function components of a routing system and its characteristics (responsiveness to changes in network state and degree of centralization) are discussed. Five routing techniques are then examined, namely source, directory, destination, global-path, and channel-link-path routing. >

Multipath interconnection: a technique for reducing congestion within fast packet switching fabrics

Abstract: The banyan interconnection is prone to internal link congestion, resulting in a blocking switch architecture. Several solutions that have been implemented to reduce the severity of link congestion offer packets a multiplicity of paths, which tend to increase packet delay variability and allow delivery of out-of-sequence packets. This, in turn, can lead to an increase in end-to-end protocol complexity, particularly in the case of real-time services. A solution called multipath interconnection is proposed to overcome this difficulty. Multiple (i.e., alternate) paths are provided and one is selected at call-setup time. Subsequent packets belonging to the call are constrained to follow the selected path. A number of path selection strategies are presented. >

Source modelling for packet video

Abstract: Fast packet switching or asynchronous time division (ATD) networks have been proposed for integrated-services broadband communication systems because diversified services can be offered using unified protocols. Variable-rate video-encoding techniques are usually used in these communication systems to maintain constant video quality and to take advantage of the flexible nature of the ATD network. Since the bit rate is no longer a constant, statistical models are developed to measure the characteristics of the bit-rate sequence. A first-order Markov representation is proposed to describe the probabilistic behavior of the coded video sources. Based on these models, the ATD network protocol can be designed and analyzed. A general model is proposed for the coded source rate, and several special cases of the general model for different applications are described. The related issues of video coding in ATD networks are also discussed. >

Definition of network options for the Belgian ATM broadband experiment

Abstract: The definition of a system requires the selection of a number of basic options. PTM (packet transfer mode) is a generic concept grouping a number of similar techniques which enable very flexible switching and transmission. The author describes the options and parameters which have been selected for a Belgian experiment planned in the early 1990s. Discussed are the following aspects: ATD (asynchronous time division) versus FPS (fast packet switching), including fixed or variable packet length, the optimal packet length, transmission and switching speed, and the number of lower-layer capabilities. >

Wideband packet technology

Abstract: The authors describes the benefits of wideband packet technology and presents its protocols, performance, and equipment aspects He shows that using proven digital signal processing techniques and standard protocols, wideband packet technology allows the integration of voice/data/image/control onto one self-healing DS1 LAPD network >

Data transmission device capable of adaptively varying a packet size without an increase in hardware

Abstract: In a data transmission device operable in accordance with a protocol such that the same transmission data packet is automatically repeated on nonreception of the transmission data packet at a reception end, a repetition number of the same transmission data packet is measured in a protocol interface circuit together with a selected one of a packet size and a data size carried by the transmission data packet. The repetition number and the selected size are supplied to first and second conversion tables to be converted into first and second factors which are related to a bit error rate of the transmission data packet on a transmission line and a correction factor of the first factor, respectively. The first and the second factors are added to each other to be averaged into an estimation factor of the bit error rate in consideration of preceding data packets. The estimation factor is converted by the use of a third conversion table into an optimum size of either a packet size or a data size. Consequently, transmission efficiency is improved by transmitting each transmission packet with an optimum size.

Emulating circuits in a broadband packet network

Abstract: Considers the importance of circuit emulation for customer requirements and its continued value as the broadband network evolves from broadband access to an integrated network combining broadband access with broadband packet switching Next, the authors address two related issues, the effects of a circuit emulation requirement on packet network performance requirements and, given these requirements, the design of conforming packet networks They examine two performance requirements, those related to packet loss and those related to packet delay and jitter The requirement that the packet network preserve the timing integrity of the emulated circuit is translated into performance requirements that protect against packet loss It is shown that the packet loss due to buffer overflow or underflow should be better than 10/sup -10/ for any end-to-end connections Finally, the authors describe a two-stage time-space switch that could satisfy the performance constraints required for circuit emulation >

Adaptive clock synchronization schemes for real-time traffic in broadband packet networks

Abstract: The authors illustrate the phenomenon of packet jitter using a simple example and propose methods by which the destination clock frequency can be adjusted, so that it follows the source clock frequency asymptotically while minimizing the effects of packet jitter on the outgoing packet stream. They provide a comprehensive asymptotic analysis of the estimation and control algorithms and discuss their implementation. The authors provide a systematic design procedure for choosing the relevant parameters for implementation and discuss the sensitivity of the performance with respect to these parameters. >

Buffering concepts for ATM switching networks

Abstract: The authors study various buffering strategies for switch fabrics of the Banyan type, where the buffers are located in the individual switching elements. The influence of the different strategies on the performance of the network has been evaluated under equivalent conditions to allow a comparison of the results, and the packet loss probability for networks constructed of switching elements with input buffers has been analyzed. The investigations indicate that significant performance improvements can be achieved by applying advanced buffering concepts. The choice of the best buffering strategy depends on the size of the switching elements as well as on economic and technological constraints. >