Showing papers on "Fast packet switching published in 2010"

Methods and apparatus to route control packets based on address partitioning

Abstract: Methods and apparatus to route control packets based on address partitioning. A disclosed example method includes receiving a packet in a server, determining the packet is a control packet, forwarding the packet to a processor, identifying via the processor an address prefix of the packet, accessing a forwarding table and determining via the processor at least one of a router or an outgoing interface that corresponds to the identified address prefix, transmitting the packet from the processor to the server via the outgoing interface, and statically forwarding the packet from the server to the router based on an interface that received the packet from the processor.

Packet Switching Device Using Results Determined by an Application Node

Abstract: Packets are encapsulated and sent from a service node (e.g., packet switching device) using one or more services applied to a packet by an application node (e.g., a packet switching device and/or computing platform such as a Cisco ASR 1000) to generate a result, which is used by the service node to process packets of a flow of packets to which the packet belonged. An example of a service applied to a packet is a classification service, such as, but not limited to, using deep packet inspection on the packet to identify a classification result. The service node can, for example, use this classification result to process other packets in a same packet flow, such that all packets of a flow do not need to be, nor typically are, sent to an application node for processing.

Demonstration of the interconnection of two optical packet rings with a hybrid optoelectronic packet router

Abstract: We demonstrate the interconnection of two optical packet switching systems: a hybrid optoelectronic packet router and two optical packet rings Error-free inter-ring and intra-ring optical packet transmission and unicast and multicast transport of encapsulated 10 GbE are achieved

Space-space-memory (SSM) Clos-network packet switch

Abstract: A Clos-network packet switching system may include input modules coupled to a virtual output queue, central modules coupled to the input modules, and output modules coupled to the central modules, each output module having a plurality of cross-point buffers for storing a packet and one or more output ports for outputting the packet.

High‐Speed Downlink Packet Access

Abstract: This chapter presents High-speed Downlink Packet Access (HSDPA) for WCDMA—the key new feature included in Release 5 specifications. The HSDPA concept has been designed to increase packet data throughput by means of fast physical layer (L1) retransmission and transmission combining as well as fast link adaptation controlled by the Node B (Base Transceiver Station (BTS)). This chapter is organised as follows: First, HSDPA key aspects are presented and a comparison to Release’99 downlink packet access possibilities is made. Next, the impact of HSDPA on the terminal uplink (user equipment (UE)) capability classes is summarised and an HSDPA performance analysis is presented, including a comparison to Release’99 packet data capabilities. The chapter is concluded with a short discussion of evolution possibilities of HSDPA.

System and method for packet messaging and synchronization

Abstract: System and method for packet messaging and synchronization through a packet based display interface includes using a multiple packet transport protocols, translating packet messages between protocols and achieving time code synchronization with a packet protocol between multiple devices in a multimedia network. A packet based display interface includes a dual data transport module to communicate packet messages using first and second packet transport protocols across a bidirectional link and a media transport module to communicate video packets across a unidirectional link. A method for communicating packet messages between source and slave devices in a multimedia network includes translating messages between different packet transport protocols. An apparatus for synchronizing a sink device to a source device includes a counter module configured to be adjusted based on a received source global time code value and a transport module to transmit a sink global time code value to the source device.

Choosing the packet size in multi-hop underwater networks

Abstract: Two MAC layer protocols are considered for multi-hop underwater acoustic networks: Pure CSMA, suitably configured to perform over a long-delay channel, and the Distance-Aware Collision Avoidance Protocol (DACAP), a protocol specifically designed for collision avoidance via a distributed coordination function a la IEEE 802.11. We investigate the impact of packet size on the performance of these two protocols. A comparative analysis, conducted via ns-2 simulations, quantifies throughput efficiency, end-to-end delay and energy-per-bit consumption as functions of the packet size. The results clearly indicate the existence of an optimal packet size for each scenario. The optimal packet size depends on the protocol characteristics, on the offered load, and is heavily influenced by the bit error rate. The results also reveal performance sensitivity to the choice of the packet size for the different protocols (CSMA and DACAP), emphasizing how a wrong selection of the packet size can result in a higher cost to performance.

Packet re-cycling: eliminating packet losses due to network failures

Abstract: This paper presents Packet Re-cycling (PR), a technique that takes advantage of cellular graph embeddings to reroute packets that would otherwise be dropped in case of link or node failures. The technique employs only one bit in the packet header to cover any single link failures, and in the order of log2(d) bits to cover all non-disconnecting failure combinations, where d is the diameter of the network. We show that our routing strategy is effective and that its path length stretch is acceptable for realistic topologies. The packet header overhead incurred by PR is very small, and the extra memory and packet processing time required to implement it at each router are insignificant. This makes PR suitable for loss-sensitive, mission-critical network applications.

Packet communication device, packet communication system, packet communication module, data processor, and data transfer system

Abstract: A transmit packet generated by a CPU 1 is held in a buffer 100 a ( 100 b ). From among packets received from Ethernet 820 a ( 820 b ), a packet, a destination of which is a communication device 800 , is held in the buffer 100 a ( 100 b ). A packet which should be transmitted is transmitted from a transfer judging circuit 200 to Ethernet 820 a or 820 b through a MAC unit 300 a or 300 b . If a transfer judging circuit 200 judges a packet from the Ethernet 820 a to be a packet, a destination of which is another communication device, with reference to a destination MAC address, this packet is transferred to the Ethernet 820 b through MAC 300 b . If a usage rate of a transferring FIFO buffer 130 a ( 130 b ) exceeds a threshold value in the process of transmitting a packet held in a transmitting FIFO buffer 120 a ( 130 b ) on a priority basis, the priority order of a transfer packet is made higher than that of a transmit packet so that the transfer packet is transferred to the Ethernet 820 a or 820 b in preference to the transmit packet. This prevents a transfer buffer means from overflowing.

Access window envelope controller in wireless network

Abstract: A method may include receiving a packet destined to a wireless node, buffering the packet, and scheduling a time at which to transmit the packet to the wireless node. Scheduling the packet may include determining an application-layer protocol associated with the packet. The method may also include wirelessly transmitting the packet to the wireless node at the scheduled time. In one embodiment, the method may also include sending information to a node that originated the packet indicating that the packet is buffered. In another embodiment, sending information to the node that originated the packet indicating that the packet is scheduled to be wirelessly transmitted at the scheduled time.

Two-way ranging messaging scheme

Abstract: In a two-way ranging scheme where a first apparatus (e.g., device) determines a distance to a second apparatus (e.g., device), specified packets are sent between these apparatuses at specified times to facilitate the determination of the distance. In some aspects, these packets may be defined and/or sent in a manner that enables the apparatuses to detect a leading edge of a received packet with a high degree of accuracy. For example, an apparatus may transmit a packet a defined period of time after transmitting or receiving another packet. In addition, a packet may comprise a defined symbol sequence that is used by an apparatus that receives the packet to identify a leading edge of the packet.

Fast-tuning 224-Gb/s intradyne receiver for optical packet networks

Abstract: We demonstrate a digital coherent 224-Gb/s (56-Gbaud PDM-QPSK) packet receiver that selects packets using a fast wavelength-switching local oscillator. A novel three-stage CMA enables blind packet recovery in less than 200 ns.

System and method for switching packet traffic over an optical transport network

Abstract: A system and method for switching packet traffic over an optical transport network comprises a network element having first and second mappers for mapping packet traffic to electrical streams. A network interface includes a packet switch that directs a first packet stream to the first mapper based on a destination of the packets in the first packet stream and a second packet stream to the second mapper based on a destination of the packets in the second packet stream. The first mapper produces a first stream of electrical signals from the first packet stream, and the second mapper produces a second stream of electrical signals from the second packet stream. Each electrical signal stream is allocated a portion of bandwidth of an optical interface. The optical interface produces an optical signal that includes the first and second electrical signal streams according to the bandwidth allocated to each electrical signal stream.

Distributed switch domain of heterogeneous components

Abstract: A method of integrating virtual and physical network switching components into a heterogeneous switching domain is provided. Such method including, attaching, by a switching device, a header to a packet received from a virtual machine, the header including domain information, and processing the packet by the switching device, the processing being controlled by the header. Finally, the packet is forwarded, the forwarding being controlled by the header.

Relay control device, relay control system, relay control method, and relay control program

Abstract: Communication allowance determination means determines, using information of a packet received by a packet relay unit and based on a policy which is information associating a match condition with communicability information, whether to allow or not to allow communication to a destination unit for the packet that meets the match condition, the match condition being information identifying the packet, and the communicability information indicating whether to allow or not to allow the communication to the destination unit for the packet that meets the match condition. Rule setting means sets, at least in the packet relay unit receiving the packet, a rule of executing a process for suppressing forwarding of the packet to the destination unit, on condition that the communication allowance determination means determines not to allow the communication to the destination unit for the packet that meets the match condition.

Methods, systems, and computer readable media for improved multi-switch link aggregation group (MLAG) convergence

Abstract: The subject matter described herein includes methods, systems, and computer readable media for improved multi-switch link aggregation group (MLAG) convergence According to one aspect of the subject matter described herein, a system for improved multi-switch link aggregation group (MLAG) convergence is provided The system includes a packet forwarding device The packet forwarding device includes a packet processor for receiving a packet and determining that the packet is destined for a port of the packet forwarding device associated with an MLAG group The packet forwarding device further includes an MLAG module associated with the packet processor for determining that the port is inactive, and in response to determining that the port is inactive, performing a convergence operation, wherein the convergence operation includes redirecting, using a redirection filter, the received packet towards an active port associated with the MLAG group

Method and apparatus for converting a multicast session to a unicast session

Abstract: A method and apparatus are described including receiving a data packet having a data packet header, storing the received data packet as shared payload, determining if the received data packet is a first data packet, initializing a sequence starting number responsive to the determination, generating a new data packet header, calculating a sequence number for the received data packet using the sequence starting number, inserting the new sequence number into the new data packet header, unicasting the new data packet header and the shared payload to a plurality of client devices.

Improving PC-based OpenFlow switching performance

Abstract: In this paper, we propose an architectural design to improve lookup performance of OpenFlow switching in Linux using a standard commodity network interface card based on the Intel 82599 Gigabit Ethernet controller. We describe our design and report our preliminary results that show packet switching throughput increasing up to 25 percent compared to the throughput of regular software-based OpenFlow switching.

Method and packet switch appliance for performing packet deduplication

Abstract: A packet switch appliance and method for performing packet deduplication are described. In one embodiment, the packet switch appliance comprises a first network switch chip to receive packets from the network and a processor coupled to the first network switch chip and operable to perform a method comprising receiving the packets, identifying a packet as a duplicate packet if at least a portion of the packet is identical to a corresponding portion of another packet received within a predetermined period of time, and discarding the packet if the packet is the duplicate packet.

Packet switch appliance with a packet switching and packet processing daughter board

Abstract: A packet switch appliance for connection to a packet switching network, the packet switch appliance has a motherboard that includes a processor, a network switch chip, and a connector. The packet switch appliance also includes a daughter board configured to be removably connected to the motherboard through the connector. The daughter board may include one or more of a network switch chip and a processor unit.

Switching node with load balancing of bursts of packets

Abstract: A packet switching node is coupled by links to other nodes of a network, and receives and assembles (74) packets belonging to a specified packet flow, into bursts of packets with a burst control packet indicating a sequence of the burst in the flow. The node determines (78) whether to distribute the flow across several links. If so, the bursts are then forwarded (80) for switching to the output ports (160) of the selected links. Distributing the flow over multiple links can enable more flexible and efficient filling of allocated bandwidth on links, as traffic increases. To reduce the risk of losing the order of packets the sequence of the bursts is indicated for use in reordering at intermediate nodes during transmission through the network.

Packet relay apparatus and congestion control method

Abstract: A packet relay apparatus relaying a packet exchanged between communication apparatuses with a connection established is provided. The packet relay apparatus includes a buffer for storing a packet selected from among arrival packets so that a transfer of the selected packet is to be suspended, and a congestion controller for monitoring, after the storage of the packet on the buffer, a packet passing through the packet relay apparatus, and causing the packet, stored on the buffer, to be transmitted at a timing responsive to a passage status of a packet having the same connection as the connection of the packet stored on the buffer.

Optimum packet length masking

Abstract: Application level traffic classification has been addressed in demonstrated recently based on statistical features of packet flows. Among the most significant characteristics is packet length. Even ciphered flows leak information about their content through the sequence of packet length values. There are obvious ways to destroy such side information, e.g. by setting all packet at maximum allowed length. This approach could ential an extremely large overhead, which makes it impractical. There is room to investigate the optimal trade-off between overhead/complexity of packet length masking and suppression of information leakage about flow content through packet length values. In this work we characterize the optimum first order statistical padding technique which guarantees indistinguishability of different application flows. We also discuss how to account for subsequent packet length correlation. Numerical results are shown with reference to real network traffic traces, specifically flows of HTTP, POP3, SSH, and FTP (control session) traffic.

Stateful Flow Information Table Method and System for Packet Inspection System

Abstract: A packet processing system comprises two packet inspection systems for tracking packet flows between a first network and a second network. A memory is accessible by each of the packet inspection systems for storing flow entries. Each of the flow entries includes a flow key characterizing a packet flow associated with flow entry, a flow identifier. State information is further maintained indicating ownership of the flow identifiers among the two packet inspection systems. Using stateful identifiers ensures that two packet processing systems do not become incoherent and properly indicate the status of free flow identifiers.

Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values

Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

System, Methods, and Apparatus For Bidirectional Relaying In Wireless Communications Systems

Abstract: In one embodiment, a method of wireless communication includes transmitting a first data packet from a user end during a first subframe of a radio frame. A second data packet is transmitted from a base station during a second subframe of the radio frame. A single data packet is received from a relay node in a third subframe of the radio frame. The single data packet includes the first and the second data packets.

Method for flexible modifications to a packet

Abstract: A method allowing for flexible modification of a data packet in a data network is presented. A data packet is parsed based on one or more attributes and sent to a buffer memory and a user modifiable lookup table. Using extracted packet data, information required to modify the data packet as desired is located in the lookup table and forwarded to a packet modification engine. Within the packet modification engine, a novel rewrite constructor module generates unique packet rewrite information based on the information forwarded from the lookup table and one or more additional inputs. This unique packet rewrite information is forwarded to a packet rewrite engine, wherein the packet rewrite engine modifies the data packet accordingly.

Self-routed layer 4 packet network system and method

Abstract: The embodiment discloses a connection oriented packet network using an MPLS-type label switching technology. The network uses a very fast hardware-oriented self-routing protocol that can expose a path right-of-way and program a connection between a calling and called party at wire speed. The embodiment requires no provisioning and is well suited for mobile and ad-hoc networks. The system and method taught can be applied to other data networks where performance guarantees are important.

Control-message exchange of lightpath setup over colored optical packet switching in an optical packet and circuit integrated network

Abstract: We have proposed the concept of an optical packet and circuit integrated network to provide service diversity, energy efficiency and a simplified control mechanism toward new generation networks. In this integrated network, optical data packets and data on lightpaths are transmitted on common physical resources for efficient resource use. In addition, path signaling for lightpath setup and release thorough optical packet switch block is implemented. We set up a primitive optical packet and circuit integrated network including one switching node and a set of packet/path transceiver. We demonstrate 80 (8λ × 10) Gbit/s colored optical packet switching and 8-lightpaths establishment by transferring optical control packets over the optical packet switching.

Power packet system

Abstract: PROBLEM TO BE SOLVED: To achieve a power packet system for supplying or receiving power in an end-to-end manner between consumers by distributing the power energy by a power packet with header information attached thereto. SOLUTION: The power packet system for supplying or receiving power by packet transmission and reception includes: a chargeable secondary battery; a storage means storing identification information of another power packet system that receives power; a power pulse generation means generating a power pulse having a time width of electric energy supplied to the supply destination at a selectable power level, based on a power supplied from the secondary battery; a packet synthesis means generating a power packet including the power pulse in a payload unit and including identification information of at least the supply destination in a header unit; and a transmission means transmitting the power packet. COPYRIGHT: (C)2011,JPO&INPIT