Fast packet switching

About: Fast packet switching is a research topic. Over the lifetime, 5641 publications have been published within this topic receiving 111603 citations.

Bit field manipulation

Abstract: A bit field direct manipulation device which processes data packets using a multi-threaded pipelined machine, wherein no instruction depends on a preceding instruction because each instruction in the pipeline is executed for a different thread. The multi-thread packet processor transfers a data packet from a flexible data input buffer to a packet task manager, dispatches the data packet from the packet task manager to a multi-threaded pipelined analysis machine, classifies the data packet in the analysis machine, modifies and forwards the data packet in a packet manipulator. The multi-thread packet processor includes an analysis machine having multiple pipelines, wherein one pipeline is dedicated to directly manipulating individual data bits of a bit field, a packet task manager, a packet manipulator, a global access bus including a master request bus and a slave request bus separated from each other and pipelined, an external memory engine, and a hash engine.

Support of Micro-Mobility in MPLS-Based Wireless Access Networks

Abstract: In this paper, we propose an architecture for the MPLS (Multi-Protocol Label Switching)-based micro-mobility management including label switched path setup, packet forwarding, handoff processing, and paging. In order to prevent packet loss during handoff, we propose two packet recovery mechanisms, namely: buffer time-based packet recovery and medium access control (MAC) layer assisted packet recovery schemes. Simulation results show that the MAC layer assisted packet recuvery scheme has a better performance than buffer time-based scheme. Our proposed scheme provides a higher throughput when compared with other IP micro-mobility protocols including Cellular IP, HAWAII, and Hierarchical Mobile IP.

Method for superimposing a sequence number in an error detection code (crc) in a data network

Abstract: A system and method for superimposing a sequence number of a packet into the CRC segment of the packet thereby allowing more bandwidth in the payload portion of the packet for carrying data is described. Also described is a method of acquiring additional information on the type of error in a packet, e.g., data transmission errors or sequence errors, from analyzing a CRC error. For example, a reported CRC error can be the result of the receipt of a packet with a sequence number the receiver is not expecting (which is a normal occurrence on transmission links due to transmitters resending packets that a receiver has already accepted) or can result from a real error in the transmission of a packet.. A first error code check (CRC) value is calculated for the payload segment of a data packet. A second CRC value is calculated for the sequence number of the data packet. The first CRC value and the second CRC value are combined thereby creating a third CRC value. The third CRC value is then combined with the payload segment of the data packet thereby creating a data packet that can be transmitted across the link.

Device, system and/or method for managing packet congestion in a packet switching network

Abstract: A network infrastructure device includes a receiver operable to receive packets when operably connected to a communication network; and a processor cooperatively operable with the transceiver. The processor can receive a packet on an interface corresponding to the transceiver. Also, the processor can map the packet to one of several queues and to one of several classifications, based on an indication of priority of handling in a header in the packet and/or an indication of priority in a configuration of the interface. The processor also checks for congestion in the queues with respect to the classification of the packet, and checks for congestion in the one queue with respect to the one classification. The processor queues the packet if there is no congestion, otherwise the processor drops the packet.

Antenna diversity based on packet errors

Abstract: A wireless transceiver including multiple antennas, an antenna switch, and a media access controller that controls the antenna switch for determining when to switch to another antenna based on packet error rate (PER). Instead of switching the antenna on a packet-by-packet basis, antenna selection is made after one or more packets errors have been detected. The CRC is used to identify receive packet errors. A timer is used to determine each transmit packet error when an acknowledge packet is not received in time. A method of selecting from among multiple antennas including counting packet errors, comparing a packet error count with a threshold value to determine a threshold condition, switching to a different antenna if the threshold condition is met, and resetting the packet error count when the threshold condition is met.