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Fast packet switching

About: Fast packet switching is a research topic. Over the lifetime, 5641 publications have been published within this topic receiving 111603 citations.


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Patent
22 Dec 2000
TL;DR: The route switch packet architecture as mentioned in this paper uses a multi-threaded pipelined machine to process data packets, where each instruction depends on a preceding instruction because each instruction in the pipeline is executed for a different thread.
Abstract: Route switch packet architecture processes data packets using a multi-threaded pipelined machine wherein no instruction depends on a preceding instruction because each instruction in the pipeline is executed for a different thread. The route switch packet architecture transfers a data packet from a flexible data input buffer to a packet task manager, dispatches the data packet from the packet task manager to a multi-threaded pipelined analysis machine, classifies the data packet in the analysis machine, modifies and forwards the data packet in a packet manipulator. The route switch packet architecture includes an analysis machine having multiple pipelines, wherein one pipeline is dedicated to directly manipulating individual data bits of a bit field, a packet task manager, a packet manipulator, a global access bus including a master request bus and a slave request bus separated from each other and pipelined, an external memory engine, and a hash engine.

28 citations

Patent
09 Jan 2003
TL;DR: The packet switching system for transmitting and receiving a packet via a packet switching network (100) comprises a plurality of routing tables (#0, #1, #2...), each of which has been generated by a unique routing policy, stored in the routing apparatuses deployed at the border, at origin or at the end of the respective routing domains, an identifier (RTI) inserted in the packet to specify the routing tables, and an identifier changer to change a value of the identifier on the packet switching networks as discussed by the authors.
Abstract: The packet switching system for transmitting and receiving a packet via a packet switching network (100), which comprises a plurality of routing tables (#0, #1, #2 ...), each of which has been generated by a unique routing policy, stored in the routing apparatuses deployed at the border, at the origin or at the end of the respective routing domains, an identifier (RTI) inserted in the packet to specify the routing tables, and an identifier changer to change a value of the identifier on the packet switching network (100). The routing apparatus selects one of the routing tables (#0, #1, #2 ...) according to the RTI in the received packet and transfers the packet to a destination that is specified by the selected routing table.

28 citations

Patent
25 Nov 2009
TL;DR: In this paper, a packet is analyzed, divided into an upper layer and a lower layer, and it is determined whether a property of the packet to be analyzed has been already analyzed or has to be re-analyzed with respect to each of the upper and lower layers.
Abstract: Provided is a hierarchical packet processing apparatus and method. In one general aspect, a packet is analyzed, divided into an upper layer and a lower layer. It is determined whether a property of the packet to be analyzed has been already analyzed or has to be re-analyzed with respect to each of the upper and lower layers of the packet. Therefore, deep packet inspection is performed only when it is required, and thus assurance of quality of service (QoS) during packet processing can be achieved, as well as reduced waste of resources.

28 citations

01 Jan 2001
TL;DR: This document defines the model and generic mechanisms for Multiprotocol Label Switching on Frame Relay networks and extends and clarifies portions of the Multip rotational label Switching Architecture described in [ARCH] and the Label Distribution Protocol (LDP) relative to Frame Relays.
Abstract: This document defines the model and generic mechanisms for Multiprotocol Label Switching on Frame Relay networks. Furthermore, it extends and clarifies portions of the Multiprotocol Label Switching Architecture described in [ARCH] and the Label Distribution Protocol (LDP) described in [LDP] relative to Frame Relay Networks. MPLS enables the use of Frame Relay Switches as Label Switching Routers (LSRs).

28 citations

Patent
19 Sep 1990
TL;DR: In this article, a packet switching scheme for receiving packets including broadcast addresses and connecting representations of the received packets to any combination of output ports specified in the address is disclosed, where the packet routing units of the network both generate packet representations and selectively connect the representations to downstream routing units or network outputs.
Abstract: A packet switching arrangement for receiving packets including broadcast addresses and connecting representations of the received packets to any combination of output ports specified in the address is disclosed. The packet routing units of the network both generate packet representations and selectively connect the representations to downstream routing units or network outputs. Packets for use with the network comprise an address portion encoded in a broadcast format or in a shorter point-to-point format and an address type character identifying the type of address in the address portion. The nodes of the network respond to the address type character of a received packet by selecting the appropriate decoding format for the packet address portion. A packet select unit decodes the address portion in accordance with the selected decoding format and selectively connects the packet to the network outputs.

28 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20222
20191
20186
201749
201699
2015159