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Fast packet switching

About: Fast packet switching is a research topic. Over the lifetime, 5641 publications have been published within this topic receiving 111603 citations.


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Patent
27 Jun 1994
TL;DR: In this article, a packet switching system (100) having a packet switch (140) employs an acknowledgment scheme in order to assure the delivery of all fragments (310) comprising a fragmented data packet (300) to improve overall system throughput during the handling of packets that require reassembly.
Abstract: A packet switching system (100) having a packet switch (140) employs an acknowledgment scheme in order assure the delivery of all fragments (310) comprising a fragmented data packet (300) to improve overall system throughput during the handling of packets (310) that require reassembly. When packet fragments (310) are lost, corrupted or otherwise unintelligible to a receiving device (92, 94), the acknowledgment scheme permits retransmission of the missing data. In addition, a second acknowledgment signal is scheduled by system processing resources (110) in order to verify the successful delivery of all retransmitted data.

142 citations

Patent
23 Jan 1989
TL;DR: In this article, the authors propose a packet suppression technique which suppresses transmission of entire packets in a data stream when a repeating pattern has been established in the previous packet and then is found to repeat throughout the following packets.
Abstract: A data communication system includes a repetitive pattern packet suppression technique which suppresses transmission of entire packets in a data stream when a repeating pattern has been established in the previous packet and then is found to repeat throughout the following packets. An expansion part of the technique fills the resulting hole in the data stream with the last pattern from the previously received packet.

142 citations

PatentDOI
04 Mar 1988
TL;DR: In this paper, a buffer management system for a general multipoint packet switching network is proposed, which determines whether a packet should be stored, retransmitted, or discarded during an overload condition by identifying each incoming packet as either an excess packet or a nonexcess packet based on the number of packets stored in the memory array.
Abstract: A Buffer Management System for a general multipoint packet switching network where the network has terminals transmitting data in the form of packets belonging to multiple channels over communication links through a packet switch array, the packet switches of the array receiving incoming packets from input data links and having memory arrays for temporarily storing the incoming packets for retransmitting the stored packets over output links. The Buffer Management System determines whether a packet should be stored, retransmitted, or discarded during an overload condition by identifying each incoming packet as either an excess packet or a nonexcess packet based on the number of packets stored in the memory array of the same channel as the incoming packet, and writing an incoming nonexcess packet into the memory array when the memory array is full and at least one excess packet is in the memory array and for discarding the excess packet from the memory array.

142 citations

Patent
Aimoto Takeshi1
31 Aug 2009
TL;DR: In this article, a packet switch for switching variable length packets includes a buffer memory, a transmission priority controller, and a packet readout controller, where the buffer memory stores transmission packets.
Abstract: A packet switch for switching variable length packets. Each output port interface of the packet switch includes a buffer memory, a transmission priority controller, and a packet readout controller. The buffer memory stores transmission packets. The transmission priority controller classifies, based on a predetermined algorithm, transmission packets passed from a packet switching unit into a plurality of queue groups to which individual bandwidths are assigned respectively, and queues the transmission packets in the buffer memory so as to form a plurality of queues according to transmission priority in each of the queue groups. The packet readout controller reads the transmission packets from each of the queue groups in the buffer memory according to the order of transmission priority of the packets while guaranteeing the bandwidth assigned to the queue group.

142 citations

Patent
29 Sep 1999
TL;DR: In this paper, a programmable network element (400) operates on packet traffic flowing through the element in accordance with a gateway program (404, 405, 406) which is dynamically uploaded into the network element or unloaded from it via a mechanism separate from the actual packet traffic as the element operates.
Abstract: A programmable network element (400) operates on packet traffic flowing through the element in accordance with a gateway program (404, 405, 406) which is dynamically uploaded into the network element or unloaded from it via a mechanism separate from the actual packet traffic as the element operates. Such programmable network element can simultaneously operate on plural packet flows with different or the same programs being applied to each flow. A dispatcher (402) provides a packet filter (403) with a set of rules provided by one or more of the dynamically loaded and invoked programs. These rules define, for each program, the characteristics of those packets flowing through the network element that are to be operated upon in some manner. A packet that flows from the network through the filter and satisfies one or more of such rules is sent by the packet filter to the dispatcher. The dispatcher, in accordance with one of the programs, either sends the packet to the program for manipulation by the program itself, or manipulates the packet itself in a manner instructed by the program. The processed packet is sent back through the filter to the network for routing to its destination.

141 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20222
20191
20186
201749
201699
2015159