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Fast packet switching

About: Fast packet switching is a research topic. Over the lifetime, 5641 publications have been published within this topic receiving 111603 citations.


Papers
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Journal ArticleDOI
TL;DR: The authors describe several methods for analyzing the queueing behavior of switching networks with flow control and shared buffer switches, and the best of the methods accurately predicts throughput for multistage networks constructed from large switches.
Abstract: The authors describe several methods for analyzing the queueing behavior of switching networks with flow control and shared buffer switches. They compare the various methods on the basis of accuracy and computation speed, where the performance metric of most concern is the maximum throughput. The best of the methods accurately predicts throughput for multistage networks constructed from large switches (>or=8 ports). >

69 citations

Patent
Alexander G. Fraser1
09 May 1975
TL;DR: In this article, a data communications system designed to facilitate communications between digital computers typically routes fixed-length segments of data, called packets, through minicomputer packet switches located intermediate the digital computers.
Abstract: A data communications system designed to facilitate communications between digital computers typically routes fixed-length segments of data, called packets, through minicomputer packet switches located intermediate the digital computers. To mitigate the need for expensive minicomputer arrangements as the intermediate processor, the minicomputers are replaced by a low-cost, high-throughput, modular packet switch having an efficient control memory-queue control arrangement for moving a packet from one time slot to another as well as modifying the packet header as the packet is routed through the communications system.

69 citations

Patent
Tetsumei Tsuruoka1, Yuji Kojima1
17 Sep 2001
TL;DR: A packet processing device capable of restraining overhead and processing packets at high speed is defined in this article, where the internal information handover section hands over internal information of a packet processor.
Abstract: A packet processing device capable of restraining overhead and processing packets at high speed. Packet input section is input a packet, and internal information handover section hands over internal information of a packet processor. Packet computing section computes the input packet in accordance with the internal information, and packet output section outputs the computed packet. A communication line connects such packet processors in series.

69 citations

Patent
26 Jun 1998
TL;DR: In this article, a packet data communication system (100) employs a method and apparatus for tracking data packets in the P2P communication system, where the sending device increases a transmit tracking number (V(S)) that is used to indicate the packet sequence number of the data packet that is next in sequence to be transmitted.
Abstract: A packet data communication system (100) employs a method and apparatus for tracking data packets in the packet data communication system. A sending communication device (e.g., 101) transmits a data packet (130) to a receiving communication device (e.g., 105), wherein the data packet includes a respective packet sequence number (131). Responsive to the transmission, the sending device increases a transmit tracking number (V(S)) that is used to indicate the packet sequence number of the data packet that is next in sequence to be transmitted. Upon receiving the data packet, the receiving device transmits an acknowledgment data packet (140) to the sending device, wherein the acknowledgment data packet includes a receive tracking number (139). The receive tracking number indicates the packet sequence number of the data packet that the receiving device expects to receive next. Upon receiving the acknowledgment data packet, the sending device determines whether a communication error occurred based on the receive tracking number and the transmit tracking number.

69 citations

Patent
Seiji Okumura1
23 Jun 2000
TL;DR: In this paper, a packet retransmission system for retransmitting a packet when a packet loss occurs between transmitting and receiving sides in a packet transmission in which packets have their sequence numbers is presented.
Abstract: A packet retransmission system for retransmitting a packet when a packet loss occurs between transmitting and receiving sides in a packet transmission in which packets have their sequence numbers. A receiver (102) includes a transmitting device (114) for a retransmission request, which stores a packet received from a transmitter (101) into a receive buffer in sequential order, enters the sequence number of a missing packet detected by detection means (111) in a retransmission list, and sends the transmitter (101) a retransmission request packet together with the sequence number stored in the retransmission list. The transmitter (101) includes a retransmission means (109), which retransmits to the receiver (102) a packet detected by packet detection means (107) according to the sequence number attached to the retransmission request packet received from the receiver (102).

69 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20222
20191
20186
201749
201699
2015159