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Fast packet switching

About: Fast packet switching is a research topic. Over the lifetime, 5641 publications have been published within this topic receiving 111603 citations.


Papers
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Patent
30 Sep 2003
TL;DR: In this paper, a packet header is analyzed without having to store the entire packet and before a packet payload arrives, thereby making it possible to make steering decisions before the complete arrival of the packet.
Abstract: A network interface card (NIC) with FIFO-based packet memory management including priority queues for controlling scheduling of network traffic to thereby prioritize packet transmission for time-critical applications. Furthermore, the invention comprises a system for early packet steering, wherein a packet header is analyzed without having to store the entire packet and before a packet payload arrives, thereby making it possible to make steering decisions before the complete arrival of the packet.

61 citations

Patent
06 May 1999
TL;DR: In this paper, conditions at the receiver which may be different to those at the source can now be taken into account in the flow control, which can reduce control loop delays caused by waiting at source for a number of acknowledgments to arrive before the congestion level can be calculated.
Abstract: In a packet network, on receiving a packet a receiving host determines if the packet has been marked by any of the nodes through which it passed, to indicate congestion at that node, e.g. by checking the CE bit in an IP header. A packet flow control parameter is generated at the receiving side, and sent to the source using an Internet Protocol, as part of the packet acknowledgment, to control the flow of packets from the source, according to the packet flow control parameter. This can reduce control loop delays caused by waiting at the source for a number of acknowledgments to arrive before the congestion level can be calculated. Conditions at the receiver which may be different to those at the source can now be taken into account in the flow control.

61 citations

Patent
Takayuki Hama1, Masashi Numata1
19 Aug 2011
TL;DR: In this article, a packet handling operation for writing flow identification information associated with the output port in a packet header field not to be referred to when the first node forwards the packet and rewriting address information in the packet header such that the packet arrives at the second node on the exit side, and then causing the packet to be forwarded.
Abstract: When calculating a forwarding path for a packet, a control apparatus determines a second node on the exit side of the packet forwarding path and an output port thereof. Next, the control apparatus sets in a second node located upstream of the first node on the packet forwarding path a packet handling operation for writing flow identification information associated with the output port in a packet header field not to be referred to when the first node forwards the packet and rewriting address information in the packet header such that the packet arrives at the second node on the exit side, and then causing the packet to be forwarded. A packet handling operation for causing the packet with the flow identification information given thereto to be transmitted from the port associated with the flow identification information is set in the second node on the exit side.

61 citations

Journal ArticleDOI
TL;DR: Networking techniques allow several processors within a multiprocessing system to cooperate efficiently on a single large problem.
Abstract: Networking techniques allow several processors within a multiprocessing system to cooperate efficiently on a single large problem.

61 citations

Patent
31 Jul 2000
TL;DR: In this article, the distributed timestamp floor is defined as the lesser of the earliest timestamp in one of the floor registers in the input queues, and the early timestamp in an output queue for the particular next stage switching element.
Abstract: Methods and apparatus are disclosed for propagating timestamp floors throughout a packet switching system and using the timestamp floors received at a first component of the packet switching system to determine when a packet may be sent from a packet switching system. Each input of a first stage of a packet switching system maintains a floor register which is updated by copying the timestamp from each arriving packet. In some systems, if a packet is not received during a packet time, the timestamp is automatically updated, typically by adding a fixed time value. Periodically, the first stage switching element forwards a timestamp floor to the next stage switching elements. In one implementation, this distributed timestamp floor is the lesser of the earliest timestamp in one of the floor registers in the input queues, and the earliest timestamp in an output queue for the particular next stage switching element. In a buffering component, typically an output interface or possibly a final stage switching element, each output queue maintains a floor register for that output. When a packet in the particular output queue has a timestamp less than or equal to the timestamp floor maintained in the output queue, the packet is allowed to be sent.

61 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20222
20191
20186
201749
201699
2015159