Fast packet switching

About: Fast packet switching is a research topic. Over the lifetime, 5641 publications have been published within this topic receiving 111603 citations.

Apparatus and method for synthesizing management packets for transmission between a network switch and a host controller

Abstract: Management data is supplied to a management agent by a network switch by generating management packets having at least a portion of a received data packet, and management information specifying receive status and network switch response characteristics to the corresponding received data packet. The network switch includes a plurality of network ports, including network traffic ports and one management port for synthesizing the management frame. A network traffic port receiving a data packet generates receive status data specifying the reception status of the received data packet, including the presence of cyclic redundancy check (CRC) errors, frame alignment errors, and receive buffer overflow conditions. The received data packet and received status data are stored in a buffer memory, while switching logic generates port vectors specifying destination output ports and switching logic data specifying the switching logic response to the received data packet. The management port selectively compiles the received status data, the switching logic data, and at least a portion of the received data frame into a management frame, and outputs the synthesized management frame to a management agent according to a media access control (MAC) layer protocol. The generation of management frame provides detailed management information corresponding to characteristics of the received data packet and the corresponding network switch response, independent of the timing at which the data packet was received by the network switch.

Optimized Packet Size Selection in Underwater Wireless Sensor Network Communications

Abstract: In this paper, we investigate the effect of packet size selection on the performance of media access control (MAC) protocols for underwater wireless sensor networks, namely, carrier sense multiple access (CSMA) and the distance-aware collision avoidance protocol (DACAP). Our comparative analysis, conducted via ns-2 simulations, considers scenarios with varying, nonzero bit error rate (BER) and interference. We investigate metrics such as throughput efficiency (the ratio between the delivered bit rate and the offered bit rate), end-to-end packet latency, measured “per meter” to allow for different sizes of deployment areas, and the energy consumed to correctly deliver an information bit to the network collection point. Our results show the dependence of these metrics on the packet size, indicating the existence of an optimum. The optimum packet size is found to depend on the protocol characteristics, the bit rate, and the BER. For each protocol and scenario considered, we determine the packet size that optimizes throughput performance, and we show its effect on the normalized packet latency and on energy consumption.

A packet classification and filter management system

Abstract: Packet classification and fast filter matching have been an important field of research. Several algorithms have been proposed for fast packet classification. We first present a new filter matching scheme called entry-pruned tuple search and discuss its advantages over previously presented algorithms. We then show how this algorithm blends very well with an earlier packet classification algorithm that uses markers and precomputation, to give a blended entry-pruned tuple search with markers and precomputation (EPTSMP). We present performance measurements using several real-life filter databases. For a large real-life database of 1777 filters, our preprocessing times were close to 9 seconds; a lookup takes about 20 memory accesses and the data structure takes about 500 K bytes of memory. Then, we present scenarios that will require various programs/modules to automatically generate and add filters to a filter processing engine. We then consider issues in enabling this. We need policies that govern what filters can be added by different modules. We present our filter policy management architecture. We then show how to support fast filter updates. We present an incremental update algorithm based on maintaining an event list that can be applied to many of the previously presented filter matching schemes which did not support incremental updates. We then describe the event list based incremental update algorithm as it applies to EPTSMP. To stress the generality of the approach, we also describe how our update technique can be used with the packet classification technique based on crossproducing. We conclude with an outline of a hardware implementation of EPTSMP that can handle OC192 rates with 40 byte minimum packet lengths.

System and method for hardware based reassembly of a fragmented packet

Abstract: A system and method for hardware based reassembly of a fragmented packet is shown. The method includes receiving a bandwidth request to transfer a data packet from the data provider. Then, bandwidth is allocated to the data provider, where the allocated bandwidth is less than the requested bandwidth. Next, the present invention receives part of the data packet in the allocated bandwidth from the data provider, where the part of the data packet includes a fragment header, and the fragment header includes a sequence number for the part of the data packet. The part of the data packet is then stored in external memory. Finally, the data packet is reassembled by concatenating in the correct sequence the part of the data packet with other parts of the data packets to create the reassembled data packet.

Systems and methods for a para-virtualized driver in a multi-core virtual packet engine device

Abstract: The present invention is directed towards methods and systems for communicating packets between network interface hardware of a multi-core device and a plurality of virtualized packet processors executed by one or more cores of the multi-core device A first virtualization domain on the device may receive (1201) a packet via the network interface hardware The first virtualization domain may comprise a privileged domain having access to the hardware The system may communicate (1203) the packet to a queue for a virtualized packet processor from a plurality of virtualized packet processors and executing within a second virtualization domain on a core The second virtualization domain may not have direct access to the network interface hardware The packet processor may determine (1205) that the queue includes a difference between a number of packets read from and written to the queue The packet processor may process (1207) the packet from the queue responsive to the determination