scispace - formally typeset
Search or ask a question
Topic

Fault coverage

About: Fault coverage is a research topic. Over the lifetime, 10153 publications have been published within this topic receiving 161933 citations. The topic is also known as: test coverage.


Papers
More filters
Journal ArticleDOI
TL;DR: A new algorithm named adaptive fault diagnosis algorithm for CAN (AFDCAN) is designed for low-cost resource-constrained distributed embedded systems and proves that the algorithm uses a definite and bounded number of testing rounds and messages to complete one diagnostic cycle.
Abstract: A controller area network (CAN)-based distributed system may develop faults at run-time. These faults need to be detected and diagnosed. This paper proposes a new algorithm named adaptive fault diagnosis algorithm for CAN (AFDCAN). It is designed for low-cost resource-constrained distributed embedded systems. The proposed algorithm detects all faulty nodes on the CAN. It allows new node entry and reentry of repaired faulty nodes during a diagnostic cycle. AFDCAN is found to provide high fault tolerance and to ensure reliable communication. It uses single-channel communication deploying the bus-based standard CAN protocol. A hardware implementation of the proposed algorithm has been used to obtain the results. The results show that the proposed algorithm diagnoses all faults in the system. Analysis of the proposed algorithm proves that the algorithm uses a definite and bounded number of testing rounds and messages to complete one diagnostic cycle.

49 citations

Journal ArticleDOI
TL;DR: It is shown that reasonable predictions are possible for functional tests, but that scan tests, due to misuse of theoretical equations, produce significantly worse quality levels than predicted.
Abstract: The use of stuck-at-fault coverage for estimating overall quality levels is examined. Data from a part tested with both functional and scan tests are analyzed and compared with quality predictions generated by three existing theoretical models. It is shown that reasonable predictions are possible for functional tests, but that scan tests, due to misuse of theoretical equations, produce significantly worse quality levels than predicted. >

49 citations

Proceedings ArticleDOI
16 Feb 2004
TL;DR: A new scan architecture is proposed to reduce test time and volume while retaining the original scan input count and promises a substantial reduction in test cost for large circuits.
Abstract: Scan-based designs are widely used to decrease the complexity of the test generation process; nonetheless, they increase test time and volume. A new scan architecture is proposed to reduce test time and volume while retaining the original scan input count. The proposed architecture allows the use of the captured response as a template for the next pattern with only the necessary bits of the captured response being updated while observing the full captured response. The theoretical and experimental analysis promises a substantial reduction in test cost for large circuits.

49 citations

Journal ArticleDOI
TL;DR: A procedure is described for modifying a random primary input sequence to eliminate the appearance of input vectors that synchronize subsets of state variables that may limit the fault coverage that the sequence can obtain.
Abstract: Random test sequences may be used for manufacturing testing as well as for simulation-based design verification. This paper studies one of the reasons for the fact that random primary input sequences achieve very low fault coverage for synchronous sequential circuits. It is shown that a synchronous sequential circuit may have input cubes, or incompletely specified input vectors, that synchronize a subset of its state variables, i.e., it forces them to certain specified values. When an input cube c that synchronizes the subset of state variables S(c) has a small number of specified inputs, the input vectors covered by it may appear often in a random primary input sequence. As a result, the sequence will force the same values on the state variables in S(c) repeatedly. This may limit the fault coverage that the sequence can obtain. To address this issue, a procedure is described for modifying a random primary input sequence to eliminate the appearance of input vectors that synchronize subsets of state variables. It is demonstrated that this procedure has a significant effect on the fault coverage that can be achieved by random primary input sequences.

49 citations

Proceedings ArticleDOI
04 Nov 1998
TL;DR: This paper presents an investigation of both fault and error injection techniques for emulating software faults in an embedded real-time system and results show that the test case had a greater influence than the fault type on the failure symptoms for fault injections.
Abstract: The complex interactions between faults, errors, failures and fault handling mechanisms can be studied via injection experiments. This paper presents an investigation of both fault and error injection techniques for emulating software faults. For evaluation, 1600 software faults and 5400 time-triggered errors were injected into an embedded real-time system. The cost-related results are: (i) the time required to create a fault set for fault injection was about 120 times longer than the time required to create an error set for time-triggered injection, and (ii) the execution time for the time-triggered error injection experiments was four times shorter than for the fault injection experiments. However, the error injection would be only 1.3 times faster if another strategy for fault injection had been used. Furthermore, failure symptom-related results are: (i) the test case had a greater influence than the fault type on the failure symptoms for fault injections, (ii) the error type had a greater influence on the failure symptoms for time-triggered error injections than had the test case, and (iii) the error type had a larger impact on the failure symptoms than the fault type.

49 citations


Network Information
Related Topics (5)
Fault tolerance
26.8K papers, 409.7K citations
85% related
Benchmark (computing)
19.6K papers, 419.1K citations
85% related
Fault detection and isolation
46.1K papers, 641.5K citations
85% related
CMOS
81.3K papers, 1.1M citations
84% related
Logic gate
35.7K papers, 488.3K citations
84% related
Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202360
2022135
202167
202089
2019120
2018151