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Fault coverage

About: Fault coverage is a research topic. Over the lifetime, 10153 publications have been published within this topic receiving 161933 citations. The topic is also known as: test coverage.


Papers
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Proceedings ArticleDOI
01 Feb 2017
TL;DR: This paper identifies three test objectives that aim to increase test suite diversity and uses a search-based algorithm to generate diversified but small test suites, and develops a prediction model to stop test generation when adding test cases is unlikely to improve fault localization.
Abstract: One promising way to improve the accuracy of fault localization based on statistical debugging is to increase diversity among test cases in the underlying test suite. In many practical situations, adding test cases is not a cost-free option because test oracles are developed manually or running test cases is expensive. Hence, we require to have test suites that are both diverse and small to improve debugging. In this paper, we focus on improving fault localization of Simulink models by generating test cases. We identify three test objectives that aim to increase test suite diversity. We use these objectives in a search-based algorithm to generate diversified but small test suites. To further minimize test suite sizes, we develop a prediction model to stop test generation when adding test cases is unlikely to improve fault localization. We evaluate our approach using three industrial subjects. Our results show (1) the three selected test objectives are able to significantly improve the accuracy of fault localization for small test suite sizes, and (2) our prediction model is able to maintain almost the same fault localization accuracy while reducing the average number of newly generated test cases by more than half.

46 citations

Proceedings ArticleDOI
28 Feb 2003
TL;DR: A new software approach providing fault detection and correction capabilities by using software techniques is described, suitable for developing commercial-off-the-shelf processor-based architectures for safety-critical applications.
Abstract: A new software approach providing fault detection and correction capabilities by using software techniques is described. The approach is suitable for developing commercial-off-the-shelf processor-based architectures for safety-critical applications. Data and code duplications are exploited to provide fault detection and correction capabilities. Preliminary results coming from fault injection experiments support the effectiveness of the method.

46 citations

Journal ArticleDOI
TL;DR: A delay test method that allows any sequential-circuit test generation program to produce path delay tests for nonscan circuits is presented, in which a given path is tested by augmenting the netlist model of the circuit with a logic block.
Abstract: A delay test method that allows any sequential-circuit test generation program to produce path delay tests for nonscan circuits is presented. Using this method, a given path is tested by augmenting the netlist model of the circuit with a logic block, in which testing for a certain single stuck-at fault is equivalent to testing for a path delay fault. The test sequence for the stuck-at fault performs all the necessary delay fault test functions: initialization, path activation, and fault propagation. Results on benchmarks are presented for nonscan and scan/hold modes of testing. >

46 citations

Journal ArticleDOI
TL;DR: This article studies the assessment of the reliability of redundant systems with imperfect fault coverage, and proposes efficient algorithms to assess them separately (as k-out-of-n selectors) and how to implement these algorithms into a binary decision diagrams engine.

46 citations

Journal ArticleDOI
01 Mar 1999
TL;DR: In this paper, an accurate fault location algorithm for a single phase-to-earth fault on a two-parallel transmission line is presented, in which the source impedance of the remote end is not involved.
Abstract: An accurate algorithm for fault location of a single phase-to-earth fault on a two-parallel transmission line is presented. The faulted phase circuit and the zero-sequence circuit of the two-parallel line are used as a fault location model, in which the source impedance of the remote end is not involved. The algorithm effectively eliminates the effect of load flow and fault resistance on the accuracy of fault location. It embodies an accurate fault location by measuring only local data and is used in a procedure that provides the automatic determination of faulted types and phases, rather than requiring an engineer to specify them. Simulation results have demonstrated the validity of the algorithm under the condition of a phase-to-earth fault.

46 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202360
2022135
202167
202089
2019120
2018151