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Fault current limiter

About: Fault current limiter is a research topic. Over the lifetime, 4070 publications have been published within this topic receiving 44306 citations.


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Journal ArticleDOI
TL;DR: It can be summarized that SCFCLs are, at present, not commercially available but several successful field tests demonstrated the technical feasibility of SCFCS, and first distribution level applications are expected soon.
Abstract: The application of superconducting fault current limiters (SCFCLs) in power systems is very attractive because SCFCLs offer superior technical performance in comparison to conventional devices to limit fault currents. Negligible impedance at normal conditions, fast and effective current limitation within the first current rise and repetitive operation with fast and automatic recovery are the main attributes for SCFCLs. In recent years there has been a significant progress in the research and development (R&D) of SCFCLs. This paper gives an extended review of different SCFCL concepts, SCFCL applications and the R&D status. Within the first part of this paper the most important SCFCLS and, to a limited extent, non-superconducting fault current limiter (FCL) concepts are explained and compared. The second part reviews interesting SCFCL applications at the distribution and transmission voltage level and the third part shows in detail the R&D status. It can be summarized that SCFCLs are, at present, not commercially available but several successful field tests demonstrated the technical feasibility of SCFCLs. First distribution level applications are expected soon. Considerable economical and technical benefits can be achieved by applying SCFCLs at the distribution and transmission voltage level.

496 citations

Journal ArticleDOI
TL;DR: In this article, an earthed bipole HVDC grid was modeled in PSCAD, and using simulation results, the necessity of di/dt limiting inductors to contain the rise of fault currents within the capacity of current hybrid dc breakers was demonstrated.
Abstract: Different HVDC grid types and the respective protection options are discussed. An earthed bipole HVDC grid was modeled in PSCAD, and using simulation results, the necessity of di/dt limiting inductors to contain the rise of fault currents within the capacity of current hybrid dc breakers is demonstrated. The impact of different inductor sizes on current rise was studied. A fault detection and localization scheme using the rate of change of voltage measured at the line side of the di/dt limiting reactors is proposed. The protection system was modeled and tested under different fault types and locations. The results show that the proposed method of HVDC grid protection is feasible using the current hybrid dc breaker technology. A systematic procedure for setting the necessary protection threshold values is also demonstrated.

390 citations

Proceedings ArticleDOI
06 Oct 1996
TL;DR: Turn-to-turn fault detection is based on the principal that symmetrical motors powered by symmetrical multiphase voltage sources will have no negative sequence currents flowing in the leads as mentioned in this paper.
Abstract: Turn fault detection is based on the principal that symmetrical (unfaulted) motors powered by symmetrical multiphase voltage sources will have no negative sequence currents flowing in the leads. A turn-to-turn fault will break that symmetry and give rise to a negative sequence current which may then be used as a measure of fault severity or to initiate protective action such as a circuit breaker trip. A new way of looking at the effects of turn faults has been developed that improves sensitivity and speed while reducing the probability of misdetection, taking into account voltage balance, load or voltage variation and instrument errors. The method has been implemented on a PC and tested, in real time, on a specially prepared small motor. Reliable detection of one shorted turn out of 648 turns per phase (in a Y connected motor) was demonstrated with the fault indicator becoming fully developed in two cycles of line frequency after initiation of the fault.

283 citations

Journal ArticleDOI
TL;DR: In this article, the change rate of the dc reactor voltage with predefined protection voltage thresholds is proposed to provide fast and accurate dc fault detection in a meshed multiterminal HVDC system.
Abstract: The change rate of the dc reactor voltage with predefined protection voltage thresholds is proposed to provide fast and accurate dc fault detection in a meshed multiterminal HVDC system. This is equivalent to the measurement of the second derivative of the dc current but has better robustness in terms of electromagnetic-interference noise immunization. In addition to fast dc fault detection, the proposed scheme can also accurately discriminate the faulty branch from the healthy ones in a meshed dc network by considering the voltage polarities and amplitudes of the two dc reactors connected to the same converter dc terminal. Fast fault detection leads to lower fault current stresses on dc circuit breakers and converter equipment. The proposed method requires no telecommunication, is independent of power-flow direction, and is robust to fault resistance variation. Simulation of a meshed three-terminal HVDC system demonstrates the effectiveness of the proposed dc fault detection scheme.

273 citations

Journal ArticleDOI
TL;DR: In this article, a new approach is proposed to solve the directional overcurrent relay coordination problem, which arises from installing distributed generation (DG) in looped power delivery systems (PDS).
Abstract: A new approach is proposed to solve the directional overcurrent relay coordination problem, which arises from installing distributed generation (DG) in looped power delivery systems (PDS). This approach involves the implementation of a fault current limiter (FCL) to locally limit the DG fault current, and thus restore the original relay coordination. The proposed restoration approach is carried out without altering the original relay settings or disconnecting DGs from PDSs during fault. Therefore, it is applicable to both the current practice of disconnecting DGs from PDSs, and the emergent trend of keeping DGs in PDSs during fault. The process of selecting FCL impedance type (inductive or resistive) and its minimum value is illustrated. Three scenarios are discussed: no DG, the implementation of DG with FCL and without FCL. Various simulations are carried out for both single- and multi-DG existence, and different DG and fault locations. The obtained results are reported and discussed.

265 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202393
2022158
202181
2020100
2019134
2018126