Showing papers on "Fault detection and isolation published in 1971"
TL;DR: A general approach to fault detection, diagnosis and prognosis in systems describable by mathematical models is outlined, based on System Theory and Statistical Decision Theory.
633 citations
Book•
01 Jan 1971
TL;DR: One that the authors will refer to break the boredom in reading is choosing fault detection in digital circuits as the reading material.
Abstract: Introducing a new hobby for other people may inspire them to join with you. Reading, as one of mutual hobby, is considered as the very easy hobby to do. But, many people are not interested in this hobby. Why? Boring is the reason of why. However, this feel actually can deal with the book and time of you reading. Yeah, one that we will refer to break the boredom in reading is choosing fault detection in digital circuits as the reading material.
178 citations
TL;DR: Two procedures are presented for generating fault detection test sequences for large sequential circuits using an adaptive random procedure and an algorithmic path-sensitizing procedure that employs a three-valued logic system.
Abstract: Two procedures are presented for generating fault detection test sequences for large sequential circuits. In the adaptive random procedure one can achieve a tradeoff between test generation time, length, and percent of circuit tested. An algorithmic path-sensitizing procedure is also presented. Both procedures employ a three-valued logic system. Some experimental results are given.
75 citations
TL;DR: This paper studies the problem of testing one-and two-dimensional arrays of combinational cells under a more restricted set of assumptions: 1) all faults in a cell can be detected by a known set of inputs; and 2) each fault will affect the cell outputs in a known manner.
Abstract: Kautz has studied the problem of testing one-and two-dimensional arrays of combinational cells under the assumptions that all cell inputs must be applied to a cell to test it completely and that a fault in a cell may cause any arbitrary change in its outputs. In this paper we study the same problem under a more restricted set of assumptions: 1) all faults in a cell can be detected by a known set of inputs (usually smaller than the set of all inputs); and 2) each fault will affect the cell outputs in a known manner. Necessary and sufficient conditions for detection of faults in one-dimensional arrays are obtained. A procedure for deriving efficient tests for one-dimensional arrays is presented. Sufficient conditions for the testability of two-dimensional arrays and procedures for constructing tests for some arrays are obtained.
71 citations
TL;DR: In this paper, a digital computer program for the protection of a three-phase transmission line is described, which detects the presence of a disturbance, classifies the fault into one of six fault types and determines the modulus and phase of the impedance of the faulted line.
Abstract: The paper describes a digital computer programme for the protection of a three-phase transmission line. This programme detects the presence of a disturbance, classifies the fault into one of six fault types and, using a method of impedance calculation described in an earlier paper, determines the modulus and phase of the impedance of the faulted line. Accuracy of calculation and reliability of detection are determined from fault data for a model transmission line.
56 citations
TL;DR: It is shown that, under certain conditions, internal fan-out may be present without adversely affecting the detection of multiple faults and this suggests design techniques which lead to readily diagnosable networks.
Abstract: This paper considers the design of diagnosable combinational networks. The diagnosability criterion used here requires that the single fault detection test set for the network also detects all multiple faults. Several recent studies in the area of multiple fault diagnosis are reviewed and the results which are pertinent to this investigation are summarized. It is shown that, under certain conditions, internal fan-out may be present without adversely affecting the detection of multiple faults. These results suggest design techniques which lead to readily diagnosable networks.
32 citations
IBM1
TL;DR: The theory based on an extended Boolean difference definition gives a solution to the problem of automatic generation of test patterns for asynchronous sequential circuits, and a complete program written in Fortran has been tested on various examples.
Abstract: The progress in integrated circuits or large-scale integration (LSI) has increased the difficulty of testing and diagnosis. This paper extends the early results of using Boolean difference to generate test patterns for sequential circuits. The theory described in this paper is based on an extended Boolean difference definition, which gives a solution to the problem of automatic generation of test patterns for asynchronous sequential circuits. A complete program written in Fortran has been tested on various examples. Results are very close to the theoretical expectation.
23 citations
Patent•
08 Apr 1971
TL;DR: In this paper, a fault locating system for electrical circuits consisting of three major components, a fault sensor, a control circuit or channel, and an indicating device, is described, where the fault sensors indicate an abnormal current flow when a fault occurs and transmit the information through the control circuit to the indicating device which in turn displays the information.
Abstract: A fault locating system for electrical circuits consisting of three major components, a fault sensor, a control circuit or channel, and an indicating device. The fault sensors indicate an abnormal current flow when a fault occurs and transmit the information through the control circuit or channel to the indicating device which in turn displays the information. The control circuit connects the fault sensors in series or parallel, and the sensors are oriented in spaced relationship along the cable or electrical circuit being monitored so that fault detection between adjacent sensors is determined by the indicating device. The system may be set up for automatic resetting. The preferred sensor is a magnetic reed switch, and the fault indicator preferably incorporates a circuit with fast response.
16 citations
TL;DR: The problem of fault detection and diagnosis of irredundant multiple-output combinational networks is discussed from a purely structural viewpoint, i.e., with the functions of the network components essentially ignored.
Abstract: The problem of fault detection and diagnosis of irredundant multiple-output combinational networks is discussed from a purely structural viewpoint, i.e., with the functions of the network components essentially ignored. Two structural models for a network are given in the form of labeled directed graphs. Graph theoretic concepts are introduced, and theorems are developed which give necessary conditions and sufficient conditions for the detectability of faults at particular primary outputs based solely on the structure of the network. Procedures are then presented for obtaining the structural diagnostic resolution for both line and logic module faults. Finally, an application, test point placement for increased network maintainability, is considered.
14 citations
TL;DR: Techniques for deriving the minimum length tests are developed for irredundant combinational circuits that contain single faults due to the expansion of the Boolean difference function to form two analytical expressions.
Abstract: Techniques for deriving the minimum length tests are developed for irredundant combinational circuits that contain single faults The development is based on the Boolean difference function The Boolean difference function is expanded to form two analytical expressions that can be used to calculate the tests for any stuck-at-zero and stuck-at-one fault within combinational circuits
14 citations
TL;DR: One-and two-dimensional iterative arrays of identical cells are becoming more important in the design of digital systems using large-scale integrated circuits because of the advantages that they provide in design, fabrication, and testing.
Abstract: One-and two-dimensional iterative arrays of identical cells are becoming more important in the design of digital systems using large-scale integrated circuits because of the advantages that they provide in design, fabrication, and testing. Since arrays containing hundreds or thousands of gates on one chip are now considered possible, the task of finding procedures for the testing of such arrays from their edges is of concern to both the users and the manufactures. The iterative nature of cellular arrays sometimes makes it possible to derive test schedules of reasonable length.
TL;DR: In this paper, an algorithm is presented for designing minimum-expected-cost test trees for detecting and isolating single faults in a system, where each component is assumed to have an a priori probability of failure and each test is associated with a fixed cost.
Abstract: An algorithm is presented for designing minimum-expected-cost test trees for detecting and isolating single faults in a system. A test is specified by the subset of components that must be good for the test to pass, and with each test is associated a fixed cost. Each component is assumed to have an a priori probability of failure. The test tree specifies an adaptive testing procedure that detects a failure and isolates the faulty component while minimizing the expected cost of testing.
TL;DR: An overview of significant accomplishments in fault detection and location, reliability modeling, analysis and architecture, and some comments on software aspects of reliable computation are provided.
Abstract: Fault tolerance has become an important design parameter of fourth generation computing systems. A brief overview of significant accomplishments in fault detection and location, reliability modeling, analysis and architecture, and some comments on software aspects of reliable computation are provided. A few promising areas for future investigation are described.
TL;DR: In this paper, the attenuation and distortion of fault-generated surges on transmission lines when the skin effects of conductor and earth are taken into account are analyzed. But the term which considers the skin effect of the earth has been modified.
Abstract: This paper describes the analytical procedure of determining the attenuation and distortion of fault-generated surges on transmission lines when the skin effects of conductor and earth are taken into account. Herein, the term which considers the skin effect of the earth has been modified. After comparing the results with known approaches, a method, for selecting the circuit parameters of the detection circuit which is used to couple the fault signal from the transmission line to the fault-locating equipment, is given.
19 Apr 1971
TL;DR: In this article, a power conditioning and control system design for a colloid thruster is described, and a block diagram is presented illustrating the overall approach used in providing the requisite outputs and controls.
Abstract: A power conditioning and control system design for a colloid thruster is described. Operating requirements are set forth and a block diagram is presented illustrating the overall approach used in providing the requisite outputs and controls. The basic power circuit is illustrated and overall performance, design characteristics and unique features are discussed. The power processor consists of various circuits which convert 28Vdc power to the levels necessary for operating a one millipound colloid thruster system. The following supplies and functions are provided: . +12.3KVdc needle supply (47 watts) . -1.85KVdc extractor supply . Mass flow controller . Neutralizer heater controller . Thruster temperatgure controller . Command and protection system . Telemetry signal conditioning (for monitoring thruster performance) The discussion includes descriptions of short circuit characteristics, fault protection, efficiency, weight, grounding and fault isolation philosophy and high voltage transformer design.
TL;DR: A procedure is presented for the detection of failures in combinational switching circuits and it is assumed that other methods will be employed to protect the circuit against the effects of transient faults.
Abstract: This paper is concerned with the problem of determining, by means of terminal experiments, whether a given combinational switching circuit operates correctly or is impaired by some malfunction. We shall be primarily concerned with permanent faults due to component failures. It is assumed that other methods will be employed to protect the circuit against the effects of transient faults. A procedure is presented for the detection of failures in combinational switching circuits. The procedure provides minimal sets of tests for two-level circuits and nearly minimal sets of tests for most multilevel circuits.
01 Jan 1971
TL;DR: The solution to the sequential circuit test generation problem is shown to require the ability to generate a test to detect a multiple fault in a combinational circuit.
Abstract: In this paper we consider the problem of generating a fault detection sequence for sequential circuits. We employ a three valued logic system which allows us to handle race and hazard conditions. The main result of this paper is an algorithm for constructing a minimal length input sequence X such that g o (Y o , X ) ≠ g i (Y i , X ), where g o (g i ) is the output of the circuit containing no fault (fault i), starting in state Y o (Y i ), when input sequence X is applied. Both synchronous and asynchronous circuits are considered. Asynchronous circuits are mapped into “equivalent” combinational switching functions by introducing new input and output variables associated with the present and next state of the element. The solution to the sequential circuit test generation problem is shown to require the ability to generate a test to detect a multiple fault in a combinational circuit.
13 Oct 1971
TL;DR: In order to obtain a short fault-detection sequence for a sequential machine, the concept of an easily testable machine is introduced which possesses a minimal-length homogeneous distinguishing sequence and requires no transfer sequences in the fault- Detection sequence.
Abstract: In order to obtain a short fault-detection sequence for a sequential machine, the concept of an easily testable machine is introduced. Such a machine is one which possesses a minimal-length homogeneous distinguishing sequence and requires no transfer sequences in the fault-detection sequence. A design procedure is presented in which an arbitrary machine is embedded in an easily testable machine by adding input lines to the original machine. The procedure also derives a fault-detection sequence for the easily testable machine.
01 May 1971
TL;DR: In this article, computer methods for automatic diagnosis program applied to future manned space vehicles, discussing cost relationship to fault isolation techniques and component reliability are discussed, as well as component reliability.
Abstract: Computer methods for automatic diagnosis program applied to future manned space vehicles, discussing cost relationship to fault isolation techniques and component reliability
TL;DR: In this paper, the authors present a prototype environmental thermal control and life support system for the International Space Station (ISS) considering maintainability, reliability, weight penalties and fault detection and isolation.
Abstract: Space station prototype environmental thermal control and life support systems, considering maintainability, reliability, weight penalties and fault detection and isolation
01 Jan 1971
TL;DR: An alternative technique to computer systemdiagnosis is developed, in which the flow ofsignals with the system is blocked orunblocked bycontrolling a set ofblocking gates.
Abstract: In previous papers13)-(5)theauthors considered theap- plication ofgraphtheory torepresent andanalyze a computer system. Fromsuchanalysis ofthegraph(thus thesystem), we haveshownthat faults canbedetected andlocated bymeansofstrategically placed test points within thesystem. Inthispaperanalternative technique tocomputer systemdiagnosis isdeveloped, inwhichtheflowofsignals withinthesystemisblocked orunblocked bycontrolling a setofblocking gates. A methodofdecid- ingthemaximumdistinguishability (fault isolation) ofa givensystem isgiven. We nextconstruct analgorithm todetermine theoptimal loca- tions ofblocking gatesformaximumdistinguishability offaults within theelements ofthesystemunderarbitrary costconstraints. IndexTerms-Blocking gates, computer diagnosis, distinguishability, graphmodels, graphtheory.
01 Jan 1971
TL;DR: Forderiving them inimumlength tests are developed forirredundant combinational circuits thatcontain single faults, theBoolean difference function is expanded to form twoanalytical expressions that can be used toocalculate the tests for any stuck-at-zero and stuck- at-one fault within combinational circuit.
Abstract: forderiving theminimumlength testsare developedforirredundant combinational circuits thatcontain single faults. Thedevelopment isbasedon theBoolean difference function. TheBoolean difference function isexpanded toformtwoanalytical expressions that can beusedtocalculate thetestsforany stuck-at-zero andstuck-at-one fault within combinational circuits. A map methodisthendeveloped directly fromtheseanalytical expressions. The minimumtestforthecomplete circuit can thenbe taken directly fromthemap. IndexTerms-Error correction, fault detection, fault diagnosis.
05 Jul 1971
TL;DR: In this paper, the authors analyzed the testability of combinational cellular arrays of rectangularly and unilaterally interconnected cells, and the existence of sensitive path condition and covering condition for testability.
Abstract: : The Covering Condition (enabling the application of necessary tests on all cells in an array) and the Existence of Sensitized Path Condition (enabling the propagation of the effect of a faulty cell to some boundary output) for the testability of combinational cellular arrays of rectangularly and unilaterally interconnected cells are analyzed separately in the paper.