Showing papers on "Fault detection and isolation published in 1984"

Fault Tolerance by Design Diversity: Concepts and Experiments

Abstract: ion versus procedural specifications. More experience is needed in wxriting and using true abstract specifications as xvell as \"rapid prototypes.\" What are the consequences of introducing bias in a \"rapid prototype,\" and are the more difficult abstract specifications wxorth the extra effort? This experiment showed that, at the current lexel of dexelopment, a familiar procedural specification, PDL, was easier to use and understand than the more difficult, unfamiliar, abstract specification of OBJ. Our studv of both formal and informal specification languag-es has showxn that none of the languages available is sufficiently automated. Formal specification languaaes, while showing promise for the future, thus far have been Xerv difficult to use and understand and are sex erely limited in poxxer. SPEC. FAU LT

An 0(n 2.5 ) Fault Identification Algorithm for Diagnosable Systems

Abstract: Consider a system composed of n independent processors, each of which tests a subset of the others. It is assumed that at most tp of these processors are permanently faulty and that the outcome of a test is reliable if and only if the processor which performed the test is fault free. Such a system is said to be tp-diagnosable if, given any complete collection of test results, the set of faulty processors can be uniquely identified. In this paper, it is shown that tp-diagnosable systems, due to their robust interconnection structure, possess heretofore unknown graph theoretic properties relative to vertex cover sets and maximum matchings. An 0(n2.5) algorithm is given which exploits these properties to identify the set of faulty processors in a tp-diagnosable system. The algorithm is shown to be correct, complete, not based on any conjecture, and superior to any other known fault identification algorithm for the general class of tp-diagnosable systems.

Critical Path Tracing: An Alternative to Fault Simulation

Abstract: Critical path tracing determines fault detection without explicit. fault simulation. It appears to be a more efficient alternative to conventional methods.

On Random Pattern Test Length

Abstract: The testing of large logic networks with random patterns is examined. Work by previous workers for single faults is extended to a class of multiple fault situations. Not only is the problem of fault detection in the presence of nonmasking multiple faults treated, but the question of distinguishing between them is also examined. It is shown that a test that merely exposes each fault has a high probability of distinguishing between the faults. The relationships between quality, diagnostic resolution, and random pattern test length are developed. The results have application to self-test schemes that use random patterns as stimuli.

Battery control and fault detection method

Abstract: This is a method for control, fault detection, fault isolation, and state-of-health monitoring of batteries and battery arrays. The method consists of measuring all of the battery, cell, or cell group voltages, using statistics to determine a means voltage and a standard deviation voltage, then comparing all of the measured voltages to the mean voltage. If the measured voltage deviates from the mean voltage by an arbitrary amount (number of standard deviations) corrective action can be implemented or an alarm signal given. The measurements need to be made rapidly enough to eliminate battery or cell voltage changes due to state of charge or temperature changes and, in most cases, require a computerized data collection/reduction system. Absolute high and/or low voltage limits can be included to prevent catastrophic events. The concept can be expanded to include similar temperature, pressure and/or battery current measurements in an array.

STAFAN: An Alternative to Fault Simulation

Abstract: STAtistical Fault ANalysis (STAFAN) is proposed as an alternative to fault simulation of digital circuits. In this analysis, controllabilities and observabilities of circuit nodes are defined as probabilities which are estimated from signal statistics obtained from fault-free simulation. Special procedures are developed for dealing with these quantities at fanout nodes and at feedback nodes. The computed probabilities are used to derive unbiased estimates of fault detection probabilities and overall fault coverage for the given set of input vectors. Fault coverage and the undetected fault data obtained from STAFAN for actual circuits are shown to agree favorably with the fault simulator results. The computational complexity added to a fault-free simulator by STAFAN grows only linearly with the number of circuit nodes.

Method and apparatus for testing of electrical interconnection networks

Abstract: A method and apparatus for testing circuit boards using two or a small number of probes for making resistive and radio frequency impedance measurements e.g. capacitive measurements. The combination of resistive and impedance measurements substantially reduces the number of tests required to verify the integrity of a circuit board. The impedance or capacitive "norm" values used in testing the circuit boards can be obtained by operating the system in a learning mode. Analysis of the data provides not only fault detection but also can indicate approximate fault location.

Fault-Tolerant Microprocessor-Based Systems

Abstract: How do computers go wrong and what can we do about it? This tutorial outlines the causes of faults and the basic techniques for dealing with them.

A Gate Level Model for CMOS Combinational Logic Circuits with Application to Fault Detection

Abstract: A procedure to derive gate level equivalent circuits for CMOS combinational logic circuits is given. The procedure leads to a model containing AND, OR and NOT gates. Specifically it does not require memory elements as does an earlier model and also uses fewer gates. It is shown that tests for classical stuck-at-0 and stuck-at-1 faults in the equivalent circuit can be used to detect line stuck-at, stuck-open and stuck-on faults in the modeled CMOS circuit.

Characterization and Testing of Physical Failures in MOS Logic Circuits

Abstract: Studies indicate that the conventional stuck-at fault model is inadequate for modeling the effects of physical failures on MOS circuits. The authors illustrate various types of non-stuck-at behavior, such as indeterminate logic levels, timing errors, and alteration of logic functions. They discuss the generation of tests for detecting the failures in simple and complex MOS circuits. An advantage of testing for failures at the circuit level is that in some cases it may be possible to utilize the structural properties of the circuit to design a much simpler test set compared to one that is based on a gatelevel description of the circuit. The authors outline a methodology whereby functional fault models are derived by studying the effects of physical failures at the circuit level for functional modules.

Multiplexed junction probe for fuel gaging system and system containing same

Abstract: A true mass fuel gaging system for aircraft utilizing multiplexing of tank unit measurements in or adjacent a fuel tank for improved accuracy and fault isolation. The system provides dual equipment channels for redundancy throughout all data processing portions of the system and also uses extensive built-in testing (BIT) routines so that upon detection of a fault an alternative channel can be switched into use. Detected fault locations are displayed in the cockpit with the fuel quantity displays. The system also provides displays of center of gravity measurements derived from fuel mass and location.

Flexibility control of elastic robotic arms and its application to contouring control

Abstract: In this paper, the following three topics are dealt with : (i) vibration control method of flexible robotic arms in precise positioning control to suppress bending vibrations during and after rotation of arms, based on the hybrid model, where an arm is simply modelled as an elastic beam, including aspects of actuator energy input and control performance, (ii) application of elastic arms to contouring control with constant contact force, as an example of force feedback control, (iii) a simple method of reliable control system structure on the basis of the fault tolerant configuration, employing dual processor control system and fault detection system for the safety and the reliability of robotic operations, and finally those experimental results in simplified models, based on the results obtained in the above.

Spectral Fault Signatures for Single Stuck-At Faults in Combinational Networks

Abstract: A method is described for the derivation of fault signatures for the detection of stuck-at faults in single-output combinational networks. These signatures consist of a set of values derived from the network. Any single stuck-at fault causes at least one value to change. The fault signatures developed are a generalization of syndrome testing. The technique is developed in the Rademacher-Walsh spectral domain but is easily implemented using conters and basic gates.

Development and analysis of the Software Implemented Fault-Tolerance (SIFT) computer

Abstract: SIFT (Software Implemented Fault Tolerance) is an experimental, fault-tolerant computer system designed to meet the extreme reliability requirements for safety-critical functions in advanced aircraft. Errors are masked by performing a majority voting operation over the results of identical computations, and faulty processors are removed from service by reassigning computations to the nonfaulty processors. This scheme has been implemented in a special architecture using a set of standard Bendix BDX930 processors, augmented by a special asynchronous-broadcast communication interface that provides direct, processor to processor communication among all processors. Fault isolation is accomplished in hardware; all other fault-tolerance functions, together with scheduling and synchronization are implemented exclusively by executive system software. The system reliability is predicted by a Markov model. Mathematical consistency of the system software with respect to the reliability model has been partially verified, using recently developed tools for machine-aided proof of program correctness.

Early fault detection in an opto-matrix touch input device

Abstract: An opto-matrix touch input device which samples and compares beam readings is taught. Briefly stated, phototransistor readings which sample ambient light as well as light from an associated light emitting diode are compared with preset values. If the readings from the phototransistor are below a certain level, then the phototransistor/LED pair are flagged as bad. If the readings are within preset limits, yet below nominal values, then the phototransistor/LED pair are flagged as indicating a marginal beam. In this manner a trouble report may be generated for the purpose of repair or investigation as well as providing a vehicle for keeping a history of the opto-matrix frame condition and thereby a method of early fault detection.

An HDL Simulation of the Effects of Single Event Upsets on Microprocessor Program Flow

Abstract: Simulation experiments for determining the effects of single event upsets on microprocessor program flow are described. A 16 bit microprocessor is modeled using a hardware description language. Using pseudorandom selection of event time and effected flip-flop, SEU's are injected into the microprocessor model. Upset detectors are modeled along with the microprocessor for determination of fault coverage of several candidate fault detection techniques.

Meta-level control through fault detection and diagnosis

Abstract: Control strategies in most complex problem-solving systems, though highly parameterized, are not adaptive to the characteristics of the particular task being solved. If the characteristics of the task are atypical, a fixed control strategy may cause incorrect or inefficient processing. We present an approach for adapting the control strategy by introducing a meta-level control component into the problem-solving architecture. This meta-level control component is based on the paradigm of Fault Detection/Diagnosis. Our presentation will concentrate on modeling the problem-solving system and on the inference techniques necessary to use this model for diagnosis. We feel that meta-level control based on the Fault Detection/Diagnosis paradigm represents a new approach to introducing more sophisticated control into a problem-solving system.

A Fault Detection and Isolation Methodology Theory and Application

Abstract: The paper presents the theoretical development and practical applications of a fault detection and isolation (PDI) methodology which exploits all available sources of redundant information. By concurrent checking of relative consistencies among all redundant measurements, the most consistent and inconsistent subsets are identified for measurement estimation and fault isolation, respectively. The FDI algorithm is particularly suitable for real-time applications using commercially available microcomputers and has been tested on-line in operating nuclear reactors.

Adaptive Control of Systems Subject to Large Parameter Changes

Abstract: A method to handle large parameter changes in adaptive control is described. A fault detection procedure is introduced, and the gain in the estimator is increased whenever a fault occurs. A new fault detection procedure is presented, which fulfils the requirements of this special application. One of these requirements is, that the noise variance is not assumed to be constant. The fault detection method can also be applied to ordinary fault detection problems.

New England Electric's 30 Years of Experience with Resonant Neutral Grounding of Unit-Connected Generators

Abstract: Since 1951, all unit-connected generators of New England Electric have been grounded using a ground fault neutralizer. The total experience to date, which amounts to over 72 million kVA years, indicates that this grounding method is reliable, effective, and superior to other commonly used techniques. In addition to high sensitivity of ground fault detection, which is illustrated by an actual experience, the ground fault neutralizer also greatly reduces the residual current at the fault location. The claim has been made that the fault current is small enough so as to practically eliminate the danger of iron damage, thus permitting the continued operation of the generator until an orderly shutdown can be arranged. This claim has now been substantiated by experience. A generator winding fault on a 75MVA generator is described, which was allowed to persist for 89 minutes before clearing, with no detectable iron burning in evidence and with very little loss of copper.

Method of detecting abnormality in input and output units

Abstract: A method of detecting abnormalities through fault diagnosis applied to at least one input unit or output unit by an electronic control unit to which the input unit or output unit is connected. The method comprises the steps of subjecting the input unit or output unit to fault diagnosis, storing information, which is indicative of abnormality, in a first storage area of the electronic control unit when the abnormality is detected as the result of the diagnosis, storing information, which is indicative of the abnormality, in a second storage area of the electronic control unit when the abnormality is detected as the result of subjecting the input or output unit to fault diagnosis again, and rendering a decision to the effect that the input unit or output unit which has undergone the fault detection operation is abnormal when it is determined that the contents stored in the first and second storage areas are identical.

System for detecting a program execution fault

Abstract: A system for detecting a fault in the program execution of a programmed digital signal processing system is disclosed. The fault detection system may include a plurality of monitoring devices for monitoring the execution of a plurality of program portions of the programmed processor and for generating a fault signal in response to a detected faulty program execution condition. Logic circuitry is included for restarting of suspending any fault signal generation rendered by the plurality of monitoring devices. Further included is circuitry for limiting the number of automatic restarts to a predetermined number which avoids continuous cycling between fault signal generation and reset. Still further, the predetermined number of fault generations must occur within a given time interval which may be set and from time to time changed by the program instructions, for example. A fault indication or alarm is not provided until the predetermined number of fault signal generations has occurred within the predetermined time interval. While in the alarm state, the monitoring devices are inhibited, rendering the fault detection system inoperative, and the program execution of the programmed processor is sustained in an initial state. The fault detection system further includes a power supply monitor which disables the logic circuitry when the power supply of the program processor is below a predetermined level to render the fault detection system inoperative and to sustain the program execution at its initial state.

Robust Fault Detection: The Effect of Model Error

Abstract: This paper examines the issues involved in robust fault detection in the presence of system model error. The underlying theory presented is analogous to concepts in robust control design, e.g., [1]-[5], which require the introduction of a metric or norm measure of signals defined on an appropriate function space.

Fault protection system for power supplies that use ferro-resonant transformers

Abstract: A fault detection system for use in power supply systems using ferro-resonant transformers is presented. Current sensing means are used to sense the current flowing in the ferro-resonant circuit associated with operation of the ferro-resonant transformer. A fault detection circuit, powered by its own power supply connected to the primary source of power, monitors the sensed current and signals any significant change therein. A fault condition in any of the secondary circuits of the transformer causes the ferro-resonant current to change, and upon sensing this change, the fault detection circuit disconnects the primary of the transformer from the source of power.