Showing papers on "Fault indicator published in 1978"

Fault indicator operable from a remote excitation source through a uniformly distributed impedance cable

Abstract: A fault indicator for indicating the occurrence of a fault current in an electrical conductor includes a reset circuit operable from an external electrical excitation source. The external source is connected to the reset circuit by a cable formed from a flexible electrically insulating tubing segment within the lumen of which an electrically conductive coating is disposed. The resulting high impedance electrical interconnection reduces the danger of electrical shock from inadvertant contact with the cable or the fault indicator circuitry, and precludes the source from being adversely affected should the cable become shorted to ground.

Deductive Fault Simulation with Functional Blocks

Abstract: This paper presents a method of propagating the effects of faults through functional blocks using the deductive (fault list) technique. An extension of the method is shown to be effective for simulating internal faults in functional blocks. The techniques presented here have been used for implementing the functional simulation capability in the Logic Analysis for Maintenance Planning (LAMP) System at Bell Laboratories.

Method and apparatus for determining the direction of a fault on a power transmission line

Abstract: Directional relay and method for monitoring at least one A.C. power transmission line to determine the position of a fault on the line with respect to a measurement location thereon. According to a representative embodiment characteristic parameters, typically the respective phases, of a first signal representing the difference of complex voltages after and before the occurrence of the fault and of a second signal representing the line current after the occurrence of the fault, are compared, the result of the comparison providing the desired indication.

Generation of Optimal Transition Count Tests

Abstract: The problem of generating minimum-length transition count (TC) tests is examined for combinational logic circuits whose behavior can be defined by an n-row fault table. Methods are presented for generating TC tests of length n+2 and 2n-1 for fault detection and fault location, respectively. It is shown that these tests are optimal with respect to the class of n-row fault tables in the sense that there exist n-row fault tables that cannot be covered by shorter TC tests. The practical significance of these tests is discussed.

Electronic motor fault detector means

Abstract: The voltage that occurs across the run capacitor of a permanently split capacitor type motor when the motor is in operation is quite high compared to the voltage that is present if the motor is stalled. These different voltage conditions are sensed through the use of a voltage pickoff to control an optical type isolation circuit which in turn controls a switch means to energize a fault indicator.

People protecting ground fault circuit breaker utilizing waveform characteristics

Abstract: A ground fault circuit breaker is provided which includes means for sensing ground fault current and for analyzing the waveform of the ground fault current. An operating mechanism automatically separates the contacts of the circuit breaker upon detection of ground fault current waveforms corresponding to the waveform of current passing through human skin. In a preferred embodiment, means are provided to synchronously detect the third harmonic component of ground fault current using phase and amplitude information to determine the presence of a ground fault path through human skin. Alternatively, means are provided to sense peak and average values of ground fault current and to trip the breaker whenever the ratio of peak to average ground fault current exceeds a predetermined level. In another alternative, the slope of the ground fault current at zero crossing is detected and compared to the ground fault current peaks. Whenever the ratio of peak current to zero crossing slope exceeds a predetermined level, the mechanism of the breaker is tripped.

Fault indicator case and mount

Abstract: The fault indicator case has a concave mounting surface along which extend two legs having at their ends mounted jaws with serrated surfaces for engaging cable from below. Camming surfaces on the jaws facilitate placing the case on the cable. A shield can be fastened to the case after having been mounted.

Fault detection in sequential machines with increased fault coverage

Abstract: This letter develops an approach for fault detection and checking sequence design of sequential machines based on the principle of machine modification through augmentation of extra input and extra outputs, taking into consideration the case where faults occurring in a machine may cause an increase in its number of states.

On-chip monitors for system fault isolation

Abstract: On-chip circuits providing automatic, remote, and complete monitoring of all interconnects exterior to the die will be covered in this report. Proper monitor/logic sensitivity ratio assures detection of incipient faults and simplifies device testing, monitoring of on-chip functionality and final fault isolation.

Fault indicator for motor vehicle lights - uses voltage across series inductor to indicate open circuit light

Abstract: The fault indicator, for indicating a faulty light in a motor vehicle, has an inductor (3) in series between the light (1) and its switch (2) across the DC supply. An AC source (4) is connected via a resistor (5) across the light. When the light is working correctly the voltage across the inductor is very small. If the light becomes open circuit the voltage across the inductor rises and is large enough to be detected as a fault signal.

Logout system of memory controller

Abstract: PURPOSE: To enable a memory controller in a system operation state to collect data when a temporarily fault occurs by controlling the freeze release of the access acception of the memory controller, the logout of the internal state at fault time and storage to an external memory through a fault processor. CONSTITUTION: When fault generating circuit 21 of memory controller 1 detects a fault such as address and parity errors, FF22 is set to close AND gates 16 and 17 through OR circuit 20, thereby freezing the access acception of address acception circuit 18 while the set output of fault detection FF22 is supplied to the fault processor. Consequently, the fault processor reads out the states of acception detection FF19 of circuit 1 and a register and stores them in an external memory. Then, the fault processor resets FF22 to release the acception freeze of access of circuit 1. Those operations are carried out automatically and when a temporarily fault occurs, status data at the time of the fault of the memory controller can be collected while the operation of a system including CPU is carried on. COPYRIGHT: (C)1980,JPO&Japio

Sequential fault indicator

Abstract: PURPOSE:Sequential fault indicator with reduced size, improved response and can indicate instantaneous abnormality without requiring particular power source.

Fault point decision system

Abstract: PURPOSE: To secure an accurate decision for the fault point of the transmission line based on the observation quantity of the self-end and the known value by deciding the virtual fault point where the phase coincidence is secured between the voltage of the virtual fault point and the current of the calculated fault point. CONSTITUTION: Fault point current ID of the self-end is decided by the current of before and after occurrence of the fault of the transmission line, and then fault point current IF is calculated based on current ID and phase θ. On the other hand, voltage VD of the virtual fault point featuring distance X is decided based on self-end voltage V, current I, the line constant and other factors, and then the virtual fault point where the phase has an agreement between voltage VD and current IF is selected. Thus distance X from the self-end of the virtual fault point coincides with the fault point. As a result, the fault point of the transmission line can be decided accurately at the self-end based on the observation quantity of the self-end and the known value. COPYRIGHT: (C)1980,JPO&Japio

Serial-indication fault display system for vehicles

Abstract: A fault indication signal from a plurality of sensors is used to advance a rotary switch to hunt in search of the terminal at which the signal appears. The terminals of the switch are associated with the corresponding visual fault indications recorded on an endless film mounted on a transport mechanism that is driven in unison with the rotary switch. Upon the occurrence of a second fault, the switch is again triggered to advance in search of the terminal where the second signal appears for successive indication of the second fault location. The switch is automatically stepped to a terminal where a signal indicating the presence of more than one fault appears for permanent indication of the number of such faults. The system can be restarted manually to provide successive indications of the first and second faults to facilitate troubleshooting.

MNFP — a new technique for efficient digital fault simulation

Abstract: Since digital fault simulation is a costly process, it is important to use very efficient techniques to perform this function. To this end, this study suggests that parallel fault simulators couldbe implemented with a new fault-simulation technique, called MNFP (multiple number of faults per pass). The technique intends to partition the total fault set into a number of fault groups which can be simulated as multiple faults. The fault group mentioned above should be structured such that ‘a test that detects any single fault in the group will detect the group, and conversely, a test that detects a group will detect at least one single fault in the group’. Thus, an initial attempt is made to detect a faulty group, then the single faults inside the group are located. During the required fault-partitioning process, such erratic phenomena as fault-masking effects and fictitious multiple-fault generation must be eliminated for the fault groups to have the required property. Two approaches to fault partitioning are made for this technique of fault simulation: PFP (probabilistic fault partitioning) and MFP (modular fault partitioning). Significant savings in simulation time are expected to be realized from the MNFP technique of fault simulation.

Fault Tree Analysis of an Auxillary Feedwater System

Abstract: A fault tree analysis is reported of an auxiliary feedwater system intended for Westinghouse 4-loop reactors. The analysis is structured to find the comparative reliability of design variants and the comparative importance of failure modes, rather than to generate an absolute risk assessment. Many insights useful in design and operation are obtained.

Performance of the Neutralizing Transformer from a Volt-Time Area Approach

Abstract: A fault to ground on a power transmission facility serving a power station can produce a rise in potential of the power station ground with respect to remote earth, which is due to fault current returning to the power system neutral through the earth and station grounding structure. The magnitude of the ground potential rise ( GPR) is a function of the transient characteristics of the power system during a fault, together with available fault current and power station ground resistance with respect to reference ground. Ground potential rise may range fromii negligible voltage to many thousands of volts. The GPR waveforn consists of a 60-Hz steady-state component and, depending upon the phase angle of the transmission line voltage at fault initiation, may be accompanied by an asymmetrical, exponentially decaying component.