Showing papers on "Fault indicator published in 1985"

Model for Delay Faults Based Upon Paths

Abstract: Delay testing of combinational logic in a clocked environment is analyzed. A model based upon paths is introduced for delay faults. Any path with a total delay exceeding the clock interval is called a "path fault." This is a global delay fault model because it is associated with an entire path. The more familiar slow-to-rise or slow-to-fall gate delay fault, on the other hand, is a local fault model. A procedure is described which identifies paths which are tested for path faults by a set of patterns. It does not involve delay simulation. The paths so identified are tested for path faults independent of the delays of any individual gate of the network.

An Accurate Fault Locator With Compensation For Apparent Reactance In The Fault Resistance Resulting From Remore-End Infeed

Abstract: A microprocessor based fault locator is described, which uses novel compensation techniques to improve accuracy. It displays the distance to the fault in percent of transmission line length, for facilitating repair and restoration following a permanent fault. Also, it pinpoints weak spots following transient faults.

Statistical Fault Analysis

Abstract: Statistical Fault Analysis, or Stafan, is proposed as an alternative to fault simulation of digital circuits. This method defines Controllabilities and observabilities of circuit nodes as probabilities estimated from signal statistics of fault-free simulation. Special Procedures deal with these quantities at fanout and feedback nodes. The computed probabilities are used to derive unbiased estimates of fault detection probabilities and overall fault coverage for the given set of input vectors. Among Stafan's advantages, fault coverage and the undetected fault data obtained for actual circuits are shown to agree within five percent of fault simulator results, yet CPU time and memory demands fall far short of those required in fault simulation. The Computational complexity added to a fault-free simulator by Stafan grows only linearly with the number of circuit nodes.

A Practical Approach to Fault Simulation and Test Generation for Bridging Faults

Abstract: In this correspondence we prepent a practical approach to fault simulation and test generation for bridging faults in combinational circuits. Unlike previous work, we consider Unrestricted bridging faults, including those that introduce feedback. Our approach is based on extending fault simulation and test generation for stuck faults to cover bridging faults as well. We consider combinational testing only, and show that adequate bridging fault coverage can be obtained in most cases without using sequences of vectors.

Injector driver fault detect and protection device

Abstract: An injector driver fault detect and protection device for use with fuel injection systems that include at least one solenoid (17) for controlling a fuel injection valve, control means for providing a control signal, injector driver means (14) responsive to the control signal for providing a drive signal, and a current control switch (16) being responsive to the drive signal for selectively closing and opening a power line that includes the solenoid (17) to thereby control the fuel injection valve. The device includes a fault detect and protection unit that receives current sense information regarding the flow of current through the solenoid (17), control signals from the control unit (13), and engine rotation data in the form of CAM degrees from a CAM position sense unit (19). Based upon this information, the fault detect and protection unit (11) can provide a fault protect signal to a fault control switch (12) to open circuit the solenoid (17) under specific fault conditions, and to provide a fault data signal under other fault conditions, as appropriate.

Performance Evaluation of FMOSSIM, a Concurrent Switch-Level Fault Simulator

Abstract: This paper presents measurements obtained while performing fault simulations of MOS circuits modeled at the switch level. In this model the transistor structure of the circuit is represented explicitly as a network of charge storage nodes connected by bidirectional transistor switches. Since the logic model of the simulator closely matches the actual structure of MOS circuits, such faults as stuck-open and closed transistors as well as short and open-circuited wires can be simulated. By using concurrent simulation techniques, we obtain a performance level comparable to fault simulators using logic gate models. Our measurements indicate that fault simulation times grow as the product of the circuit size and number of patterns, assuming the number of faults to be simulated is proportional to the circuit size. However, fault simulation times depend strongly on the rate at which the test patterns detect the faults.

Ground fault module for ground fault circuit breaker

Abstract: A ground fault module is designed for ease of assembly within a ground fault circuit breaker. The module houses the pre-assembled signal processor module, which contains the ground fault circuit interruption logic, along with the mechanical components required for translating the trip initiating response from the signal processor solenoid to the circuit breaker operating mechanism. The ground fault test button and related circuitry are also supported within the ground fault module.

Protective relaying apparatus for providing fault-resistance correction

Abstract: Protective relay apparatus for providing a compensated fault impedance measurement for the determination of a better estimate of fault location along a transmission line is disclosed. In a power system network including local and remote generating sources disposed at respective ends of a transmission line segment of the transmission line, the protective relay apparatus is disposed at the local end of the line segment to measure the fault impedance for use in determining fault location. However, load flow conditions rendered by the generating sources interact with a fault which contributes resistance substantially to the fault impedance of the transmission line to cause an erroneous component in the fault impedance measurement rendering the determination of an erroneous fault location. The protective apparatus disclosed generates a signal as a measure of this erroneous component and compensates the fault impedance measurement as a function of the erroneous component signal, a predetermined impedance characteristic of the transmission line segment, and the fault impedance measurement to provide the compensated fault impedance measurement.

Alternator system multifunction fault detector

Abstract: Three possible types of "faults" may be detected in the ignition system of a vehicle, using simple combinational logic to provide an essentially error-free activation of an indicator (58) when a true fault is present. "Fault" signals which mean non-rotation of the alternator, broken cables or short circuits and the like are distinguished from transient and less significant conditions. The latter conditions are prevented from activating the indicator. A single indicator lamp (58) serves to alert the user to a serious fault requiring service.

Fault diagnosis device for automatic transmission

Abstract: PURPOSE: To check the fault again upon engine start and to execute normal speedchange control if no fault is found by disabling backup control through backup control disabling means until the fault is found again. CONSTITUTION: Fault in turbine rotation sensor 103, throttle opening sensor 104 and 1stW4th solenoids 71W74 is checked through fault detecting means 112 in fault diagnosis device 110. Upon detection of fault, an information indicating the fault point is stored in non-volatile memory means 113 to provide backup control signals (e), (f) from backup control means 115 to 1stW4th solenoids 71W74 thus to execute backup control. Immediately after turning on of ignition switch, backup control disabling means 114 is functioned to disable backup control through the control means 115 until the fault is detected again through fault detecting means 112. COPYRIGHT: (C)1986,JPO&Japio

A fault protection system for a line printer

Abstract: A fault protection system for impression devices of a printer detects fault current in the impression devices during non-print operation, checks the impression devices individually to determine the location of the fault and then disconnects the impression devices from the power supply. The fault protection system also includes means for recording the fault location data in a storage means which can be called out for later use in repairing the impression devices.

Fault distance locator

Abstract: of EP0013104For locating the distance of a fault on a power supply line from a substation in an electricity reticulation system, primarily conversion means, (PR) are used, adapted to provide DC signals whose magnitudes are proportional to the AC values of current and voltage related to the fault and computing (D) means adapted to compute a quotient of those DC signals. The computing means also is adapted to apply an earth fault compensation factor and a line angle correction factor to the DC quotient and to thus provide a measure of the distance to the fault. A sample-and-hold means (S-H) is included, adapted to relay a value of the quotient to provide a measure of distance to fault only after a predetermined time during which transient effects may subside to some extent. An analogue to digital convertor (A-D) relays the signal to a printer (P) to provide a record of fault history. This locator is thus adapted to solve the problem of excessive technical complexity of certain existing apparatuses and so provide a less costly device which can be installed in larger numbers in a reticulation system for more comprehensive monitoring.

Fault point locating system for power transmission system

Abstract: PURPOSE: To reduce the effect of errors at a fault point resistance and a locating device input part by finding the fault point resistance of each circuit according to a specific locating principle expression and extracting the locating value of a circuit which has small fault point resistance as a fault point locating value CONSTITUTION: Respective phase voltage Va, Vb, and Vc, respective phase currents Ia 1 , Ib 1 and Ic 1 , and Ia 2 , Ib 2 , and Ic 2 , and zero-phase currents 3Io 1 and 3Io 2 at terminals of the number one 1L and number two line 2L are detected by a transformer PT and current transformers CT 1 and CT 2 for an instrument Those detection signals are fetched by the 1st circuit D 5 of the locating device D 3 as constant-period sampling data The 2nd circuit D 6 generates data on self-impedance and mutual impedance per unit length of the power transmission lines 1L and 2L Then, the fault point resistance and fault point distance are derived from the 3rd and the 4th circuits according to the specific locating principle expression, the 5th circuit D 8 extracts the locating value of a circuit with small fault point resistance as a fault point locating value, and the 6th circuit D 9 displays the extracted fault point locating value COPYRIGHT: (C)1987,JPO&Japio

Safety device of arc welding power source

Abstract: PURPOSE:To accounce that a case is not grounded and to assure sure grounding by providing a device for detecting leakage current to the earth circuit of a case and actuating at last one of an output inhibiting device of a welding power source and an alarm device using a fault indicator lamp when no leakage current is detected. CONSTITUTION:Even if a power source 1 is thrown while an earth terminal 16 is not connected to an earth 17, normal leakage current does not flow to an earth cable 15 and consequently a transistor 22 does not turn on and a relay 23 does not operate and therefore a contact 23a is off and a contact 23b is on. The start signal from a torch switch 11 is not fed to a control circuit 13 in this state and therefore the output of an inverter circuit 5 is not generated and welding cannot be performed. A fault indicator lamp 24 is at the same time lighted to announce to the user that the case in not grounded. The sure grounding is thus accomplished.

Multi-channel fault monitor using quick-acting interfaces to operate slow-acting indicators

Abstract: An indicator for monitoring a channel fault is located in each channel of a multichannel system. An interface is located between each indicator and channel being monitored to assure a response of the indicator under circumstances that a fault signal in the channel could not have otherwise activated the indicator.

Fault diagnosis of SPC switching systems based on structure and signalling

Abstract: The paper presents a new approach to fault diagnosis of stored program controlled (SPC) switching systems. It uses the functional behaviour of SPC systems to model faults. This method uses circuit, structure descriptions and call processing programs to generate automatically the data required for fault analysis and avoids fault simulation.

Fault indicator with bidirectional indicator winding

Abstract: FAULT INDICATOR WITH BIDIRECTIONAL INDICATOR WINDING Edmund O. Schweitzer, Jr. A fault indicator for indicating the occurrence of a fault current in a power distribution system includes a test-point-mounted circuit module and a remotely-mounted indicator module. The indicator module incorporates a bidirectional magnetic winding and a magnetic indicating element having a magnetic state conditioned by energization of the winding. Upon the occurrence of a fault in the power system trip circuitry within the circuit module energizes the winding with current in one direction to condition the indicator element to a fault-indicating magnetic state. Upon restoration of current in the system, reset circuitry within the circuit module energizes the winding with current in the opposite direction to condition the indicator to a reset-indicating magnetic state. The use of currents of opposite direction in a single magnetic winding provides greater flux density at the indicating element, and enables the indicator module to be connected to the circuit module by means of a two conductor cable. Alternate embodiments of the invention, utilizing visual-type indicator modules and current-reset modules, are also shown.

Effect of Prefault Load on Field Overvoltages in Rectifier-Excited Synchrondus Machine During Sequential 3-Phase Fault

Abstract: In a Synchronous machine with rectifier excitation, large reverse voltages may be induced across the field during a transient condition when the field current tends to flow in the reverse direction and is blocked by rectifiers. Earlier investigation on an initially unloaded machine showed that a sequential 3-phase fault, in which a line to line fault develops into a 3-phase fault after a short time, produces field overvoltages whose magnitudes may be comparable to those due to line to line fault. In this paper, analysis has been carried out to estimate the magnitude of the field overvoltage during a sequential 3-phase fault when the machine is assumed to operate on a prefault load. Numerical results show that a sequential 3-phase fault on a machine having prefault loads may be much more severe compared to a line to line fault from the field overvoltage point of view. The results also indicate that very large field overvoltages may be produced during a sequential 3-phase fault on a salient pole ma...