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Showing papers on "Fault indicator published in 1997"


Journal ArticleDOI
TL;DR: In this paper, a fault location and diagnosis scheme is proposed to accurately identify the location of a fault upon its occurrence, based on the integration of information available from disturbance recording devices with knowledge contained in a distribution feeder database.
Abstract: This paper presents new techniques for locating and diagnosing faults on electric power distribution feeders. The proposed fault location and diagnosis scheme is capable of accurately identifying the location of a fault upon its occurrence, based on the integration of information available from disturbance recording devices with knowledge contained in a distribution feeder database. The developed fault location and diagnosis system can also be applied to the investigation of temporary faults that may not result in a blown fuse. The proposed fault location algorithm is based on the steady-state analysis of the faulted distribution network. To deal with the uncertainties inherent in the system modeling and the phasor estimation, the fault location algorithm has been adapted to estimate fault regions based on probabilistic modeling and analysis. Since the distribution feeder is a radial network, multiple possibilities of fault locations could be computed with measurements available only at the substation. To identify the actual fault location, a fault diagnosis algorithm has been developed to prune down and rank the possible fault locations by integrating the available pieces of evidence. Testing of the developed fault location and diagnosis system using field data has demonstrated its potential for practical use.

291 citations


Patent
31 Dec 1997
TL;DR: In this paper, the fault location and fault resistance of a fault are calculated by taking into account the current flowing through the distribution network as well as the effect of fault impedance, and fault location m is then calculated based upon the calculated fault location.
Abstract: Both fault location and fault resistance of a fault are calculated by the present method and system. The method and system take into account the effects of fault resistance and load flow, thereby more accurately calculating fault resistance by taking into consideration the current flowing through the distribution network as well as the effect of fault impedance. A direct method calculates fault location and fault resistance directly while an iterative fashion method utilizes simpler calculations in an iterative fashion which first assumes that the phase angle of the current distribution factor Ds is zero, calculates an estimate of fault location utilizing this assumption, and then iteratively calculates a new value of the phase angle βs of the current distribution factor Ds and fault location m until a sufficiently accurate determination of fault location is ascertained. Fault resistance is then calculated based upon the calculated fault location. The techniques are equally applicable to a three-phase system once fault type is identified.

145 citations


Journal ArticleDOI
Chung-Sheng Li1, Rajiv Ramaswami2
TL;DR: Investigation of fault surveillance and fault identification mechanisms for a transparent optical network in which data travels optically from the source node to the destination node without going through any optical-to-electrical (O/E) or electrical- to-optical (E/O) conversion.
Abstract: Network fault identification is an important network management function, which is closely related to fault management and has an impact on other network management functions such as configuration management, and performance management. This paper investigates fault surveillance and fault identification mechanisms for a transparent optical network in which data travels optically from the source node to the destination node without going through any optical-to-electrical (O/E) or electrical-to-optical (E/O) conversion. Mechanisms and algorithms are proposed to detect and isolate faults such as fiber cuts, laser, receiver, or router failures. These mechanisms allow nonintrusive device monitoring without requiring any prior knowledge of the actual protocols being used in the data transmission.

143 citations


Patent
19 Dec 1997
TL;DR: In this paper, an arc fault detector comprised as a stand alone unit and in combination with a ground fault circuit interrupter (GFCI) functions to provide protection from potentially dangerous arc fault conditions.
Abstract: An arc fault detector comprised as a stand alone unit and in combination with a ground fault circuit interrupter (GFCI) functions to provide protection from potentially dangerous arc fault conditions. When combined with a GFCI, the combination arc fault/ground fault circuit interrupter (AFCI/GFCI) provides protection from both arc fault and ground fault conditions. A single transformer is used to detect faults between neutral and ground and arc faults. An impedance splits the current flow into two portions so as to generate differential current proportional to the current flowing through the conductors. An early arcing detector periodically tests the AC line for high impedance between the device and a main breaker panel. The AFCI/GFCI device detects both AC line frequencies and high frequencies associated with arcing. Both average and instantaneous values of both AC line frequency and high frequency arcing signals are processed to generate an arc fault signal. The device allows the arc detector to differentiate between destructive high level arcing and low level arcing such as generated by typical household appliances and equipment. This serves to decrease the occurrence of false tripping. The device also includes a timer circuit, which permits the user to temporarily disable the arc detector, and includes communication means to permit the device to communicate the occurrence and location of the arc fault to a centralized monitoring station.

117 citations


Journal ArticleDOI
TL;DR: In this paper, an expert system using fuzzy relations to deal with uncertainties imposed on fault section diagnoses of power systems is proposed, where the authors build sagittal diagrams which represent the fuzzy relations for power systems, and diagnose fault sections using the sagittal diagram.
Abstract: This paper proposes an expert system using fuzzy relations to deal with uncertainties imposed on fault section diagnoses of power systems. The authors build sagittal diagrams which represent the fuzzy relations for power systems, and diagnose fault sections using the sagittal diagrams. Next, they examine the malfunction or false alarms of relays and circuit breakers based on the alarm information and the estimated fault section. The proposed system provides the fault section candidates in terms of the degree of membership and the malfunction or false alarm. An operator monitors these candidates and is able to diagnose the fault section, coping with uncertainties. Experimental studies for real power systems reveal the usefulness of the proposed technique to diagnose faults that have uncertainty.

95 citations


Patent
18 Mar 1997
TL;DR: A method for recovering from software fault in a fault tolerant computing system includes a system status recording step to record the system status at the occurrence of the above software fault when the above fault is judged to be a software fault by a fault identifying step, a software defect diagnosing step to diagnose the fault factor of the software fault, a defect recovery action determining step to determine a recovery action to the above defect, and a fault recovery action executing step to execute the recovery action after roll back as mentioned in this paper.
Abstract: A method for recovering from software fault in a fault tolerant computing system includes a system status recording step to record the system status at the occurrence of the above software fault when the above fault is judged to be a software fault by a fault identifying step, a software fault factor diagnosing step to diagnose the fault factor of the above software fault, a software fault recovery action determining step to determine a recovery action to the above fault factor of the above software fault, and a software fault recovery action executing step to execute the recovery action the above fault factor of the above software fault determined by the above software fault recovery action determining step after roll back.

71 citations


31 Dec 1997
TL;DR: In this paper, the authors used a two-stage artificial neural network for fault diagnosis in a simulated air-handling unit, where the first stage identifies the subsystem in which a fault occurs and the second stage detects the specific cause of a fault at the subsystem level.
Abstract: The presence of faults and the influence they have on system operation is a real concern in the heating, ventilating, and air-conditioning (HVAC) community. A fault can be defined as an inadmissible or unacceptable property of a system or a component. Unless corrected, faults can lead to increased energy use, shorter equipment life, and uncomfortable and/or unhealthy conditions for building occupants. This paper describes the use of a two-stage artificial neural network for fault diagnosis in a simulated air-handling unit. The stage one neural network is trained to identify the subsystem in which a fault occurs. The stage two neural network is trained to diagnose the specific cause of a fault at the subsystem level. Regression equations for the supply and mixed-air temperatures are obtained from simulation data and are used to compute input parameters to the neutral networks. Simulation results are presented that demonstrate that, after a successful diagnosis of a supply air temperature sensor fault, the recovered estimate of the supply air temperature obtained from the regression equation can be used in a feedback control loop to bring the supply air temperature back to the setpoint value. Results are also presented that illustrate the evolution of the diagnosismore » of the two-stage artificial neural network from normal operation to various fault modes of operation.« less

68 citations


01 Jan 1997
TL;DR: In this article, an expert system for diagnosis of power system fault allocation in real time (SIDUF-TR) is presented, which uses information on the tripped relays and circuit breakers to identify the most probable faulted element of the power system, serving as a decision making support for energy control center dispatchers.
Abstract: This paper presents an expert system for diagnosis of power system fault allocation in real time (SIDUF-TR). The system uses information on the tripped relays and circuit breakers to identify the most probable faulted element of the power system, serving as a decision making support for energy control center dispatchers. First, the expert system structure is presented, including a description of the inference method used to determine the most probable failures places. Then the architecture for real-time operation of SIDUF-TR in a control center is described. Finally, the result of the application of the system to a real disturbance is presented. I. INTRODUC~ON In cases of power system disturbances, control centers dispatchers must use their judgement and experience to determine the possible faulted elements as the first step in the restoration procedures. When a breaker or its associated relays fail to operate, the fault is removed by backup protection. In such cases, the outage area is very large and it is difficult for the dispatchers to estimate the fault location. Moreover, multiple faults may eventually take place, with many breakers being tripped within a short time. In these circumstances, so many alarm messages pour into the dispatch center that it is impossible for the dispatchers to analyze the situation satisfactorily and to ensure that the most appropriate actions be taken. Therefore, it is important to develop some means of providing accurate fault analysis to assist dispatchers in these situations. This may be achieved by using an expert system, embedded in the existing energy management system (3,8). Development of expert systems for fault diagnosis of power systems has received growing attention in the last years (6,8). Some of the previously reported systems for fault diagnosis use the monitoring information-based approach (1,8). A tree structure or a tabular form are used to organize monitoring information from tripped relays and circuit breakers and its relationship to fault location. Other fault diagnosis systems use the model-

67 citations


Proceedings ArticleDOI
12 Oct 1997
TL;DR: The IP fault model is described and a method for analyzing IP faults using standard SSL-based fault simulators and test generation tools is provided, used to generate test sets that target the IP faults of the ISCAS85 benchmark circuits and a carry-lookahead adder.
Abstract: Recent work in IC failure analysis strongly indicates the need for fault models that directly analyze the function of circuit primitives. The input pattern (IP) fault model is a functional fault model that allows for both complete and partial functional verification of every circuit module, independent of the design level. We describe the IP fault model and provide a method for analyzing IP faults using standard SSL-based fault simulators and test generation tools. The method is used to generate test sets that target the IP faults of the ISCAS85 benchmark circuits and a carry-lookahead adder. Improved IP fault coverage for the benchmarks and the adder is obtained by adding a small number of test patterns to tests that target only SSL faults. We also conducted fault simulation experiments that show IP test patterns are effective in detecting non-targeted faults such as bridging and transistor stuck-on faults. Finally, we discuss the notion of IP redundancy and show how large amounts of this redundancy exist in the benchmarks and in SSL-irredundant adder circuits.

67 citations


Patent
23 Sep 1997
TL;DR: In this paper, a fault sensor suitable for use in a heterogenous power distribution system executes a stored program and causes sufficient information to be collected to distinguish a source of fault current as being from a public utility portion of the power distribution network or from a distributed generator.
Abstract: A fault sensor suitable for use in a heterogenous power distribution system executes a stored program and causes sufficient information to be collected to distinguish a source of fault current as being from a public utility portion of the power distribution network or from a distributed generator. Short circuit current and magnetizing current are reliably distinguished based on differences in VI "signatures." In addition, the fault sensor periodically senses a condition of a battery of the fault sensor. When the condition of the battery indicates the battery power is low, the fault sensor sends a digital data signal including a low battery indication to a remote location. Subsequent to occurrence of a sustained power outage, the sensor detects that power has been restored and sends to a remote location a digital data signal including an indication that power has been restored. The sensor periodically measures peak line voltage and peak line current and reports peak values to the remote location.

64 citations


Journal ArticleDOI
18 May 1997
TL;DR: In this paper, a method for simulating internal faults in synchronous generators, using direct phase quantities, is described, and simulation results showing the fault currents, during a single phase to ground fault and a two phase-to-ground fault, are presented.
Abstract: An internal fault in the armature winding of a synchronous generator occurs due to the breakdown of the winding insulation. In this paper, a method for simulating internal faults in synchronous generators, using direct phase quantities, is described. Simulation results showing the fault currents, during a single phase to ground fault and a two phase to ground fault, are presented.

Patent
30 Jan 1997
TL;DR: In this article, a one-terminal process for locating a fault associated with a multi-phase electric power transmission system is disclosed, based on the principle that the impedance in a fault can be determined by correcting errors due to the interaction of fault resistance and load current.
Abstract: A one-terminal process for locating a fault associated with a multi-phase electric power transmission system is disclosed. The process is based on the principle that the impedance in a fault can be determined by correcting errors due to the interaction of fault resistance and load current. The fault may be a phase-to-ground fault or a multiple-phase fault.

Proceedings ArticleDOI
01 Nov 1997
TL;DR: The MiST PROFIT (Mixed Signal Test Program for Fault Insertion and Testing) software for hierarchical fault modeling, tolerance modeling, fault clustering and fault diagnosis of complex mixed-signal systems is discussed.
Abstract: In this paper we discuss the capabilities of the MiST PROFIT (Mixed Signal Test Program for Fault Insertion and Testing) software for hierarchical fault modeling, tolerance modeling, fault clustering and fault diagnosis of complex mixed-signal systems. The software is designed to exploit the relationships between high level system specifications and module-level faults in complex and nonlinear mixed signal systems. Hierarchical simulation based methods are used to capture fault effects at different levels of circuit abstraction. The key features of our approach are: (a) the ability to compute tolerance effects from nonlinear behavioral models at different levels of circuit design hierarchy accurately using low-cost simulation based methods, (b) the ability to perform compaction of fault effects while transferring fault effects from the leaf cells to the highest level behavioral models, (c) the ability to capture parametric (soft) failure effects over the entire anticipated range of faulty parameter values and (d) the ability to construct fault dictionaries given a set of least replaceable units to diagnose.

Proceedings ArticleDOI
25 Mar 1997
TL;DR: In this article, a single-ended fault location for overhead distribution systems based on the concept of superimposed components of voltages and currents rather than total quantities is presented. But the fault locator is highly insensitive to variations in source impedances (both local and remote) and to the presence of taps with variable loads.
Abstract: This paper presents a novel technique in single-ended fault location for overhead distribution systems based on the concept of superimposed components of voltages and currents rather than total quantities. It is shown that the fault locator is highly insensitive to variations in source impedances (both local and remote) and to the presence of taps with variable loads; this permits accurate fault location under a much wider range of system/fault conditions than has hitherto been possible.

Journal ArticleDOI
TL;DR: In this article, a test-detection model for permanent and intermittent faults in combinational circuits is presented, where two test-strategies are intermixed in the model: random testing for faultdetection and deterministic testing for deciding on the type of fault.
Abstract: Faults in combinational circuits are either permanent or intermittent. Intermittent faults tend to be environment-dependent; hence altering the environment might rectify these faults. These faults can be detected by applying random input-vectors (IV). The existence of random intermittent faults might require applying more random IV before detection. The detection of permanent faults requires fewer random IV but correction demands location and replacement of the faulty device, if repair is not feasible. Thus correction of a permanent fault costs more than that of an intermittent fault. The correction cost can be reduced by detecting the type of fault. Since most operational failures in a circuit are due to intermittent faults, it is very important to detect the type of fault in order to find a cheaper solution. This paper discusses the behavior of permanent and intermittent faults in combinational circuits, and introduces a test-detection model (TDM) for these faults. The error latency for an intermittent fault is derived. Two test-strategies are intermixed in the model: random testing for fault-detection, and deterministic testing for deciding on the type of fault. The activity of intermittent faults that requires the minimum number of IV for detection is emphasized. Simulation is used to demonstrate the validity of TDM. Although the variables required in TDM can be difficult to evaluate, estimation of their values is not impossible. A worst-case analysis can always be adopted, where variables are easily evaluated, to find an upper bound on the error latency; thus detection of an intermittent fault is assured with a very high probability. The cost-saving offered by intermittent-fault corrections shows the practical aspect of TDM.

Journal ArticleDOI
TL;DR: A new and more realistic delay model is proposed to obtain true fault coverages that extend up to the actual circuit slacks whenever possible and an alternate test application strategy, involving the usage of varying sampling times, is also proposed to further enhance the actual fault coverage obtained under the proposed delay model.
Abstract: This paper addresses the problem of obtaining accurate fault coverages for the gate delay fault model. For a gate delay fault, it is not sufficient to only find a test. One also has to accurately determine the size of the fault detected. We first show that previous methodologies for determining gate delay fault coverages have certain limitations. A method is then investigated to determine all the possible ranges of detected fault sizes, using the traditional fixed sampling time approach. However, with the constraints of a realistic inertial delay model, it is then shown that it might still not be possible to achieve the coverages required to guarantee circuit operation without malfunctions. A new and more realistic delay model is proposed to obtain true fault coverages that extend up to the actual circuit slacks whenever possible. An alternate test application strategy, involving the usage of varying sampling times, is also proposed to further enhance the actual fault coverages obtained under the proposed delay model. Results of experiments performed to evaluate these methods are given.

Proceedings ArticleDOI
25 Mar 1997
TL;DR: In this paper, the fault locators are used to capture the fault generated high frequency voltage or current transient signals from the faulted line/cable and the propagation time of the high frequency components is used to determine the fault position.
Abstract: Contemporary methods for fault location on overhead lines and underground cables can be classified into two fundamental types: (i) methods based on the measurement of post-fault line impedance; and (ii) methods based on the measurement of the fault generated travelling wave component. This paper presents the application of these new techniques to fault location on transmission and distribution line/cable systems. The technique utilises the specially designed fault locators to capture the fault generated high frequency voltage or current transient signals from the faulted line/cable. The propagation time of the high frequency components is used to determine the fault position.

Journal ArticleDOI
TL;DR: The method of classification through test generation using a model network is complex and can be applied to circuits of moderate size, and for larger circuits, alternative methods will have to be explored in the future.
Abstract: We classify all path-delay faults of a combinational circuit into three categories: {\it singly-testable} (ST), {\it multiply-testable} (MT), and {\it singly-testable\ dependent} (ST-dependent). The classification uses any unaltered single stuck-at fault test generation tool. Only two runs of this tool on a model network derived from the original network are performed. As a by-product of this process, we generate single and multiple input change delay tests for all testable faults. With these tests, we expect that most defective circuits are identified. All ST faults are guaranteed detection in the case of a single fault, and some may be guaranteed detection through robust and validatable non-robust tests even in the case of multiple faults. An ST-dependent fault can affect the circuit speed only if certain ST faults are present. Thus, if all ST faults are tested, the ST-dependent faults need not be tested. MT faults cannot be guaranteed detection, but affect the speed only if delay faults simultaneously exist on a set of paths, none of which is ST. Examples and results on several ISCAS ‘89 benchmarks are presented. The method of classification through test generation using a model network is complex and can be applied to circuits of moderate size. For larger circuits, alternative methods will have to be explored in the future.

Journal ArticleDOI
TL;DR: Because defect behavior is so variable, a fault model always leaves some faults unmodeled, so improved matching algorithms to diagnose complex behaviors even with inaccurate modeling are needed.
Abstract: Because defect behavior is so variable, a fault model always leaves some faults unmodeled. One solution is to use improved matching algorithms to diagnose complex behaviors even with inaccurate modeling.

Patent
17 Sep 1997
TL;DR: In this article, an adaptive method and apparatus for detecting fault conditions in a power distribution system that services both single phase loads and three phase loads is presented, which minimizes unnecessary service interruptions.
Abstract: An adaptive method and apparatus for detecting fault conditions in a power distribution system that services both single phase loads and three phase loads. The present invention accomplishes this by providing an adaptive ground fault detection method and an adaptive phase fault detection method. Both methods provide the capability to distinguish gradual changes in phase current, due to ordinary current fluctuations, from more substantial changes in phase current due to various fault conditions. By making this distinction, the present invention minimizes unnecessary service interruptions.

Patent
29 May 1997
TL;DR: In this paper, a fault identification, isolation and fault recovery system autonomously controls spacecraft operational systems is presented, where a fault detection and isolation module monitors the operational systems, identifies faults via such monitoring and attempts to isolate component causing the fault.
Abstract: A fault identification, isolation and fault recovery system autonomously controls spacecraft operational systems. A fault detection and isolation module monitors the operational systems, identifies faults via such monitoring and attempts to isolate component causing the fault. Isolation may constitute a plurality of hierarchically arranged techniques that enhance speed and maximize the likelihood of identifying a correct hypothesis regarding the actual failure. The fault isolation and fault recovery modules are bounded by a severe fault override module which places the spacecraft operational systems in a safe mode or state. Thus, the override module ensures rapid entry into the safe mode while preventing an erroneous hypothesis serviced by the fault recovery module from driving the system beyond acceptable limits. A high level command processor receives command sequences from remote ground support stations and from the on-board fault recovery module. A ground based test bed attached to a ground support systems is used to generate verified high level fault recovery scripts before and during a mission to bolster fault recovery capabilities.

Patent
07 Apr 1997
TL;DR: A smart built-in-test device for classifying fault behavior in electronic systems comprising a temporal monitor monitoring fault, and one or more sensors for measuring environmental stress conditions in real-time and outputting environmental stress condition data.
Abstract: A smart built-in-test device for classifying fault behavior in electronic systems comprising a temporal monitor monitoring fault, classifying fault behavior and generating fault behavior data as the system operates in real time; one or more sensors for measuring environmental stress conditions in real-time and outputting environmental stress condition data A fault correlator device for receiving the fault behavior data and the environmental stress condition data and correlating fault behavior to environmental stress conditions to determine if significant correlation exists

Patent
20 Mar 1997
TL;DR: In this article, the authors present a method and system which determine signal probability and transfer probability for each node in a netlist describing an electrical circuit; determine, using the signal probabilities and transfer probabilities, a fault detection probability; and, using fault detection probabilities, determine overall fault coverage of the electrical circuit described in the netlist.
Abstract: The present invention is a method and system which determine signal probability and transfer probability for each node in a netlist describing an electrical circuit; determine, using the signal probability and transfer probability, a fault detection probability for each node; and, using the fault detection probabilities, determine overall fault coverage of the electrical circuit described in the netlist. The method and system of the present invention then, using the fault coverage data, heuristically determine a set of testpoints to be inserted into the netlist which increase the overall fault coverage of the electrical circuit above a predetermined value.

Patent
25 Mar 1997
TL;DR: In this paper, a neural network is used to simulate fault-afflicted loops in the form of standardised resistance and reactance values formed in accordance with the excitation characteristic curve of an excitation device.
Abstract: The invention relates to a process for generating fault classification signals which in a multiphase power supply network, seen from a protective device with excitation system, designate fault-afflicted loops formed in the event of faults. In order to facilitate relatively simple generation of such fault classification signals, use is made of a neural network (9) which is instructed with input values which simulate fault-afflicted loops in the form of standardised resistance and reactance values formed in accordance with the excitation characteristic curve of the excitation device (5). To generate the fault-classification signals (F1, F2) the neural network (9) in the event of a fault is acted on by standardised resistance and reactance measurement values (RL1-E, XL1-E; RL3-L1, XL3-L1).

Patent
31 Jan 1997
TL;DR: A network fault system for mobile telecommunications network which includes a first interface (8, 14) for accessing first fault data representative of faults reported by users of mobile stations of the network a second interface (12, 14), and pattern matching means (14, 24) for allocating the first and second fault data to fault patterns having at least one common characteristic.
Abstract: A network fault system (2) for mobile telecommunications network which includes a first interface (8, 14) for accessing first fault data representative of faults reported by users of mobile stations of the network a second interface (12, 14) for accessing second fault data representative of faults in the network determined by a network analysis system (10), and pattern matching means (14, 24) for allocating the first and second fault data to fault patterns representative of faults having at least one common characteristic.

Proceedings ArticleDOI
11 Nov 1997
TL;DR: A specifically designed transient and permanent fault identification unit is used to capture the fault arc generated high frequency current noise, and a signal processing algorithm is then used to determine whether the fault is transient or permanent, and the fault sustain time for a transient fault.
Abstract: This paper presents a new technique for transient and permanent fault identification in an adaptive reclosure by using the fault generated high frequency current transients. A specifically designed transient and permanent fault identification unit is used to capture the fault arc generated high frequency current noise, and a signal processing algorithm is then used to determine whether the fault is transient or permanent, and the fault sustain time for a transient fault.

Journal ArticleDOI
TL;DR: It is suggested that the dynamic power dissipation of acircuit can be used for fault detection, and how stuck-at, stuck-open, and redundant faults maybe detected by monitoring dynamic power Dissipation is discussed.
Abstract: In this paper, we suggest that the dynamic power dissipation of a circuit can be used for fault detection Even those faults which do not affect static power dissipation can be detected by monitoring dynamic power dissipation We discuss how stuck-at, stuck-open, and redundant faults may be detected by monitoring dynamic power dissipation In many cases, the Fourier spectra of the supply currents in the good and faulty circuits will also be very different Further, specific tests can be applied so as to improve fault coverage Power monitoring is verified using simulation, and also experimentally, for example circuits

Proceedings ArticleDOI
25 Mar 1997
TL;DR: In this paper, the fault direction is determined based on a comparison of the spectral energy of the fault generated high frequency current transient components, and the level of the energy entering the busbar is then compared with that leaving it.
Abstract: This paper presents a new principle in directional relaying in which the fault direction is determined based on a comparison of the spectral energy of the fault generated high frequency current transient components. In this scheme, a current transient detection unit, which is interfaced to the CTs on each of the output lines connecting the busbar, is employed to capture the fault generated transient current signals. The transient signal captured from each line is first integrated (based on a small window of information) to obtain its spectral energy; the level of the energy entering the busbar is then compared with that leaving it, to ascertain the direction of the fault. It is shown that the detector is also able to make correct discrimination when a fault occurs on the busbar. Simulation studies were carried out using the EMTP software. The faulted responses were examined with respect to various system and fault conditions.

Patent
06 Feb 1997
TL;DR: In this article, a fault indicator for indicating the occurrence of a fault current in an electrical conductor is mounted on the test point of an elbow connector of the type commonly used in power distribution systems.
Abstract: A fault indicator for indicating the occurrence of a fault current in an electrical conductor is mounted on the test point of an elbow connector of the type commonly used in power distribution systems. An integral collar assembly encircles the connector housing to capacitively couple the fault indicator circuitry to the system conductor within the connector. The collar assembly includes an inner magnetic core which establishes the coupling and an outer core which shields the inner core from magnetic fields resulting from fault currents in adjacent conductors.

Proceedings ArticleDOI
01 Jan 1997
TL;DR: In this article, the authors describe how current earth fault detection automation proves to be particularly ineffective during high resistance or arcing in the vicinity of the earth fault in Polish medium-voltage power networks.
Abstract: Recent experience in the exploitation of Polish medium-voltage power networks shows that prevailing method used to determine distribution line earth faults, based on directional criteria, is often unreliable and poorly effective. This paper describes how current earth fault detection automation proves to be particularly ineffective during high resistance or arcing in the vicinity of the earth fault.