Showing papers on "Fault indicator published in 2000"

Fault-tolerant control in dynamic systems: application to a winding machine

Abstract: The general fault-tolerant control method described in the article addresses actuator and sensor faults, which often affect highly automated systems. These faults correspond to a loss of actuator effectiveness or fault sensor measurements. After describing these faults, a fault estimation and compensation method was proposed. In addition to providing information to operators concerning the system operating conditions, the fault diagnosis module is especially important in fault-tolerant control systems where one needs to know exactly which element is faulty to react safely. The method's abilities to compensate for such faults are illustrated by applying it to a winding machine, which represents a subsystem of many industrial systems. The results show that once the fault is detected and isolated, it is easy to reduce its effect on the system, and process control is resumed with degraded performances close to nominal ones. Thus, stopping the system immediately can be avoided. However, the limits of this method are reached when there is the complete loss of an actuator. In this case, only a hardware redundancy is effective and could ensure performance reliability. The method proposed here assumes the availability of the state variables for measurement.

Functional memory faults: a formal notation and a taxonomy

Abstract: This paper presents a notation for describing functional fault models, which may occur in memory devices. Using this notation, the space of all possible memory faults has been constructed. It has been shown that this space is infinite, and contains the currently established fault models. New fault models in this space have been identified and verified using resistive and capacitive defect injection and simulation of a DRAM model.

Network fault isolation

Abstract: Techniques are provided for improved fault isolation and fault reduction. A system for use with a data network includes multiple diagnostic units each adapted to communicate with the network including to a network user. A central controller is operatively connected to the diagnostic units, the controller being adapted to communicate with and coordinate operations of the diagnostic units, to instruct the diagnostic units to perform tests adapted to help isolate a network fault, and to analyze test results received from a diagnostic unit to attempt to determine the network fault. Various methods for improving fault isolation and fault reduction are also provided.

An experimental analysis of spot defects in SRAMs: realistic fault models and tests

Abstract: In this paper a complete analysis of spot defects in industrial SRAMs will be presented. All possible defects are simulated, and the resulting electrical faults are transformed into functional fault models. The existence of the usually used theoretical memory fault models will be verified and new ones will be presented. Finally, a new march test detecting all realistic faults, with a test length of 14n, will be introduced, and its fault coverage is compared with other known tests.

A fault locator for radial subtransmission and distribution lines

Abstract: This paper presents the design and development of a prototype fault locator that estimates the location of shunt faults on radial subtransmission and distribution lines. The fault location technique is based on the fundamental frequency component of voltages and currents measured at the line terminal. Extensive sensitivity studies of the fault location technique have been done-some of the results are included in the paper. Hardware and software of the fault locator are described. The fault locator was tested in the laboratory using simulated fault data and a real-time playback simulator. Some results from the tests are presented. Results indicate that the fault location technique has acceptable accuracy, is robust and can be implemented with the available technology.

Interconnection power converter and power generation apparatus using the same

Abstract: In a solar power generation apparatus using a solar battery having a relatively large ground capacitor and a power conditioner having a non-insulated input and output, a customer's ground fault interrupter may perform unwanted interruption due to a ground fault outside the customer's premises. To prevent this, when a ground fault is detected by a detector capable of detecting a ground fault within a shorter time than the customer's ground fault interrupter, the gate of inverter of the power conditioner is blocked, a switch is changed to an open state, and the input voltage of inverter is held at a voltage value higher than the peak value of the alternate current voltage of a power system until at least the switch changes to the open state.

On-line fault diagnosis of distribution substations using hybrid cause-effect network and fuzzy rule-based method

Abstract: A correct and rapid inference is required for practical use of an online fault diagnosis in power substations. This paper proposes a novel approach for on-line fault section estimations and fault types identification using the hybrid cause-effect network/fuzzy rule-based method in distribution substations. A cause-effect network, which is well suited to parallel processing, represents the functions of protective relays and circuit breakers for selection of faulted sections. Therefore the inference speed can be improved significantly. In order to deal with the uncertainties involved in the process of clarifying faults, a fuzzy rule-based method is derived. The proposed approach has been practically verified by testing on a typical Taiwan Power Company's (Taipower) secondary substation. The experimental results reveal that the correct and rapid diagnosis is obtained even for the fault domains involving multiple faults and failure operations of protective devices. Moreover, it is easy to implement and transplant into different substations.

Accurate fault location algorithm for series compensated transmission lines

Abstract: In this paper, an accurate fault location algorithm for series compensated power transmission lines is presented. A distributed time domain model is used for modeling of the transmission lines. The algorithm makes use of two subroutines for estimation of the fault distance-one for faults behind the series capacitors and another one for faults in front of the series capacitors. Then a special procedure to select the correct solution is utilized. Samples of voltages and currents at both ends of the line are taken synchronously and used to calculate the location of the fault. The proposed algorithm is independent of fault resistance and does not require any knowledge of source impedance. The proposed method has been tested using the EMTP/ATP model of a 100 kV, 300 km transmission line, which is compensated, by a three-phase capacitor bank in the middle. The results of computer simulation confirm the accuracy of the proposed method.

Fault interrupter using microcontroller for fault sensing and automatic self-testing

Abstract: A fault interrupter having a microcontroller is provided to detect actual faults The fault interrupter initiates a periodic self-test and provides external notification to the user upon successful or unsuccessful completion of the test The fault interrupter generates the test signal at a selected time to substantially coincide with the zero-crossing of the AC power source A manual test can also be performed using a manual test switch provided as a direct input to the microcontroller

The 40-/spl Omega/ ground-fault phenomenon

Abstract: Coordination of protective devices on electrical distribution systems always involves the calculation of fault currents. These calculations almost always include a minimum fault current value. This minimum fault current value is not a bolted fault calculation; it includes an assumed impedance. Many utilities have assumed this impedance to be 40 /spl Omega/. This paper examines that assumption and provides some guidance on this issue. This paper is based on a study sponsored by the Cooperative Research Network, a division of the National Rural Electric Cooperative Association, based in Arlington, VA. This original study was completed in 1997.

Arc fault or ground fault detector with self-test feature

Abstract: A self-testing arc fault or ground fault detector includes arc fault detecting circuitry and components. The detector includes a testing circuit which tests at least part of the circuitry and components and generates a recurring signal when the test completes successfully. If the test does not complete successfully, the signal is lost. This loss of signal is signaled by an indicator connected to the testing circuit. In one version, the loss of signal activates a circuit interrupter which disconnects the load side of the detector from the line side.

Digital fault location for parallel double-circuit multi-terminal transmission lines

Abstract: Two new methods are proposed for fault point location in parallel double-circuit multi-terminal transmission lines by using voltages and currents information from CCVTs and CTs at all terminal. These algorithms take advantage of the fact that the sum of currents flowing into a fault section equals the sum of the currents at all terminals. Algorithm 1 employs an impedance calculation and algorithm 2 employs the current diversion ratio method. Computer simulations are carried out and applications of the proposed methods are discussed. Both algorithms can be applied to all types of fault such as phase-to-ground and phase-to-phase faults. As one equation can be used for all types of fault, classification of fault types and selection of faulted phase are not required. Phase components of the line impedance are used directly, so compensation of unbalanced line impedance is not required.

Method of controlling a network element to aggregate alarms and faults of a communications network

Abstract: A distributed method and system of controlling a communications network having a plurality of spans of interconnected network elements some of which include a network element processor distributes network topology information to respective span databases; stores original fault objects in the respective span databases; advertises fault objects to other network element processors in a local span when the original fault affects network elements other than a network element in which the fault occurred; advertises alarm objects to other network element processors that are respectively associated with a circuit affected by the original faults; stores the advertised fault and alarm objects in the respective span databases; and performs distributed processing of the advertised fault and alarm objects with the other network element processors and the respective span databases. Aggregation of other faults and alarms that may be occurring on the communications network due to other faults other than the received fault aids in determining causality of the fault. Causality may be determined by correlating other faults and alarms with the received fault. If not a root cause of another fault or alarm, the received fault is sympathetic to another fault or alarm. Sympathetic faults are suppressed while root cause faults are promoted to an alarm and reported to affected network elements. The number of alarms viewed by a network manager as well as the reporting of alarms and underlying faults are reduced by performing such distributed alarm correlation and fault reporting suppression.

Positional protection of transmission line using fault generated high frequency transient signals

Abstract: This paper presents a new technique for high-speed protection of transmission lines, the positional protection technique. The technique uses a fault transient detector unit at the relaying point to capture fault generated high frequency transient signals contained in the primary currents. The decision to trip is based on the relative arrival times of these high frequency components as they propagate through the system. Extensive simulation studies of technique were carried out to examine the response to different power system and fault conditions. Results show that the scheme is insensitive to fault type, fault resistance, fault inception angle and system source configuration, and that it is able to offer both very high accuracy and speed in fault detection.

Method and system for processing alarm objects in a communications network

Abstract: A distributed method and system of controlling a communications network having a plurality of spans of interconnected network elements some of which include a network element processor distributes network topology information to respective span databases; stores original fault objects in the respective span databases; advertises fault objects to other network element processors in a local span when the original fault affects network elements other than a network element in which the fault occurred; advertises alarm objects to other network element processors that are respectively associated with a circuit affected by the original faults; stores the advertised fault and alarm objects in the respective span databases; and performs distributed processing of the advertised fault and alarm objects with the other network element processors and the respective span databases. Aggregation of other faults and alarms that may be occurring on the communications network due to other faults other than the received fault aids in determining causality of the fault. Causality may be determined by correlating other faults and alarms with the received fault. If not a root cause of another fault or alarm, the received fault is sympathetic to another fault or alarm. Sympathetic faults are suppressed while root cause faults are promoted to an alarm and reported to affected network elements. The number of alarms viewed by a network manager as well as the reporting of alarms and underlying faults are reduced by performing such distributed alarm correlation and fault reporting suppression.

Remote light indication fault indicator with a timed reset circuit and a manual reset circuit

Abstract: A fault indicator contained within a protective equipment closure of the type used to house pad-mounted components of a power distribution system detects the occurrence of a fault current in a monitored conductor and provides a light indication thereof. The fault indicator includes a circuit monitoring module, having an integral fault indicator flag module, and a remote fault indicator light module. A status-indicating flag is rotatably mounted in the integral fault indicator flag module. The flag is positioned in either a reset indicating position or a fault indicating position by a magnetic pole piece, which is magnetized in one magnetic direction or the other by momentary application of a current in one direction or the other to an actuator winding on the pole piece. A magnetically actuated reed switch in an auxiliary magnetic circuit comprising an auxiliary pole piece magnetized by the actuator winding and a bias magnet magnetically aligned to oppose the reset magnetic orientation and reenforce the trip magnetic orientation of the magnetic pole piece closes upon occurrence of the fault current to connect an internal battery to an LED contained within the remote fault indicator light module so that the LED is visible from the exterior of the protective equipment enclosure. The light indication of the fault occurrence may be reset automatically by a timed reset circuit, which includes a timing capacitor, or manually by a manual reset circuit, which includes a magnetically actuated switch housed in the remote light module and connected across the timing capacitor.

Method and apparatus for testing a computer system through software fault injection

Abstract: One embodiment of the present invention provides a system for testing a computer system by using software to inject faults into the computer system while the computer system is operating. This system operates by allowing a programmer to include a fault point into source code for a program. This fault point causes a fault to occur if a trigger associated with the fault point is set and if an execution path of the program passes through the fault point. The system allows this source code to be compiled into executable code. Next, the system allows the computer system to be tested. This testing involves setting the trigger for the fault point, and then executing the executable code, so that the fault occurs if the execution path passes through the fault point. This testing also involves examining the result of the execution. In one embodiment of the present invention, if the fault point is encountered while executing the executable code, the system executes the fault point by: looking up a trigger associated with the fault point; determining whether the trigger has been set; and executing code associated with the fault point if the trigger has been set.

Universal fault simulation using fault tuples

Abstract: We introduce a new fault representation mechanism for digital circuits based on fault tuples. A fault tuple is a simple 3-element condition for a signal line, its value, and clock cycle constrain t. AND-OR expressions of fault tuples are used to represent arbitrary misbehaviors. A fault simulator based on fault tuples was used to conduct experiments on benc hmark circuits. Simulation results show that a 17% reduction of average CPU time is achiev ed when performing sim ulation on all fault types simultaneously, as opposed to individually. We expect further improvements in speedup when the shared characteristics of the various fault types are better exploited.

Accurate fault location algorithm for series compensated transmission lines

Abstract: In this paper, an accurate fault location algorithm for series compensated power transmission lines is presented. A distributed time domain model is used for modeling of the transmission lines. The algorithm makes use of two subroutines for estimation of the fault distance-one for faults behind the series capacitors and another one for faults in front of the series capacitors. Then a special procedure to select the correct solution is utilized. Samples of voltages and currents at both ends of the line are taken synchronously and used to calculate the location of the fault. The proposed algorithm is independent of fault resistance and does not require any knowledge of source impedance. The proposed method has been tested using the EMTP/ATP model of a 400 kV, 300 km transmission line, which is compensated, by a three-phase capacitor bank in the middle. The results of computer simulation confirm the accuracy of the proposed method.

Fault handling process for enabling recovery, diagnosis, and self-testing of computer systems

Abstract: Methods, apparatus, and computer program products are disclosed for analyzing and recovering from severe to catastrophic faults in a computer system. When a fault that cannot be handled by the computer system's normal fault handling processes, a shadow mode created by a fault handling virtual machine is invoked. The fault handling virtual machine executes only when the normally nonrecoverable fault is encountered and executes as a triangulated or shadow mode on the system. Once shadow mode is invoked, fault context data is collected on the system and used to analyze and recover from the fault. More specifically, one or more post-fault stable states are constructed by the fault handling virtual machine. These stable states are used to bring the computer system back to a normal operating state in which the component or action causing the initial nonrecoverable fault is avoided. Persistent faults may be encountered while the virtual machine is attempting to recover from the initial fault.

Actuator fault-tolerant control design: Demonstration on a three-tank-system

Abstract: Fault-tolerant control or reconfigurable control systems are generally based on a nominal control law associated with a fault detection and isolation module. A general review of techniques dealing with this problem is given and a new fault-tolerant control approach is presented. This method is based on the on-line estimation of an eventual fault and the addition of a new control law to the nominal control law in order to reduce the fault effect once this fault is detected and isolated. The performances of this method depend on the time delay between the occurrence of the fault and its detection and isolation. A modified approach is then proposed in order to avoid the problems generated by delays, false alarms or non-detection inherent to diagnosis techniques. These methods are applied to a pilot plant and their performances are compared and discussed.

Delay-fault testing and defects in deep sub-micron ICs-does critical resistance really mean anything?

Abstract: This paper reflects on some recent results that show the value of delay-fault tests on a deep sub-micron process. However, the results also suggest that untargetted test patterns perform almost as well as those targetted on a transition fault model, despite appearing to have a much lower fault coverage. This leads to an examination of the defect mechanisms in deep sub-micron ICs, in particular the relationship of crosstalk and power-rail coupling to resistive opens and resistive bridges. A number of new fault mechanisms are described. The paper shows the importance of initialization conditions for resistive opens and the importance of noise margins with resistive bridges. These noise margin considerations throw doubts on the idea used by other authors of the "critical resistance" of a bridge.

Combo AFCI/GFCI with single test button

Abstract: A combination AFCI/GFCI includes a single test button which when pushed, tests both the arc fault and ground fault detection circuitry and the circuit interrupter. Closing the test button causes a simulated ground fault and enables a signal steering circuit. The steering circuit redirects the ground fault detector output to an arc fault simulator circuit which produces a simulated arcing pulses that are coupled, preferably by way of an extra winding, to an arc fault sensor transformer. The arc fault detector senses the arc fault simulator pulses coupled to the sensor transformer and, if everything is operating normally, triggers a switching device such as an SCR which activities a circuit interrupter. In this way, both the ground fault circuit interrupter and arc fault circuit interrupter functions are tested simultaneously, and the test is initiated by a single test button. When the circuit interrupter is not in the test mode, the steering circuitry is disabled and either a ground fault or an arc fault or both will independently activate the switching device and the circuit interrupter.

Fault indicators in transmission and distribution systems

Abstract: Fault location techniques can be classified under three categories: (1) those based on fundamental frequency currents and voltages; (2) those based on travelling wave and high frequency components; and (3) those based on knowledge-based approaches. Fault indicators can be installed either in substation or on pole/tower along the transmission line. This paper reviews the fault indicator applications both in transmission and distribution systems. Principles, merits and demerits of each fault location technique are discussed. Finally, this paper suggests an advanced fault indicator based on fault generated high frequency noise signal (FI-HF), which is mounted between earth wire and tower. Fault generated high frequency noise signal is captured by a special designed "earth trap" and stack tuner.

Identifying three-phase induction motor faults using artificial neural networks

Abstract: This paper presents an artificial neural network (ANN) based technique to identify faults in a three-phase induction motor. The main types of faults considered are overload, single phasing, unbalanced supply voltage, locked rotor, ground fault, over-voltage and under-voltage. Three-phase currents and voltages from the induction motor are used in the proposed approach. A feedforward layered neural network structure is used. The network is trained using the backpropagation algorithm. The trained network is tested with simulated fault current and voltage data. Fault detection is attempted in the no fault to fault transition period. Off-line testing results on a 3 HP induction motor model show that the proposed ANN based method is effective in identifying various types of faults.

Network fault information management system in which fault nodes are displayed in tree form

Abstract: A network fault managing system for a network including network elements as nodes includes a fault node indication data storage section, a fault indication data storage section, a flag, a fault node indication data processing section, a fault indication data processing section and an output unit. The fault node indication data storage section stores a fault node indication data set in which fault nodes are managed in a tree form. The fault node indication data processing section receives a fault association notice having a fault occurrence position identifier and a fault indication data, the fault occurrence position identifier indicating a fault node in which a fault has occurred, and the fault indication data indicating data associated with the fault, and determines whether a fault node indication data corresponding to the fault node specified by the fault occurrence position identifier of the fault association notice is present in the fault node indication data set. Also, the fault node indication data processing section generates the fault node indication data based on the fault occurrence position identifier to store in the fault node indication data set of the fault node indication data storage section, when the fault node indication data is not present in the fault node indication data set, and sets the flag.

Intelligent fault management

Abstract: A principle for handling system failure situations thereby maintaining minimum fault recovery time and providing high system availability is described, especially for controlling the system behavior in fault situations of Electronic Control Units used in automotive vehicles. This principle is providing unique solutions for fault analysis, fault recovery definition and system re-vitalization. It is a key attribute of the principle keeping the demand for hardware and software overhead at a minimum. The method applies graceful degradation of system functionality, allowing to achieve the implementation of cost effective systems.